Re: [PATCH] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4

* Paul Walmsley [EMAIL PROTECTED] [080624 10:12]: OMAP34xx ES2 TRM Delta G to H states that the divider for DPLL1_FCLK and DPLL2_FCLK can divide by 4 in addition to dividing by 1 and 2. Encode this into the OMAP3 clock framework. Pushing today. Tony Signed-off-by: Paul Walmsley [EMAIL

[PATCH] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4

OMAP34xx ES2 TRM Delta G to H states that the divider for DPLL1_FCLK and DPLL2_FCLK can divide by 4 in addition to dividing by 1 and 2. Encode this into the OMAP3 clock framework. Signed-off-by: Paul Walmsley [EMAIL PROTECTED] --- arch/arm/mach-omap2/clock34xx.h | 20