On Fri, Aug 17, 2012 at 11:43 PM, Puttagunta, Viswanath vi...@ti.com wrote:
On Fri, Aug 17, 2012 at 12:28 PM, S, Venkatraman svenk...@ti.com wrote:
On Fri, Aug 17, 2012 at 9:35 PM, Semen Protsenko semen.protse...@ti.com
wrote:
Errata description:
Due to a bad behavior of an internal signal,
On Mon, Aug 20, 2012 at 12:08 PM, S, Venkatraman svenk...@ti.com wrote:
On Fri, Aug 17, 2012 at 11:43 PM, Puttagunta, Viswanath vi...@ti.com
wrote:
On Fri, Aug 17, 2012 at 12:28 PM, S, Venkatraman svenk...@ti.com
wrote:
On Fri, Aug 17, 2012 at 9:35 PM, Semen Protsenko
On Mon, Aug 20, 2012 at 12:25 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
On Mon, Aug 20, 2012 at 12:08 PM, S, Venkatraman svenk...@ti.com wrote:
On Fri, Aug 17, 2012 at 11:43 PM, Puttagunta, Viswanath vi...@ti.com
wrote:
[...]
Signed-off-by: Semen Protsenko semen.protse...@ti.com
On Mon, Aug 20, 2012 at 02:30:01PM +0530, Shubhrajyoti Datta wrote:
On Mon, Aug 20, 2012 at 12:25 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
On Mon, Aug 20, 2012 at 12:08 PM, S, Venkatraman svenk...@ti.com wrote:
On Fri, Aug 17, 2012 at 11:43 PM, Puttagunta, Viswanath
Errata description:
Due to a bad behavior of an internal signal, the Card Error interrupt bit
MMCHS_STAT[28] CERR may not be set sometimes when an error occurred in the
card response.
Workaround:
After responses of type R1/R1b for all cards and responses of type R5/R5b/R6
for SD and SDIO cards,
On Fri, Aug 17, 2012 at 9:35 PM, Semen Protsenko semen.protse...@ti.com wrote:
Errata description:
Due to a bad behavior of an internal signal, the Card Error interrupt bit
MMCHS_STAT[28] CERR may not be set sometimes when an error occurred in the
card response.
Workaround:
After responses
On Fri, Aug 17, 2012 at 12:28 PM, S, Venkatraman svenk...@ti.com wrote:
On Fri, Aug 17, 2012 at 9:35 PM, Semen Protsenko semen.protse...@ti.com
wrote:
Errata description:
Due to a bad behavior of an internal signal, the Card Error interrupt bit
MMCHS_STAT[28] CERR may not be set sometimes
