Tony,
Thanks for you suggestions
>> OMAP5 V2 series is ready with all comments addressed, but I have
>> below dependencies to be merged to apply my series against your
>> cleanup-soc branch
>
> OK
>
>> 1) git://git.pwsan.com/linux-2.6 hwmod_soc_conditional_cleanup_3.5
>
> This one is not mer
org; santosh.shilim...@ti.com;
> > t...@atomide.com; b-cous...@ti.com; r.sricha...@ti.com
> > Subject: [PATCH 00/13] ARM: OMAP5: Add minimal OMAP5 SOC support
> >
> > The series adds minimal OMAP5 support.
> > OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
&g
.@ti.com
> Subject: [PATCH 00/13] ARM: OMAP5: Add minimal OMAP5 SOC support
>
> The series adds minimal OMAP5 support.
> OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
> L2 cache. The SOC has many compatible blocks with OMAP4 SOCS and
> hence large part of the peri
* Santosh Shilimkar [120508 00:27]:
> On Tuesday 08 May 2012 03:56 AM, Tony Lindgren wrote:
> > * Santosh Shilimkar [120507 02:53]:
> >> Tony,
> >>
> >> On Thursday 03 May 2012 12:56 PM, R Sricharan wrote:
> >>> The series adds minimal OMAP5 support.
> >>> OMAP5430 has a dual core Cortex-A15 base
On Tuesday 08 May 2012 03:56 AM, Tony Lindgren wrote:
> * Santosh Shilimkar [120507 02:53]:
>> Tony,
>>
>> On Thursday 03 May 2012 12:56 PM, R Sricharan wrote:
>>> The series adds minimal OMAP5 support.
>>> OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
>>> L2 cache. The SOC has
* Santosh Shilimkar [120507 02:53]:
> Tony,
>
> On Thursday 03 May 2012 12:56 PM, R Sricharan wrote:
> > The series adds minimal OMAP5 support.
> > OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
> > L2 cache. The SOC has many compatible blocks with OMAP4 SOCS and
> > hence large
Tony,
On Thursday 03 May 2012 12:56 PM, R Sricharan wrote:
> The series adds minimal OMAP5 support.
> OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
> L2 cache. The SOC has many compatible blocks with OMAP4 SOCS and
> hence large part of the peripherals are re-used.
>
> OMAP5432
The series adds minimal OMAP5 support.
OMAP5430 has a dual core Cortex-A15 based MPU subsystem with 2MB
L2 cache. The SOC has many compatible blocks with OMAP4 SOCS and
hence large part of the peripherals are re-used.
OMAP5432 is another variant of OMAP5430, with a
memory controller supporting DDR
