On Sat, Jan 21, 2012 at 12:57 PM, Paul Walmsley p...@pwsan.com wrote:
It seems that when the transmit FIFO threshold is reached on OMAP
UARTs, it does not result in a PRCM wakeup. This appears to be a
silicon bug. This means that if the MPU powerdomain is in a low-power
state, the MPU will
On Mon, 23 Jan 2012, Govindraj wrote:
On Sat, Jan 21, 2012 at 12:57 PM, Paul Walmsley p...@pwsan.com wrote:
It seems that when the transmit FIFO threshold is reached on OMAP
UARTs, it does not result in a PRCM wakeup. This appears to be a
silicon bug. This means that if the MPU
On Mon, Jan 23, 2012 at 2:20 PM, Govindraj govindraj...@gmail.com wrote:
On Sat, Jan 21, 2012 at 12:57 PM, Paul Walmsley p...@pwsan.com wrote:
It seems that when the transmit FIFO threshold is reached on OMAP
UARTs, it does not result in a PRCM wakeup. This appears to be a
silicon bug. This
It seems that when the transmit FIFO threshold is reached on OMAP
UARTs, it does not result in a PRCM wakeup. This appears to be a
silicon bug. This means that if the MPU powerdomain is in a low-power
state, the MPU will not be awakened to refill the FIFO until the next
interrupt from another
