Re: [PATCH 2/4] pinctrl: single: Add hardware specific hooks for IRQ and GPIO wake-up events

2013-07-29 Thread Tony Lindgren
* Linus Walleij linus.wall...@linaro.org [130722 14:50]: On Mon, Jun 10, 2013 at 5:36 PM, Tony Lindgren t...@atomide.com wrote: At least on omaps, each board typically has at least one device configured as wake-up capable from deeper idle modes. In the deeper idle modes the normal

Re: [PATCH 2/4] pinctrl: single: Add hardware specific hooks for IRQ and GPIO wake-up events

2013-07-22 Thread Linus Walleij
On Mon, Jun 10, 2013 at 5:36 PM, Tony Lindgren t...@atomide.com wrote: At least on omaps, each board typically has at least one device configured as wake-up capable from deeper idle modes. In the deeper idle modes the normal interrupt wake-up path won't work as the logic is powered off and

Re: [PATCH 2/4] pinctrl: single: Add hardware specific hooks for IRQ and GPIO wake-up events

2013-06-10 Thread Tony Lindgren
* Haojian Zhuang haojian.zhu...@gmail.com [130608 21:51]: I assume that this patch is used in both v1 v2 version. Since Manjunathappa changed the logic of distinguishing bits and pins in blew. if (pcs-bits_per_mux) mask = vals-mask; else mask = pcs-fmask Would you like to

Re: [PATCH 2/4] pinctrl: single: Add hardware specific hooks for IRQ and GPIO wake-up events

2013-06-08 Thread Haojian Zhuang
On Sat, Jun 8, 2013 at 4:50 AM, Tony Lindgren t...@atomide.com wrote: At least on omaps, each board typically has at least one device configured as wake-up capable from deeper idle modes. In the deeper idle modes the normal interrupt wake-up path won't work as the logic is powered off and

[PATCH 2/4] pinctrl: single: Add hardware specific hooks for IRQ and GPIO wake-up events

2013-06-07 Thread Tony Lindgren
At least on omaps, each board typically has at least one device configured as wake-up capable from deeper idle modes. In the deeper idle modes the normal interrupt wake-up path won't work as the logic is powered off and separate wake-up hardware is available either via IO ring or GPIO hardware.