Hi Santosh,
On Tue, Sep 13, 2011 at 7:37 AM, Santosh santosh.shilim...@ti.com wrote:
On Tuesday 13 September 2011 12:22 AM, Kevin Hilman wrote:
Santosh Shilimkarsantosh.shilim...@ti.com writes:
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is
On Tuesday 13 September 2011 01:09 PM, Jean Pihet wrote:
Hi Santosh,
On Tue, Sep 13, 2011 at 7:37 AM, Santoshsantosh.shilim...@ti.com wrote:
On Tuesday 13 September 2011 12:22 AM, Kevin Hilman wrote:
[..]
static inline int omap4_finish_suspend(unsigned long cpu_state)
{}
This one
Santosh Shilimkar santosh.shilim...@ti.com writes:
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is as below.
- CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained
OMAP4460 onwards, MPUSS power domain doesn't support OFF state
On Tuesday 13 September 2011 12:22 AM, Kevin Hilman wrote:
Santosh Shilimkarsantosh.shilim...@ti.com writes:
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is as below.
- CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is as below.
- CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained
OMAP4460 onwards, MPUSS power domain doesn't support OFF state any more
anymore just like CORE power domain. The
