On Tue, Oct 16, 2012 at 00:18:30, Peter Korsgaard wrote:
Philip, Avinash avinashphi...@ti.com writes:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
Philip, Avinash avinashphi...@ti.com writes:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured in wrap mode 6
On Thu, Oct 04, 2012 at 00:24:58, Ivan Djelic wrote:
On Wed, Oct 03, 2012 at 03:29:48PM +0100, Philip, Avinash wrote:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine
On Thu, Oct 04, 2012 at 09:03:42AM +0100, Philip, Avinash wrote:
(...)
+int gpmc_calculate_ecc_bch(int cs, const u_char *dat, u_char *ecc)
+{
+ int i, eccbchtsel;
+ u32 nsectors, reg, bch_val1, bch_val2, bch_val3, bch_val4;
+
+ if (gpmc_ecc_used != cs)
+ return
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured
On Wed, Oct 03, 2012 at 03:29:48PM +0100, Philip, Avinash wrote:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured
