Shubhrajyoti D shubhrajy...@ti.com writes:
For OMAP4 Interrupt enable register is a legacy register.
I don't see anything in the docs mentioning this is legacy. In fact,
that register is used extensivly throughout the driver, even for OMAP4.
I think the CLR/SET registers were added to aid
On Tuesday 22 November 2011 12:05 AM, Kevin Hilman wrote:
Shubhrajyoti D shubhrajy...@ti.com writes:
For OMAP4 Interrupt enable register is a legacy register.
I don't see anything in the docs mentioning this is legacy. In fact,
that register is used extensivly throughout the driver, even for
For OMAP4 Interrupt enable register is a legacy register.
To clear the interrupts we were writing 0 to it. However on OMAP4
we were writing 1 to IRQENABLE_CLR which clears only the arbitration
lost interrupt. The patch intends to fix the same by writing 1
to all the bits.
Signed-off-by:
