On Fri, Aug 07, 2015 at 05:36:05PM +0200, Sebastian Andrzej Siewior wrote:
+ /*
+ * We do not allow DMA_MEM_TO_DEV transfers to be paused.
+ * According to RMK the OMAP hardware might prefetch bytes from
+ * memory into its FIFO and not send
This DMA driver is used by 8250-omap on DRA7-evm. There is one
requirement that is to pause a transfer. This is currently used on the RX
side. It is possible that the UART HW aborted the RX (UART's RX-timeout)
but the DMA controller starts the transfer shortly after.
Before we can manually purge
* Russell King - ARM Linux | 2015-08-07 17:26:48 [+0100]:
On Fri, Aug 07, 2015 at 05:36:05PM +0200, Sebastian Andrzej Siewior wrote:
+/*
+ * We do not allow DMA_MEM_TO_DEV transfers to be paused.
+ * According to RMK the OMAP hardware might prefetch bytes
On Fri, Aug 07, 2015 at 07:55:48PM +0200, Sebastian Andrzej Siewior wrote:
/*
* We do not allow DMA_MEM_TO_DEV transfers to be paused.
* From the AM572x TRM, 16.1.4.18 Disabling a Channel During Transfer:
* When a channel is disabled during a transfer, the channel undergoes
* an abort,
