On 06/12/2013 06:47 PM, Mark Brown wrote:
On Tue, Jun 11, 2013 at 08:09:15PM +0300, Illia Smyrnov wrote:
The MCSPI controller has a built-in FIFO buffer to unload the DMA or interrupt
handler and improve data throughput. This patch adds FIFO buffer support for SPI
transfers in DMA mode.
On Tue, Jun 11, 2013 at 08:09:15PM +0300, Illia Smyrnov wrote:
The MCSPI controller has a built-in FIFO buffer to unload the DMA or interrupt
handler and improve data throughput. This patch adds FIFO buffer support for
SPI
transfers in DMA mode.
The FIFO could be enabled for SPI module by
The MCSPI controller has a built-in FIFO buffer to unload the DMA or interrupt
handler and improve data throughput. This patch adds FIFO buffer support for SPI
transfers in DMA mode.
The FIFO could be enabled for SPI module by setting up the ti,spi-fifo-enabled
configuration parameter in DT.
If
