On Mon, 30 Sep 2013, Sricharan R wrote:
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 1760ceb..c5778ab 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -72,6 +72,8 @@ struct gic_chip_data {
static
On Sep 30, 2013, at 8:59 AM, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input
Hi Thomas,
Thanks a lot for reviewing this.
On Thursday 24 October 2013 02:42 PM, Thomas Gleixner wrote:
On Mon, 30 Sep 2013, Sricharan R wrote:
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 1760ceb..c5778ab 100644
--- a/drivers/irqchip/irq-gic.c
+++
On Thursday 24 October 2013 03:08 PM, Kumar Gala wrote:
On Sep 30, 2013, at 8:59 AM, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and
On Mon, Sep 30, 2013 at 4:16 PM, Marc Zyngier marc.zyng...@arm.com wrote:
On 30/09/13 14:59, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input line.
The DT entries for peripherals provides the
On 30/09/13 14:59, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
crossbar routes that to one of the free gic input line.
The
On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote:
On 30/09/13 14:59, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated with a fixed crossbar input line and the
On 30/09/13 15:22, Santosh Shilimkar wrote:
On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote:
On 30/09/13 14:59, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
interrupts are associated
On Monday 30 September 2013 07:52 PM, Santosh Shilimkar wrote:
On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote:
On 30/09/13 14:59, Sricharan R wrote:
In some socs the gic can be preceded by a crossbar IP which
routes the peripheral interrupts to the gic inputs. The peripheral
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