-sricharan, as the email ID is defunct.
On 12/11/2014 02:43 PM, Lennart Sorensen wrote:
On Thu, Dec 11, 2014 at 03:41:16PM -0500, Lennart Sorensen wrote:
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back
On Fri, Dec 12, 2014 at 11:37:41AM -0600, Nishanth Menon wrote:
-sricharan, as the email ID is defunct.
So I noticed.
On 12/11/2014 02:43 PM, Lennart Sorensen wrote:
On Thu, Dec 11, 2014 at 03:41:16PM -0500, Lennart Sorensen wrote:
Errata i856 for the AM572x (DRA7xx) points out that the
On 14:23-20141212, Lennart Sorensen wrote:
I was trying to avoid making the code mroe complicated for the other
CPUs using this code, but I suppose since it runs only at boot once,
that probably isn't really a great concern.
we try and avoid soc_is or cpu_is as much as possible and depend
On Fri, Dec 12, 2014 at 01:40:01PM -0600, Nishanth Menon wrote:
we try and avoid soc_is or cpu_is as much as possible and depend usually
on compatible to mark the change..
Well you can't use the dtb really, since it depends on the chip revision
and how it started at power on. After all if you
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually
20MHz on boards so far (which gives an emulated frequency of 32.786KHz),
On Thu, Dec 11, 2014 at 03:41:16PM -0500, Lennart Sorensen wrote:
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually
20MHz
