+ Afzal who has been doing quite a bit of GMPC work recently.
On Fri, May 18, 2012 at 10:13 AM, Ming Lei ming@canonical.com wrote:
The IRQ52 on OMAP2+ is not a shared interrupt line. If IRQF_SHARED
is passed to request_irq and dev_id is set as NULL, request_irq will
return -EINVAL.
GPMC
Hi Santosh,
On Fri, May 18, 2012 at 12:33:16, Shilimkar, Santosh wrote:
+ Afzal who has been doing quite a bit of GMPC work recently.
On Fri, May 18, 2012 at 10:13 AM, Ming Lei ming@canonical.com wrote:
The IRQ52 on OMAP2+ is not a shared interrupt line. If IRQF_SHARED
is passed to
On Fri, May 18, 2012 at 12:46 PM, Mohammed, Afzal af...@ti.com wrote:
Hi Santosh,
On Fri, May 18, 2012 at 12:33:16, Shilimkar, Santosh wrote:
+ Afzal who has been doing quite a bit of GMPC work recently.
On Fri, May 18, 2012 at 10:13 AM, Ming Lei ming@canonical.com wrote:
The IRQ52 on
Hi,
On Fri, May 18, 2012 at 3:19 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
:
Are you sure it fails ?
[1.778930] GPMC revision 6.0
[1.782226] gpmc: irq-52 could not claim: err -22
Thanks for the reference. removing SHARED flag is not solution and
yes, you might have to
On Fri, May 18, 2012 at 1:10 PM, Ming Lei ming@canonical.com wrote:
Hi,
On Fri, May 18, 2012 at 3:19 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
:
Are you sure it fails ?
[ 1.778930] GPMC revision 6.0
[ 1.782226] gpmc: irq-52 could not claim: err -22
Afzal pointed me
On Fri, May 18, 2012 at 3:43 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
Is the gpmc a shared interrupt line? SHARED is not needed at all for
non shared interrupt line in hardware.
The line is shared.
If so, dev_id should be added. But sorry, could you let me know
what other
On Fri, May 18, 2012 at 2:34 PM, Ming Lei ming@canonical.com wrote:
On Fri, May 18, 2012 at 3:43 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
Is the gpmc a shared interrupt line? SHARED is not needed at all for
non shared interrupt line in hardware.
The line is shared.
If
Hi Santosh,
On Fri, May 18, 2012 at 15:43:31, Shilimkar, Santosh wrote:
On the side note, looks like GMPC too needs to be converted
to sparse IRQ since it seems to be creating a dummy irqchip
and dispatching secondary handlers based on chip selects.
GPMC dummy chip is being modified to so
On Fri, May 18, 2012 at 4:21 PM, Mohammed, Afzal af...@ti.com wrote:
Hi Santosh,
On Fri, May 18, 2012 at 15:43:31, Shilimkar, Santosh wrote:
On the side note, looks like GMPC too needs to be converted
to sparse IRQ since it seems to be creating a dummy irqchip
and dispatching secondary
Hi,
On Fri, May 18, 2012 at 6:13 PM, Shilimkar, Santosh
santosh.shilim...@ti.com wrote:
Generally IRQF_SHARED means, the interrupt line is only one but
multiple devices can generate the interrupts. If you connect
different devices on GMPC using chip selects like Ethernet controller,
Nand, NOR
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