n810 video

2010-10-30 Thread Maksim A. Boyko
Hi, I try to switch on OMAP2/3 Display Subsystem Support and Omap frame buffer support on n810 (commit 8b4b01). In OMAP2/3 Display Subsystem Support I used: CONFIG_OMAP2_VRAM_SIZE=4 CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y CONFIG_OMAP2_DSS_DPI=y CONFIG_OMAP2_DSS_VENC=y CONFIG_PANEL_GENERIC=y In Omap

Re: [PATCH v2] OMAP4: Extend clock database.

2010-10-30 Thread Paul Walmsley
Thara, On Wed, 27 Oct 2010, Thara Gopinath wrote: This patch extends the OMAP4 clock data to include various x2 clock nodes as the clock framework skips a *2 whie calculating the dpll locked frequency. The clock databse extensions are autogenerated using the scripts maintained by Benoit

[PATCH 00/39] Cleanup WARN #defines

2010-10-30 Thread Joe Perches
WARN uses sometimes use KERN_level but mostly don't have any prefix. Change the WARN macros and the warn_slowpath function to preface KERN_WARNING and remove all the KERN_level uses from WARN sites. Neatening clean up of include/asm-generic/bug.h Update WARN macros Add KERN_WARNING to WARN

[PATCH 23/39] drivers/video/omap2/dss: Update WARN uses

2010-10-30 Thread Joe Perches
Add missing initial argument. Coalesce long formats. Signed-off-by: Joe Perches j...@perches.com --- drivers/video/omap2/dss/core.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c index 8e89f60..2a98237

[PATCH 03/39] arch/arm: Update WARN uses

2010-10-30 Thread Joe Perches
Coalesce long formats. Align arguments. Add missing newlines. Signed-off-by: Joe Perches j...@perches.com --- arch/arm/mach-davinci/clock.c |4 +- arch/arm/mach-davinci/da830.c |2 +- arch/arm/mach-davinci/da850.c | 12 - arch/arm/mach-omap2/clkt_clksel.c | 12

[PATCH RFC] usb: musb: fail unaligned DMA transfers on v1.8 and above

2010-10-30 Thread Anand Gadiyar
The Inventra DMA engine in version 1.8 and later of the MUSB controller cannot handle DMA addresses that are not aligned to a 4 byte boundary. It ends up ignoring the last two bits programmed in the DMA_ADDR register. This is a deliberate design change in the controller and is documented in the

Re: [Question] which type of DMA taken by musb of beagle-xM(DM3730)?

2010-10-30 Thread Anand Gadiyar
On 10/28/2010 11:36 AM, Ming Lei wrote: Another question, musb_read_fifo and musb_write_fifo need to be fixed to use 32bit operation only alike am35x? Nope - that limitation is only in certain AM35x SoCs. OMAP36xx/37xx are not affected. - Anand -- To unsubscribe from this list: send the

Re: [Question] which type of DMA taken by musb of beagle-xM(DM3730)?

2010-10-30 Thread Anand Gadiyar
On 10/27/2010 11:27 AM, Ming Lei wrote: 2010/10/27 Anand Gadiyargadi...@ti.com: On 10/27/2010 10:55 AM, Ming Lei wrote: 2010/10/27 Ming Leitom.leim...@gmail.com: Hi Gadiyar, Thanks for your reply. 2010/10/27 Gadiyar, Anandgadi...@ti.com: On Wed, Oct 27, 2010 at 5:54 AM, Ming