Hi Tony,
On Fri, Jun 15, 2012 at 11:12:46, Mohammed, Afzal wrote:
But I am unable to find reason for failure upon using
gpmc_ticks_to_ns(1), which seems to me right thing to be used.
Let me try to invoke tusb6010 functions in beagle board,
observe timings so that at least I will get an idea
Hi Jon,
On Thu, Jun 14, 2012 at 23:23:48, Hunter, Jon wrote:
On 06/14/2012 12:40 AM, Mohammed, Afzal wrote:
During gpmc driver probe, it will configure all the connected peripherals,
if configuration details are not present at that point of time, gpmc driver
will cry out saying that
On Thu, Jun 14, 2012 at 9:18 PM, Greg Kroah-Hartman
gre...@linuxfoundation.org wrote:
On Thu, Jun 14, 2012 at 03:59:24PM +0530, Santosh Shilimkar wrote:
From: Aneesh V ane...@ti.com
Device tree support for the EMIF driver.
Reviewed-by: Benoit Cousson b-cous...@ti.com
Reviewed-by:
On Thu, 14 Jun 2012, Jon Hunter wrote:
On 06/14/2012 10:17 AM, Guennadi Liakhovetski wrote:
Hi all
Sorry for jumping in so late in the game. But I think, the model, to which
this discussion is slowly converging, is not very well suitable for the
shdma DMACs, present on SH and ARM
On Thursday 14 June 2012, Jon Hunter wrote:
On 06/14/2012 06:48 AM, Arnd Bergmann wrote:
On Wednesday 13 June 2012, Jon Hunter wrote:
So in that case, I don't see why the first cell after the phandle could
not be an index which could be either a direction or request-id and then
the next
On Thursday 14 June 2012, Jon Hunter wrote:
Generic DMACs can perform memory-to-memory DMA, USB DMACs cannot.
Generic DMACs can serve any slave (peripheral) request line on any their
physical channel, USB DMACs only serve fixed USB controller instances. To
configure (connect) a
On 6/15/2012 1:02 AM, Paul Walmsley wrote:
On Thu, 14 Jun 2012, Cousson, Benoit wrote:
Yep, but for that I'd rather add a flag than a information that is a
duplication of the parent data.
Great, send a patch.
Cool.
Well, in fact the HWMOD_EXT_OPT_MAIN_CLK patch is already good enough
Hi Arnd
On Fri, 15 Jun 2012, Arnd Bergmann wrote:
On Thursday 14 June 2012, Jon Hunter wrote:
Generic DMACs can perform memory-to-memory DMA, USB DMACs cannot.
Generic DMACs can serve any slave (peripheral) request line on any their
physical channel, USB DMACs only serve fixed
Hello Konstantin,
Sorry for the delayed reply.
On Thu, Jun 14, 2012 at 4:50 PM, Konstantin Baydarov
kbaida...@dev.rtsoft.ru wrote:
Hi.
On 05/29/2012 01:44 PM, Eduardo Valentin wrote:
On Fri, May 25, 2012 at 02:30:44PM +0200, Cousson Benoit wrote:
On 5/25/2012 10:25 AM, Eduardo Valentin
Hi,
* Stephen Warren swar...@wwwdotorg.org [120614 16:16]:
On 06/11/2012 07:58 AM, Tony Lindgren wrote:
Add one-register-per-pin type device tree based pinctrl driver.
Currently this driver only works on omap2+ series of processors,
where there is either an 8 or 16-bit padconf register
Hi Jon,
On Fri, Jun 15, 2012 at 00:28:44, Hunter, Jon wrote:
On 06/14/2012 08:32 AM, Mohammed, Afzal wrote:
On Thu, Jun 14, 2012 at 18:52:55, Hunter, Jon wrote:
Why? You currently have a global variable storing the clock handle. It
can be quite common for drivers to know the clock
Hi Jon,
On Fri, Jun 15, 2012 at 02:21:50, Hunter, Jon wrote:
On 06/14/2012 01:17 AM, Mohammed, Afzal wrote:
gpmc_cs_set_timings() does currently convert time to clock cycles required,
and this gpmc driver have the capability to do it.
What I was saying is a different issue, input to
* Mohammed, Afzal af...@ti.com [120614 23:20]:
Hi Tony,
On Fri, Jun 15, 2012 at 11:12:46, Mohammed, Afzal wrote:
But I am unable to find reason for failure upon using
gpmc_ticks_to_ns(1), which seems to me right thing to be used.
Let me try to invoke tusb6010 functions in beagle board,
Hi Tony,
On Fri, Jun 15, 2012 at 16:15:43, Tony Lindgren wrote:
something yesterday when manually patching the clk_activation, maybe
I put the clk_activation value into async timings instead as I was
seeing the tick value set to 0 for the sync mode.
I too thought like that initially, but
Hi Jon,
On Fri, Jun 15, 2012 at 02:36:26, Hunter, Jon wrote:
On 06/14/2012 03:48 AM, Mohammed, Afzal wrote:
What I meant is we are not dependent on absolute value of flag to
find waitpin, and I disagree in depending on its absolute value,
which can change, while flag would be the same.
Hi Tony,
On Wed, Jun 13, 2012 at 18:03:05, Tony Lindgren wrote:
Cool, yeah looks like the old interface almost works. I had to undo the
new additions for tusb6010 DMA to work as below. Then Jon has some good
comments. I also made few comments to the GPMC using driver changes.
Thanks and
Hi!
Added Paul in Cc:.
On Thu, Jun 14, 2012 at 10:05 AM, Jean Pihet jean.pi...@newoldbits.com wrote:
Hi Richard, all,
On Tue, Jun 12, 2012 at 6:34 PM, Woodruff, Richard r-woodru...@ti.com wrote:
Hi Tony,
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Friday, May 25, 2012 2:53 AM
Hi,
Here are some remarks I got after an internal review. I think those
points need to be discussed with a broader audience.
On Thu, Jun 14, 2012 at 4:53 PM, Jean Pihet jean.pi...@newoldbits.com wrote:
Introduce functional (or logical) states for power domains and the
API functions to read the
On Friday 15 June 2012, Guennadi Liakhovetski wrote:
In the common case, you could have one device connected to the third
slave ID of the first controller but the fifth slave ID of the
second controller. In this case, you really have to specify each
controller with its slave ID separately,
Hi,
Here are some remarks I got after an internal review. I think those
points need to be discussed with a broader audience.
On Thu, Jun 14, 2012 at 4:53 PM, Jean Pihet jean.pi...@newoldbits.com wrote:
Note: the patch is in RFC state because the state machine for setting
the next power domain
Hi,
Here are some remarks I got after an internal review. I think those
points need to be discussed with a broader audience.
On Thu, Jun 14, 2012 at 5:05 PM, Jean Pihet jean.pi...@newoldbits.com wrote:
When a PM QoS device latency constraint is requested or removed the
constraint is stored in
On Tue, Jun 12, 2012 at 6:28 PM, Munegowda, Keshava
keshava_mgo...@ti.com wrote:
hi kevin
now I am using initramfs with kernel linux3.5.rc1,
but the retention is not working in 3430 sdp. I am seeing the following
error followed by a crash
echo mem /sys/power/state
[ 35.609252]
* Mohammed, Afzal af...@ti.com [120615 03:26]:
Hi Jon,
On Fri, Jun 15, 2012 at 00:28:44, Hunter, Jon wrote:
On 06/14/2012 08:32 AM, Mohammed, Afzal wrote:
On Thu, Jun 14, 2012 at 18:52:55, Hunter, Jon wrote:
Why? You currently have a global variable storing the clock handle. It
Someone may have spotted this already...
But if you build todays linux-next (next-20120615) without
CONFIG_MTD_ONENAND_OMAP2 or
CONFIG_MTD_ONENAND_OMAP2_MODULE then board_onenand_init() is defined in two
places
(in board-flash.c:102 as an empty function, and board-flash.h:56 as a static
* Mohammed, Afzal af...@ti.com [120615 04:00]:
On Wed, Jun 13, 2012 at 18:03:05, Tony Lindgren wrote:
And we need the device tree bindings for GPMC so we can start dropping
board-*.c files as the GPMC seems to be last remaining blocker for
making rarely used legacy boards DT only. So
Hi Paul,
On 6/15/2012 2:18 AM, Paul Walmsley wrote:
On Thu, 14 Jun 2012, Cousson, Benoit wrote:
On 6/14/2012 8:04 PM, Paul Walmsley wrote:
On Thu, 14 Jun 2012, Cousson, Benoit wrote:
(attribution lost)
Furthermore, the PRCM will never request target idle for this IP block
while the
If the kernel is built only for OMAP2 the following warning will show up:
arch/arm/mach-omap2/twl-common.c:52: warning: ‘twl_set_voltage’ defined but not
used
arch/arm/mach-omap2/twl-common.c:58: warning: ‘twl_get_voltage’ defined but not
used
The twl_set/get_voltage callbacks only used when
Hi Keshava,
On Fri, Jun 15, 2012 at 2:04 PM, Munegowda, Keshava
keshava_mgo...@ti.com wrote:
On Tue, Jun 12, 2012 at 6:28 PM, Munegowda, Keshava
keshava_mgo...@ti.com wrote:
hi kevin
now I am using initramfs with kernel linux3.5.rc1,
but the retention is not working in 3430 sdp. I
Hi Paul,
On 06/14/2012 03:31 PM, Paul Walmsley wrote:
Hi Jon
On Tue, 5 Jun 2012, Jon Hunter wrote:
The OMAP dmtimer driver allows you to dynamically configure the functional
clock that drives the timer logic. The dmtimer driver uses the device name
and
a con-id string to search for the
Hi Paul,
On 06/14/2012 07:20 PM, Paul Walmsley wrote:
On Thu, 14 Jun 2012, Jon Hunter wrote:
What does make this a bit more difficult is the function
gpmc_round_ns_to_ticks(). It appears to convert nanoseconds to ticks and
back to nanoseconds. I am guessing to account for some rounding
On 06/15/2012 03:49 AM, Tony Lindgren wrote:
(Arnd, Grant, Rob, CC'ing you mainly re: the very last set of comments
in this email; can you take a look at Tony's patch and comment on the
binding)
* Stephen Warren swar...@wwwdotorg.org [120614 16:16]:
On 06/11/2012 07:58 AM, Tony Lindgren wrote:
On 6/15/2012 1:27 AM, Arnd Bergmann wrote:
On Friday 15 June 2012, Guennadi Liakhovetski wrote:
In the common case, you could have one device connected to the third
slave ID of the first controller but the fifth slave ID of the
second controller. In this case, you really have to specify each
We continue to try to sort this out. Ignoring the errors for a moment, has
anyone else experienced the performance slowdown quoted below between two EMACs?
If not, could anyone with two AM3517-baed platforms with the EMACs exposed
please test this for us? We've run several tests between all
From: Jassi Brar jaswinder.si...@linaro.org
Explicitly maintaining HDMI phy power state using a flag is prone to
race and un-necessary when we have a zero-cost alternative of checking
the state before trying to set it.
Signed-off-by: Jassi Brar jaswinder.si...@linaro.org
---
On 2012年06月14日 14:59, Zumeng Chen wrote:
于 2012年06月14日 14:31, Hiremath, Vaibhav 写道:
On Thu, Jun 14, 2012 at 10:16:55, Zumeng Chen wrote:
于 2012年06月13日 20:18, Hiremath, Vaibhav 写道:
On Wed, Jun 13, 2012 at 07:14:10, Zumeng Chen wrote:
From: Zumeng Chenzumeng.c...@windriver.com
If we don't set
On Tue, 5 Jun 2012, Jon Hunter wrote:
The OMAP dmtimer driver allows you to dynamically configure the functional
clock that drives the timer logic. The dmtimer driver uses the device name and
a con-id string to search for the appropriate functional clock.
Currently, we define a clock alias
Recent changes in omap_hwmod framework have reworked the behaviour
towards hardreset handling, commit 747834a (ARM: OMAP2+: hwmod:
revise hardreset behavior) recommends for drivers to implement
their own reset sequences until code out-of-tree hits mainline
and then their needs and code can be
Some IP blocks might not be using/controlling more than one
reset line, this check loosens the restriction to fully use
hwmod framework for those drivers.
E.g.: ipu has reset lines: mmu_cache, cpu0 and cpu1.
- cpu1 might not be used and hence (with previous check)
won't be fully enabled by
For a reset sequence to complete cleanly, a module needs its
associated clocks to be enabled, otherwise the timeout check
in prcm code can print a false failure (failed to hardreset)
that occurs because the clocks aren't powered ON and the status
bit checked can't transition without them.
This APIs are meant to be an interface to hwmod assert/deassert
function, omap devices can call them through their platform data
to control their reset lines, they are expected to know the name
of the reset line they are trying to control.
Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org
---
Introduced hwmod support for OMAP3 (iva, isp) and OMAP4 (ipu, dsp),
along with the corresponding runtime PM and routines to deassert reset
lines, enable/disable clocks and configure sysc registers.
Due to compatibility an ifdef needs to be propagated (previously on
iommu resource info) to hwmod
If included without IOMMU_API being selected it will break
compilation:
arch/arm/plat-omap/include/plat/iommu.h:
In function 'dev_to_omap_iommu':
arch/arm/plat-omap/include/plat/iommu.h:148:
error: 'struct dev_archdata' has no member named 'iommu'
This will be seen, when hwmod
Add mmu hwmod data for iva and isp.
Due to compatibility an ifdef CONFIG_OMAP_IOMMU_IVA2 needs to be
propagated (previously on iommu resource info) to hwmod data in OMAP3,
so users of iommu and tidspbridge can avoid issues of two modules
managing mmu data/irqs/resets; this until tidspbridge can
Add mmu hwmod data for ipu and dsp.
Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 136 +++-
1 files changed, 134 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
Use hwmod data and device attributes to build and register an
omap device for iommu driver.
- Update the naming convention in isp module.
- Remove unneeded check for number of resources, as this is now
handled by omap_device and prevents driver from loading.
- Now unused, remove platform
Recent changes in hwmod now require for drivers to handle reset
lines. Otherwise iommu initialization will fail.
Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org
---
arch/arm/mach-omap2/omap-iommu.c|6 ++
arch/arm/plat-omap/include/plat/iommu.h |6 ++
Use runtime PM functionality interfaced with hwmod enable/idle
functions, to replace direct clock operations and sysconfig
handling.
Due to reset sequence, pm_runtime_put_sync must be used, to avoid
possible operations with the module under reset.
Signed-off-by: Omar Ramirez Luna
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