Vaibhav == Vaibhav Bedia vaibhav.be...@ti.com writes:
Vaibhav Since AM33XX supports only DT-boot, this is needed
Vaibhav for the appropriate device nodes to be created.
Vaibhav Note: OCMC RAM is part of the PER power domain and supports
Vaibhav retention. The assembly code for low power
Vaibhav == Vaibhav Bedia vaibhav.be...@ti.com writes:
Vaibhav Hi,
Vaibhav The following patches were earlier posted as part the AM33XX
Vaibhav suspend-resume support series [1]. Based on the suggestion
Vaibhav from Santosh Shilimkar santosh.shilim...@ti.com i have split
Vaibhav out the
Hi Tony,
On 01/22/2013 11:07 AM, Peter Ujfalusi wrote:
Hi Tony,
The content of this pull:
update for audio support via omap-twl4030 and pwm updates in board level:
http://www.spinics.net/lists/linux-omap/msg85085.html
and zoom-peripherals update to not request the TWL GPIO7:
Hi Paul,
On Fri, Jan 25, 2013 at 17:48:22, Mohammed, Afzal wrote:
On Fri, Jan 25, 2013 at 13:48:11, Paul Walmsley wrote:
like MPU CPUFreq. I'd suggest reverting
241d3a8dca239610d3d991bf58d4fe38c2d86fd5 or using a similar approach.
As you prefer reverting the above commit, I will proceed
On Tue, 2013-01-29 at 01:42 +0530, Mugunthan V N wrote:
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -24,6 +24,8 @@ Required properties:
Optional properties:
- ti,hwmods: Must be cpgmac0
- no_bd_ram:
On Tue, Jan 29, 2013 at 13:50:44, Peter Korsgaard wrote:
Vaibhav == Vaibhav Bedia vaibhav.be...@ti.com writes:
Vaibhav Since AM33XX supports only DT-boot, this is needed
Vaibhav for the appropriate device nodes to be created.
Vaibhav Note: OCMC RAM is part of the PER power domain and
This series of patches attempts to manage the pl310 erratas dynamically rather
allowing platforms to choose them during build time.
A bit of information which triggered the cause for this series is here:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-December/138066.html
v2:
- The
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
Signed-off-by: srinidhi kasagar srinidhi.kasa...@stericsson.com
---
arch/arm/boot/dts/omap4.dtsi |1 +
arch/arm/include/asm/hardware/cache-l2x0.h |2 +-
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar santosh.shilim...@ti.com i have split
out the changes which update the various data files related
to AM33XX support.
These patches apply on top of
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the WKUP-M3 hwmod data to reflect the same.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v3: Add Peter's Acked-by
v2: No change
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1 +
cm33xx.h unnecessarily includes a lot of header files.
Get rid of these and directly include iomap.h which
is needed to keep things compiling.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v3:
Since AM33XX supports only DT-boot, this is needed
for the appropriate device nodes to be created.
Note: OCMC RAM is part of the PER power domain and supports
retention. The assembly code for low power entry/exit will
run from OCMC RAM. To ensure that the OMAP PM code does not
attempt to disable
OCMC RAM lies in the PER power domain and this memory
support retention.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v3: Add Peter's Acked-by
v2: No change
Add minimal APIs for writing to the IPC and the M3_TXEV registers
in the Control module. These will be used in a subsequent patch which
adds suspend-resume support for AM33XX.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter
Third Party Transfer Controller (TPTC0) needs to be idled and
put to standby under SW control. Add the appropriate flags in
the TPTC0 hwmod entry.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
The current HWMOD code expects the memory region with
the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT
flag.
CPGMAC0 hwmod entry specifies two memory regions and marks
both with the flag ADDR_TYPE_RT although only the 2nd region
has the SYSCONFIG register. This leads to the HWMOD code
This is necessary to ensure that macros declared here can
be reused from assembly files.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v3: Add Peter's Acked-by
v2: No change
WKUP-M3 has a reset status bit (RM_WKUP_STST.WKUP_M3_LRST)
Update the hardreset API to ensure that the reset line properly
deasserted.
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Peter Korsgaard jac...@sunsite.dk
---
v3: Add
Vaibhav,
On Tuesday 29 January 2013 04:44 PM, Vaibhav Bedia wrote:
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar santosh.shilim...@ti.com i have split
out the changes which update the various
On Tue, Jan 29, 2013 at 03:40:38PM +0530, srinidhi kasagar wrote:
- Added l2x0_quirks to manage the errata in cpu_idle path. Tried to address
Russell's comment on this, but could not completely. Because, neither I can
keep the #ifdef CONFIG_PL310_ERRATA_769419 nor remove it entirely since
On Tue, Jan 29, 2013 at 16:57:04, Shilimkar, Santosh wrote:
Vaibhav,
On Tuesday 29 January 2013 04:44 PM, Vaibhav Bedia wrote:
Hi,
The following patches were earlier posted as part the AM33XX
suspend-resume support series [1]. Based on the suggestion
from Santosh Shilimkar
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
This patch makes no sense.
So, if setting 'smc' in the DT description is supposed to mean that
the platform has a secure monitor
On Tue, Jan 29, 2013 at 12:33:25 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
This patch makes no sense.
So, if setting 'smc' in
On Tue, Jan 29, 2013 at 05:08:53PM +0530, Srinidhi Kasagar wrote:
On Tue, Jan 29, 2013 at 12:33:25 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which
On 1/28/2013 6:41 PM, Pantelis Antoniou wrote:
Fix interrupt storm on bone A4 cause by non-by-the-book interrupt handling.
While at it, added a non-NAPI mode (which is easier to debug), plus
some general fixes.
Signed-off-by: Pantelis Antoniou pa...@antoniou-consulting.com
---
On Tue, Jan 29, 2013 at 12:33:25 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
This patch makes no sense.
So, if setting 'smc' in
On 1/29/2013 3:18 PM, Jan Lübbe wrote:
On Tue, 2013-01-29 at 01:42 +0530, Mugunthan V N wrote:
--- a/Documentation/devicetree/bindings/net/cpsw.txt
+++ b/Documentation/devicetree/bindings/net/cpsw.txt
@@ -24,6 +24,8 @@ Required properties:
Optional properties:
- ti,hwmods: Must
On Tue, Jan 29, 2013 at 05:19:27PM +0530, Srinidhi Kasagar wrote:
On Tue, Jan 29, 2013 at 12:33:25 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which
On 1/29/2013 1:06 PM, Richard Cochran wrote:
On Tue, Jan 29, 2013 at 01:42:25AM +0530, Mugunthan V N wrote:
@@ -947,6 +1042,10 @@ static const struct net_device_ops cpsw_netdev_ops = {
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller= cpsw_ndo_poll_controller,
#endif
On Wednesday 23 January 2013 12:02 AM, Tony Lindgren wrote:
* Benoit Cousson b-cous...@ti.com [130122 04:59]:
Hi Tony,
On 01/21/2013 07:01 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [130121 07:09]:
So I looked at this one with help of Rajendra. We can get rid of
The BeagleBone dev kit uses the built-in RTC module, so
it would be nice to have this built by default in the
omap2plus defconfig.
Signed-off-by: Mark Jackson m...@newflow.co.uk
---
arch/arm/configs/omap2plus_defconfig |1 +
1 file changed, 1 insertion(+)
diff --git
Hi Srinidhi,
On Tuesday 29 of January 2013 15:43:31 srinidhi kasagar wrote:
Add 'smc' (Secure Monitor Call) identifier to differentiates
the platforms which implements this.
Signed-off-by: srinidhi kasagar srinidhi.kasa...@stericsson.com
---
arch/arm/boot/dts/omap4.dtsi
Hi,
The following patches update cpuinfo to print CPU
model name for ARM. First patch exactly makes needed
changes for ARM architecture.
Second patch adds this ability to OMAP4 SoCs.
This adds a common approach to show SoC name.
Looks like there were few attempts to do similar
changes to
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or how to configure some specific (and processor-depended)
settings or so.
However, since really different SoCs can share
Set up the CPU model name during OMAP ID initialisation
so it will be displayed in /proc/cpuinfo:
/ # cat proc/cpuinfo
processor : 0
model name : ARMv7 Processor rev 10 (v7l)
BogoMIPS: 1590.23
Features: swp half thumb fastmult vfp edsp thumbee neon vfpv3 tls
CPU
On 17:54-20130129, Ruslan Bilovol wrote:
Hi,
The following patches update cpuinfo to print CPU
model name for ARM. First patch exactly makes needed
changes for ARM architecture.
Second patch adds this ability to OMAP4 SoCs.
This adds a common approach to show SoC name.
Looks like
On Tue, Jan 29, 2013 at 05:54:24PM +0200, Ruslan Bilovol wrote:
CPU implementer : 0x41
CPU name: OMAP4470 ES1.0 HS
Sigh. No. Look at what you're doing - look carefully at the above.
CPU implementer - 0x41. That's A. For ARM Ltd. ARM Ltd implemented
this CPU. Did ARM Ltd really
On 01/29/2013 09:54 AM, Ruslan Bilovol wrote:
Hi,
The following patches update cpuinfo to print CPU
model name for ARM. First patch exactly makes needed
changes for ARM architecture.
Second patch adds this ability to OMAP4 SoCs.
This adds a common approach to show SoC name.
Looks like
On 01/29/2013 03:53 AM, Łukasz Góralczyk wrote:
Hello,
Some background:
Recently I've ported Linux to some custom omap1 based (5940 or 1510)
hardware. I've had some initial problems, but after a dirty fix I
have a running kernel and I can boot using NFS.
Do you mean 5910? I am not
One more iteration.. now with more cowbell!
The first patch adds the basic driver and TFP410 DVI output.
The second patch adds support for NXP TDA998x family of i2c connected
HDMI encoders. It is split out into an i2c encoder-slave in case someone
else has hw with the same HDMI encoder.
The
Add output panel driver for i2c encoder slaves.
v1: original
v2: add DT bindings docs, and minor updates for review comments
Signed-off-by: Rob Clark robdcl...@gmail.com
Reviewed-by: Daniel Vetter daniel.vet...@ffwll.ch
Tested-by: Koen Kooi k...@dominion.thruhere.net
---
Add an output panel driver for LCD panels. Tested with LCD3 cape on
beaglebone.
v1: original
v2: s/of_find_node_by_name()/of_get_child_by_name()/ from Pantelis
Antoniou
v3: add backlight support
v4: rebase to latest of video timing helpers
v5: remove some unneeded fields from panel-info
* Santosh Shilimkar santosh.shilim...@ti.com [130129 05:59]:
OK so we do managed to clean up the address space, IRQ lines
and DMA request lines data from hwmod completely.
-OMAP5 hwmod data file, 2076 lines we could remove which significant
reduction. I ran the same scripts on OMAP4 and
Driver for the NXP TDA998X i2c hdmi encoder slave.
v1: original
v2: fix npix/nline programming
v3: add Kconfig, fix dup'd MODULE_DESCRIPTION
Signed-off-by: Rob Clark robdcl...@gmail.com
Reviewed-by: Daniel Vetter daniel.vet...@ffwll.ch
Tested-by: Koen Kooi k...@dominion.thruhere.net
---
2013/1/29 Jon Hunter jon-hun...@ti.com
On 01/29/2013 03:53 AM, Łukasz Góralczyk wrote:
Hello,
Some background:
Recently I've ported Linux to some custom omap1 based (5940 or 1510)
hardware. I've had some initial problems, but after a dirty fix I
have a running kernel and I can boot
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed and
selecting the first available timer found. Hence, for the OMAP3 beagle
board timer-12 is not being
Hi,
(redacted irrelevant code sections)
On Wed, 12 Dec 2012, Jean Pihet wrote:
On Sun, Dec 9, 2012 at 2:23 AM, Paul Walmsley p...@pwsan.com wrote:
-/**
- * pwrdm_set_lowpwrstchange - Request a low power state change
- * @pwrdm: struct powerdomain *
- *
- * Allows a powerdomain to
Hi
On Wed, 12 Dec 2012, Jean Pihet wrote:
On Sun, Dec 9, 2012 at 2:23 AM, Paul Walmsley p...@pwsan.com wrote:
Add a per-powerdomain spinlock. Use that instead of the clockdomain
spinlock. Add pwrdm_lock()/pwrdm_unlock() functions to allow other
code to acquire or release the
Hi
(redacted some context)
On Wed, 12 Dec 2012, Jean Pihet wrote:
On Sun, Dec 9, 2012 at 6:53 PM, Paul Walmsley p...@pwsan.com wrote:
+/**
+ * _match_pwrst: determine the closest supported power state
+ * @pwrsts: list of allowed states, defined as a bitmask
+ * @pwrst: initial state
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tony,
The following changes since commit 949db153b6466c6f7cad5a427ecea94985927311:
Linux 3.8-rc5 (2013-01-25 11:57:28 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tony,
The following changes since commit 949db153b6466c6f7cad5a427ecea94985927311:
Linux 3.8-rc5 (2013-01-25 11:57:28 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
Hi,
On Tue, Jan 29, 2013 at 6:02 PM, Nishanth Menon n...@ti.com wrote:
On 17:54-20130129, Ruslan Bilovol wrote:
Hi,
The following patches update cpuinfo to print CPU
model name for ARM. First patch exactly makes needed
changes for ARM architecture.
Second patch adds this ability
Hi,
On Tue, Jan 29, 2013 at 6:08 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Jan 29, 2013 at 05:54:24PM +0200, Ruslan Bilovol wrote:
CPU implementer : 0x41
CPU name: OMAP4470 ES1.0 HS
Sigh. No. Look at what you're doing - look carefully at the above.
CPU
On 01/28/2013 03:12 PM, Mugunthan V N wrote:
Add helper functions for VLAN ALE implementations for Add, Delete
Dump VLAN related ALE entries
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
drivers/net/ethernet/ti/cpsw_ale.c | 172 ++--
On 01:08-20130130, Ruslan Bilovol wrote:
Hi,
On Tue, Jan 29, 2013 at 6:02 PM, Nishanth Menon n...@ti.com wrote:
On 17:54-20130129, Ruslan Bilovol wrote:
Hi,
The following patches update cpuinfo to print CPU
model name for ARM. First patch exactly makes needed
changes for ARM
Hi Antonio,
On Monday 28 January 2013 13:22:10 Antonio Ospite wrote:
Hi,
looking at the MIPI Alliance Specification for Camera Serial Interface
2 (I'll call it MIPI-CSI2 from now on, the document I am referring to
is mentioned at [1] and available at [2]), I see there is an YUV420 8
bit
The following patches update cpuinfo to print SoC
model name for ARM.
The first patch exactly makes needed changes for ARM
architecture and adds a common approach to show SoC name.
Second patch uses this approach for OMAP4 SoCs (as live
example).
Looks like there were few attempts to do similar
Currently, reading /proc/cpuinfo provides userspace with CPU ID of
the CPU carrying out the read from the file.
Userspace using this information may decide what module
to load or how to configure some specific (and processor-depended)
settings or so.
However, since really different SoCs can share
Set up the SoC model name during OMAP ID initialisation
so it will be displayed in /proc/cpuinfo:
/ # cat proc/cpuinfo
[...]
CPU variant : 0x2
CPU part: 0xc09
CPU revision: 10
SoC name: OMAP4470 ES1.0 HS
Hardware: OMAP4 Blaze Tablet
Revision: 20edb4
[...]
On 1/30/2013 5:08 AM, Cyril Chemparathy wrote:
On 01/28/2013 03:12 PM, Mugunthan V N wrote:
Add helper functions for VLAN ALE implementations for Add, Delete
Dump VLAN related ALE entries
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
drivers/net/ethernet/ti/cpsw_ale.c | 172
On Tue, Jan 29, 2013 at 13:22:56 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 05:19:27PM +0530, Srinidhi Kasagar wrote:
On Tue, Jan 29, 2013 at 12:33:25 +0100, Russell King - ARM Linux wrote:
On Tue, Jan 29, 2013 at 03:43:31PM +0530, srinidhi kasagar wrote:
Add 'smc'
On Tue, Jan 29, 2013 at 6:38 PM, Ruslan Bilovol ruslan.bilo...@ti.com wrote:
SoC name: OMAP4470 ES1.0 HS
I am sorry, but I have to NAK for specifically reasons explained in
http://marc.info/?l=linux-omapm=135950276616961w=2
I just dont think SoC information belongs in /proc/cpuinfo. nor
On Wednesday 30 January 2013 04:42 AM, Ruslan Bilovol wrote:
Hi,
On Tue, Jan 29, 2013 at 6:08 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Jan 29, 2013 at 05:54:24PM +0200, Ruslan Bilovol wrote:
CPU implementer : 0x41
CPU name: OMAP4470 ES1.0 HS
Sigh. No.
On Wednesday 30 January 2013 01:53 AM, Jon Hunter wrote:
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed and
selecting the first available timer found.
On Wednesday 30 January 2013 06:08 AM, Ruslan Bilovol wrote:
The following patches update cpuinfo to print SoC
model name for ARM.
The first patch exactly makes needed changes for ARM
architecture and adds a common approach to show SoC name.
Second patch uses this approach for OMAP4 SoCs (as
Hi Sourav,
On Mon, 2013-01-28 at 16:47 +0530, Sourav Poddar wrote:
Booting 3.8-rc4 om omap 4430sdp results in the following error
omap_i2c 4807.i2c: did not get pins for i2c error: -19
[1.024261] omap_i2c 4807.i2c: bus 0 rev0.12 at 100 kHz
[1.030181] omap_i2c 48072000.i2c:
On Wed, Jan 23, 2013 at 10:28:46PM +, Arnd Bergmann wrote:
On Tuesday 15 January 2013, Matt Porter wrote:
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
Hi Luciano,
On Wednesday 30 January 2013 11:55 AM, Luciano Coelho wrote:
Hi Sourav,
On Mon, 2013-01-28 at 16:47 +0530, Sourav Poddar wrote:
Booting 3.8-rc4 om omap 4430sdp results in the following error
omap_i2c 4807.i2c: did not get pins for i2c error: -19
[1.024261] omap_i2c
On Mon, Jan 28, 2013 at 09:27:24PM +0200, Andy Shevchenko wrote:
On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter mpor...@ti.com wrote:
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform data. Enables runtime PM support to
initialize the EDMA hwmod. Adds
Move mach-davinci/dma.c to common/edma.c so it can be used
by OMAP (specifically AM33xx) as well. This just moves the
private EDMA API and enables it to build on OMAP.
Signed-off-by: Matt Porter mpor...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
arch/arm/Kconfig
Fix build on OMAP, the irqs are undefined on AM33xx.
These error interrupt handlers were hardcoded as disabled
so since they are unused code, simply remove them.
Signed-off-by: Matt Porter mpor...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
arch/arm/common/edma.c | 37
Changes since v5:
- Dropped mmc portion and moved it to a separate series
- Incorporate corrected version of dma_request_slave_channel_compat()
- Fix #defines and enablement of TI_PRIV_EDMA option
Changes since v4:
- Fixed debug section mismatch in private edma api
Adds a dma_request_slave_channel_compat() wrapper which accepts
both the arguments from dma_request_channel() and
dma_request_slave_channel(). Based on whether the driver is
instantiated via DT, the appropriate channel request call will be
made.
This allows for a much cleaner migration of drivers
Adds DMA resources to the AM33XX SPI nodes.
Signed-off-by: Matt Porter mpor...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index e711ffb..ddf702a 100644
---
The binding definition is based on the generic DMA request binding
Signed-off-by: Matt Porter mpor...@ti.com
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 27 +++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git
Convert dmaengine channel requests to use
dma_request_slave_channel_compat(). This supports the DT case of
platforms requiring channel selection from either the OMAP DMA or
the EDMA engine. AM33xx only boots from DT and is the only user
implementing EDMA so in the !DT case we can default to the
Adds AM33XX EDMA support to the am33xx.dtsi as documented in
Documentation/devicetree/bindings/dma/ti-edma.txt
Signed-off-by: Matt Porter mpor...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter mpor...@ti.com
---
Documentation/devicetree/bindings/dma/ti-edma.txt | 49 +
1 file changed, 49 insertions(+)
create mode 100644
Enable TI EDMA option on OMAP.
Signed-off-by: Matt Porter mpor...@ti.com
---
drivers/dma/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 0b408bb..239020b 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform data. Enables runtime PM support to
initialize the EDMA hwmod. Adds AM33XX EMDA crossbar event mux
support.
Signed-off-by: Matt Porter mpor...@ti.com
Acked-by: Sekhar Nori nsek...@ti.com
---
On Wed, Jan 30, 2013 at 01:53:11, Hunter, Jon wrote:
Commit 9725f44 (ARM: OMAP: Add DT support for timer driver) added
device-tree support for selecting a clockevent timer by property.
However, the code is currently ignoring the property passed and
selecting the first available timer found.
On Wed, Jan 30, 2013 at 8:41 AM, Matt Porter mpor...@ti.com wrote:
On Mon, Jan 28, 2013 at 09:27:24PM +0200, Andy Shevchenko wrote:
On Tue, Jan 15, 2013 at 10:32 PM, Matt Porter mpor...@ti.com wrote:
Adds support for parsing the TI EDMA DT data into the required
EDMA private API platform
On Wed, Jan 30, 2013 at 11:22 AM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Wednesday 30 January 2013 04:42 AM, Ruslan Bilovol wrote:
Hi,
On Tue, Jan 29, 2013 at 6:08 PM, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Jan 29, 2013 at 05:54:24PM +0200, Ruslan
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