On 03/12/2013 06:07 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04:35 AM, Nishanth Menon wrote:
commit 5553f9e (cpufreq: instantiate cpufreq-cpu0 as a platform_driver)
now forces platform device to be registered for allowing cpufreq-cpu0
to be used by SoCs. example:
On 2013-03-12 16:01, Archit Taneja wrote:
On Tuesday 12 March 2013 07:07 PM, Tomi Valkeinen wrote:
So, I don't disagree with you. But I don't quite understand why we could
not use the fixed channels for now? They should work in all the boards
we have, right? Or is there something with DRM
On Tuesday 12 March 2013 07:58 PM, Benoit Cousson wrote:
On 03/12/2013 06:07 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04:35 AM, Nishanth Menon wrote:
commit 5553f9e (cpufreq: instantiate cpufreq-cpu0 as a platform_driver)
now forces platform device to be registered for allowing
On 15:24-20130312, Benoit Cousson wrote:
Hi Guys,
On 03/12/2013 06:03 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04:35 AM, Nishanth Menon wrote:
On certain SoCs like variants of OMAP, the clock conversion to DT
is not complete. In short, the ability to:
cpus {
cpu@0
On Tuesday 12 March 2013 07:36 PM, Tomi Valkeinen wrote:
On 2013-03-12 15:06, Archit Taneja wrote:
The omapdrm driver requires omapdss panel drivers to expose ops like detect,
set_timings and check_timings. These can be NULL for fixed panel DPI, DBI, DSI
and SDI drivers. At some places, there
On 03/12/2013 03:28 PM, Roger Quadros wrote:
On 03/12/2013 04:17 PM, Marc Kleine-Budde wrote:
On 03/12/2013 03:12 PM, Roger Quadros wrote:
On 03/12/2013 01:54 PM, Marc Kleine-Budde wrote:
On 03/12/2013 12:24 PM, Roger Quadros wrote:
Add clk_rate parameter to platform data. If supplied, the
On 15:28-20130312, Benoit Cousson wrote:
On 03/12/2013 06:07 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04:35 AM, Nishanth Menon wrote:
commit 5553f9e (cpufreq: instantiate cpufreq-cpu0 as a platform_driver)
now forces platform device to be registered for allowing cpufreq-cpu0
On 2013-03-12 16:38, Archit Taneja wrote:
memcmp on two structs is often not a good idea. There could be padding
bytes there, with uninitialized data. I'm not sure if that's the case
here, though, but it could well change any time (perhaps even depending
on compiler version).
I saw usage
On Tue, Mar 12, 2013 at 3:32 PM, kishon kis...@ti.com wrote:
Hi,
On Sunday 10 March 2013 06:37 AM, Grazvydas Ignotas wrote:
In some rare cases we may get multiple interrupts that will generate
duplicate omap_musb_mailbox() calls. This is a problem because each
VBUS/ID event generates
Hi Cliff,
On Tue, 12 Mar 2013, Cliff Brake wrote:
On Mon, Feb 20, 2012 at 12:58 PM, Richard Watts r...@kynesim.co.uk wrote:
There is an erratum in DM3730 which results in the
EHCI USB PLL (DPLL5) not updating sufficiently frequently; this
leads to USB PHY clock drift and once the clock
On Tuesday 12 March 2013 07:59 PM, Tomi Valkeinen wrote:
On 2013-03-12 16:01, Archit Taneja wrote:
On Tuesday 12 March 2013 07:07 PM, Tomi Valkeinen wrote:
So, I don't disagree with you. But I don't quite understand why we could
not use the fixed channels for now? They should work in all the
On Tue, Mar 12, 2013 at 3:37 PM, kishon kis...@ti.com wrote:
Hi,
On Sunday 10 March 2013 06:38 AM, Grazvydas Ignotas wrote:
On USB_EVENT_ID event the musb glue enables VBUS by calling
omap2430_musb_set_vbus(musb, 1) that sets the session bit, but on
USB_EVENT_NONE reverse action is never
...@vger.kernel.org; linux...@vger.kernel.org; linux-
o...@vger.kernel.org
Subject: Re: [PATCH 1/2] cpufreq: cpufreq-cpu0: support for clock which
are not in DT yet.
On 15:24-20130312, Benoit Cousson wrote:
Hi Guys,
On 03/12/2013 06:03 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04
On 03/12/2013 04:42 PM, Marc Kleine-Budde wrote:
On 03/12/2013 03:28 PM, Roger Quadros wrote:
On 03/12/2013 04:17 PM, Marc Kleine-Budde wrote:
On 03/12/2013 03:12 PM, Roger Quadros wrote:
On 03/12/2013 01:54 PM, Marc Kleine-Budde wrote:
On 03/12/2013 12:24 PM, Roger Quadros wrote:
Add
On 03/12/2013 03:43 PM, Nishanth Menon wrote:
On 15:28-20130312, Benoit Cousson wrote:
On 03/12/2013 06:07 AM, Santosh Shilimkar wrote:
On Tuesday 12 March 2013 04:35 AM, Nishanth Menon wrote:
commit 5553f9e (cpufreq: instantiate cpufreq-cpu0 as a platform_driver)
now forces platform device
On Tue, Mar 12, 2013 at 10:57 AM, Paul Walmsley p...@pwsan.com wrote:
Are you in a position to test whether the patch works for you?
I'd still like to find someone whose USB problem is fixed by the patch and
is willing to try a slight modification of it before applying...
Yes, I'm in a
I'm just fighting an issue with ethernet on our custom AM335x board:-
# uname -a
Linux nanobone 3.9.0-rc2-00113-gd60f039 #139 Tue Mar 12 15:14:01 GMT 2013
armv7l GNU/Linux
Every now and then, the whole unit slows to a crawl. The only indication of
any problem is:-
(a) the serial tty port
Has any more testing been done with this? We're running into a
situation where the USB subsystem crashes in a beagleboard xM after
running for a couple hours to a day. A USB camera is running
continuously during this time. The error message typically something
like:
[ 2817.415710] hub
On 10:17-20130312, J, KEERTHY wrote:
OK. My intent is to remove omap-cpufreq.c. So, I guess I could do
something like the following (not tested yet), but would that be the
right approach?
Similar attempt was done for am33xx_clks in this by Shawn:
http://www.mail-archive.com/linux-omap
On 12/03/13 15:35, Mark Jackson wrote:
I'm just fighting an issue with ethernet on our custom AM335x board:-
# uname -a
Linux nanobone 3.9.0-rc2-00113-gd60f039 #139 Tue Mar 12 15:14:01 GMT 2013
armv7l GNU/Linux
Every now and then, the whole unit slows to a crawl. The only indication of
On Tue, 12 Mar 2013, Roger Quadros wrote:
Even when not in PHY mode, the USB device on the port (e.g. HUB)
might need resources like RESET which can be modelled as a PHY
device. So try to get the PHY device in any case.
Signed-off-by: Roger Quadros rog...@ti.com
CC: Alan Stern
On Tue, 12 Mar 2013, Roger Quadros wrote:
The HSIC devices need to be kept in reset while the EHCI controller
is being initialized and only brought out of reset after the
initialization is complete, else HSIC devices will not be detected.
This is not a great description of what the patch
On Thu, Mar 07, 2013 at 08:42:18AM +0200, Andy Shevchenko wrote:
On Wed, Mar 6, 2013 at 6:15 PM, Matt Porter mpor...@ti.com wrote:
Adds support for parsing the TI EDMA DT data into the
required EDMA private API platform data. Enables runtime
PM support to initialize the EDMA hwmod. Adds
On 03/12/2013 04:20 PM, Roger Quadros wrote:
On 03/12/2013 04:42 PM, Marc Kleine-Budde wrote:
On 03/12/2013 03:28 PM, Roger Quadros wrote:
On 03/12/2013 04:17 PM, Marc Kleine-Budde wrote:
On 03/12/2013 03:12 PM, Roger Quadros wrote:
On 03/12/2013 01:54 PM, Marc Kleine-Budde wrote:
On
On Wed, Mar 06, 2013 at 08:24:06PM +, Peter Korsgaard wrote:
Matt == Matt Porter mpor...@ti.com writes:
Matt The binding definition is based on the generic DMA controller
Matt binding.
Matt Signed-off-by: Matt Porter mpor...@ti.com
Matt ---
Matt
Matt == Matt Porter mpor...@ti.com writes:
Hi,
Matt +edma: edma@4900 {
Matt +reg = 0x4900 0x1;
Matt +interrupt-parent = intc;
Matt +interrupts = 12 13 14;
Probably interrupt-parent should be removed from the example as well to
match am33xx.dtsi
On Tue, Mar 12, 2013 at 06:45:46AM +, Sekhar Nori wrote:
On 3/6/2013 9:45 PM, Matt Porter wrote:
Adds support for parsing the TI EDMA DT data into the
required EDMA private API platform data. Enables runtime
PM support to initialize the EDMA hwmod. Adds AM33XX EDMA
crossbar event
On Tue, Mar 12, 2013 at 06:53:03AM +, Sekhar Nori wrote:
On 3/6/2013 9:45 PM, Matt Porter wrote:
The binding definition is based on the generic DMA controller
binding.
Signed-off-by: Matt Porter mpor...@ti.com
Okay the bindings the documented after they are used leading to some
On Mon, Mar 11, 2013 at 3:51 AM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 03/11/2013 09:58 AM, Roger Quadros wrote:
IMHO the 'hack' in the twl-regulator should not have been removed before we
provide proper support for the clocks via the common clock framework.
I was surprised that
* Russell King - ARM Linux li...@arm.linux.org.uk [130312 07:25]:
I am removing almost all references to the above macro from arch/arm.
Many of them are wrong. Some of them are buggy.
For instance:
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
int div;
Here are some basic OMAP test results for Linux v3.9-rc1.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.9-rc1/20130312100243/
Test summary
Build:
FAIL ( 4/16): am33xx_only, omap1_defconfig,
omap1_defconfig_5912osk_only,
On Tue, 12 Mar 2013, Paul Walmsley wrote:
Here are some basic OMAP test results for Linux v3.9-rc1.
Logs and other details at:
http://www.pwsan.com/omap/testlogs/test_v3.9-rc1/20130312100243/
...
Boot to userspace:
FAIL ( 4/11): 2430sdp, 37xxevm, am335xbone, cmt3517
Pass (
Hi,
* Matthias Brugger matthias@gmail.com [130308 11:02]:
Hello Tony and Peter,
2013/2/19 Peter Ujfalusi peter.ujfal...@ti.com:
Hi Matthias,
On 02/15/2013 04:59 PM, Matthias Brugger wrote:
2013/2/1 Tony Lindgren t...@atomide.com:
Hi,
* Robert Nelson robertcnel...@gmail.com
On Mon, Mar 11, 2013 at 08:50:22AM +0100, Sebastien Guiriec wrote:
Update OMAP2+ driver in order to use OMAP DMA DT binding for OMAP2+.
In case of DT boot snd_dmaengine_generic_pcm_open function is used.
Applied, thanks.
signature.asc
Description: Digital signature
On Mon, Mar 11, 2013 at 05:58:57PM +0200, Silviu-Mihai Popescu wrote:
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
devm_ioremap_resource() provides its own error messages so all explicit
error
On Tue, Mar 12, 2013 at 11:33 AM, Cliff Brake cliff.br...@gmail.com wrote:
On Tue, Mar 12, 2013 at 10:57 AM, Paul Walmsley p...@pwsan.com wrote:
Are you in a position to test whether the patch works for you?
I'd still like to find someone whose USB problem is fixed by the patch and
is
Hi,
On Tue, Mar 12, 2013 at 04:40:19PM +, Paul Walmsley wrote:
* 2420N800: powers down 30 seconds after boot
- Presumably due to missing CBUS patches for watchdog control
- http://lkml.org/lkml/2012/9/3/265
- http://marc.info/?l=linux-omapm=135274739624125w=2
-
From: Thierry Reding [mailto:thierry.red...@avionic-design.de]
Sent: Tuesday, March 12, 2013 12:01 AM
To: Andrew Chew
Cc: peter.ujfal...@ti.com; Alex Courbot; linux-omap@vger.kernel.org
Subject: Re: [PATCH 1/1] ARM: OMAP: board-4430sdp: Provide regulator to
pwm-backlight
* PGP Signed by
Hello,
On Tue, Mar 12, 2013 at 02:16:04PM +, Russell King - ARM Linux wrote:
I am removing almost all references to the above macro from arch/arm.
Many of them are wrong. Some of them are buggy.
For instance:
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
On Tue, Mar 12, 2013 at 08:56:59PM +0100, Uwe Kleine-König wrote:
Hello,
On Tue, Mar 12, 2013 at 02:16:04PM +, Russell King - ARM Linux wrote:
I am removing almost all references to the above macro from arch/arm.
Many of them are wrong. Some of them are buggy.
For instance:
I'm struggling to get the latest kernel git to load on my beaglebone.
My build process is:-
$ make -j 8 ARCH=arm CROSS_COMPILE=arm-linux- distclean
$ make -j 8 ARCH=arm CROSS_COMPILE=arm-linux- omap2plus_defconfig
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_OMAP2PLUS_UART=y
CONFIG_DEBUG_AM33XXUART1=y
Hello Russell,
On Tue, Mar 12, 2013 at 08:22:38PM +, Russell King - ARM Linux wrote:
On Tue, Mar 12, 2013 at 08:56:59PM +0100, Uwe Kleine-König wrote:
Hello,
On Tue, Mar 12, 2013 at 02:16:04PM +, Russell King - ARM Linux wrote:
I am removing almost all references to the above
On 03/11/2013 09:42 PM, Kumar, Anil wrote:
On Mon, Mar 11, 2013 at 23:23:32, Hunter, Jon wrote:
On 03/08/2013 08:25 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon Hunter jon-hun...@ti.com wrote:
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of
Salut Benoit!
On 03/12/2013 06:00 AM, Benoit Cousson wrote:
+ Seb G.
Hi Jon,
How to you plan to merge that series?
Good question ... my thinking was that you or Tony would take 1/2 and
once that is queued then I would ask Tony to ack 2/2 and Vinod take that
patch.
By the way, I have
On 03/12/2013 02:54 AM, Andrew Chew wrote:
The pwm-backlight driver now takes a mandatory regulator that is
gotten during driver probe. Initialize a dummy regulator to satisfy
this requirement.
Can you point me to the commit which makes a regulator mandatory for
pwm-backlight?
Why the
Many backlights are enabled via GPIO. We can generalize the GPIO to a
fixed regulator.
The enable regulator needs to be mandatory because there was no good way
to determine the difference between opting out of the regulator, and probe
deferral.
This series of patches is intended to add a dummy
The pwm-backlight driver now takes a mandatory regulator that is gotten
during driver probe. Initialize a dummy regulator to satisfy this
requirement.
Signed-off-by: Andrew Chew ac...@nvidia.com
---
arch/arm/mach-omap2/board-4430sdp.c |5 +
1 file changed, 5 insertions(+)
diff --git
Many backlights need to be explicitly enabled. Typically, this is done
with a GPIO. For flexibility, we generalize the enable mechanism to a
regulator.
If an enable regulator is not needed, then a dummy regulator can be given
to the backlight driver. If a GPIO is used to enable the backlight,
On Tue, Mar 12, 2013 at 14:20:48, Javier Martinez Canillas wrote:
On Tue, Mar 12, 2013 at 3:42 AM, Kumar, Anil anilkuma...@ti.com wrote:
On Mon, Mar 11, 2013 at 23:23:32, Hunter, Jon wrote:
On 03/08/2013 08:25 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon
On Wed, Mar 13, 2013 at 02:57:04, Hunter, Jon wrote:
On 03/11/2013 09:42 PM, Kumar, Anil wrote:
On Mon, Mar 11, 2013 at 23:23:32, Hunter, Jon wrote:
On 03/08/2013 08:25 PM, Anil Kumar wrote:
Hi Jon,
On Fri, Mar 8, 2013 at 10:57 PM, Jon Hunter jon-hun...@ti.com wrote:
Adds basic
The patch 30058677 ARM / highbank: add support for pl320 IPC
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed appropriately to allow the
introduction of the generic mailbox API framework.
Signed-off-by: Suman Anna s-a...@ti.com
Cc: Mark Langsdorf
From: Loic Pallardy loic.palla...@st.com
Current message type is a u32 to fit HW fifo format.
This should be extended to support any message exchanges
and type of mailbox.
Proposed structure owns the original u32 and an optional
pointer on additional data.
Adaptations made to remoteproc and
The mailbox_put function must check the notifier block for
NULL before trying to unregister it.
Signed-off-by: Fernando Guzman Lugo lugo.ferna...@gmail.com
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/mailbox/mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Loic Pallardy loic.palla...@st.com
Add STEriccson DBX500 PRCM mailbox support.
Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
.../devicetree/bindings/mailbox/dbx500-mailbox.txt | 27 +
drivers/mailbox/Kconfig
From: Loic Pallardy loic.palla...@st.com
In order to create a generic mailbox framework, functions
and structures should be renamed in mailbox.
Taking care of remoteproc and tidspbridge while at it.
Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Omar Ramirez Luna
Add a NULL check for iomem resource in mailbox probe functions.
Signed-off-by: Fernando Guzman Lugo lugo.ferna...@gmail.com
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/mailbox/mailbox-omap1.c | 3 +++
drivers/mailbox/mailbox-omap2.c | 5 +
2 files changed, 8 insertions(+)
diff --git
From: Loic Pallardy loic.palla...@st.com
For debug purpose, mailbox must be available when
interrupts are disabled to collect dump information.
Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/mailbox/mailbox.c | 66
The mailbox startup code is enabling the interrupt even before
any of the associated mailbox queues are allocated. Any pending
received mailbox message could cause a kernel panic as soon as
the interrupt is enabled due to the dereferencing of non-existing
mailbox queues within the ISR.
From: Loic Pallardy loic.palla...@st.com
Coprocessor must be accessible during suspend transitions.
Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/mailbox/mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
From: Omar Ramirez Luna omar.l...@linaro.org
Now internal structures can remain hidden to the user and just API
related functions and defines are made available.
Signed-off-by: Omar Ramirez Luna omar.l...@linaro.org
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
Hi,
Please find the updated mailbox patch series for pulling into linux-next.
The series is rebased on top of 3.9-rc2, and includes one new patch to
rename an existing mailbox.h added as part of the highbank cpufreq
support for 3.9 merge window [1].
The rest of the patches are mostly unchanged
The OMAP mailbox platform driver code has been cleaned up to
remove the dependencies with soc.h in preparation for moving
the mailbox code to drivers folder.
The code relied on cpu_is_xxx/soc_is_xxx macros previously to
pick the the right set of mailbox devices and register with the
mailbox
From: Loic Pallardy loic.palla...@st.com
TX: replace spin by mutex to release CPU
during wait on mailbox resource.
Signed-off-by: Loic Pallardy loic.palla...@st.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/mailbox/mailbox.c | 5 +++--
From: Loic Pallardy loic.palla...@st.com
Some mailboxes are made up of cross interrupts
and associated shared memory.
Shared memory mapping is fixed and cross interrupt/shared
memory relation make impossible the use of virtio.
Mailbox framework must be enough opened to support
any kind of
On Tue, Mar 12, 2013 at 10:23:50PM -0500, Suman Anna wrote:
The patch 30058677 ARM / highbank: add support for pl320 IPC
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed appropriately to allow the
introduction of the generic mailbox API framework.
On Tue, Mar 12, 2013 at 10:23:50PM -0500, Suman Anna wrote:
The patch 30058677 ARM / highbank: add support for pl320 IPC
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed appropriately to allow the introduction of
the generic mailbox API framework.
101 - 166 of 166 matches
Mail list logo
