While using HDMI connector driver with sil9022 encoder
came across issue where connector driver is probed first.
This resulted in error. A deffered probe solved this.
Most connector drivers need a encoder driver as their
video source. This patch ensures we do a probe defferal
if video source is
Am 11.09.2013 19:42, schrieb Alexander Holler:
Am 11.09.2013 18:14, schrieb Javier Martinez Canillas:
So for example in an OMAP board DT you can define something like this:
ethernet@5,0 {
compatible = smsc,lan9221, smsc,lan9115;
interrupt-parent = gpio6;
Hi Kishon,
On Mon, Sep 2, 2013 at 9:13 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old
On Wednesday 11 September 2013 12:22 AM, Joel Fernandes wrote:
HWMOD removal for MMC is breaking edma_start as the events are being manually
triggered due to unused channel list not being clear.
This patch fixes the issue, by reading the dmas property from the DT node if
it exists and
On Thursday 12 September 2013 02:57 PM, Vivek Gautam wrote:
Hi Kishon,
On Mon, Sep 2, 2013 at 9:13 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(),
On 09/12/2013 10:55 AM, Alexander Holler wrote:
Am 11.09.2013 19:42, schrieb Alexander Holler:
Am 11.09.2013 18:14, schrieb Javier Martinez Canillas:
So for example in an OMAP board DT you can define something like this:
ethernet@5,0 {
compatible = smsc,lan9221, smsc,lan9115;
Am 12.09.2013 12:11, schrieb Javier Martinez Canillas:
On 09/12/2013 10:55 AM, Alexander Holler wrote:
...
By the way, how do you define two GPIOs/IRQs from different
gpio-banks/irq-controllers wuth that scheme?
That is indeed a very good question and I don't have a definite answer.
On Thu, Sep 12, 2013 at 3:40 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
On Thursday 12 September 2013 02:57 PM, Vivek Gautam wrote:
Hi Kishon,
On Mon, Sep 2, 2013 at 9:13 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init,
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
There can be systems which does not have a external usb_phy, so get
usb_phy only if usb-phy property is added in the case of dt boot or if
platform_data indicates the presence of PHY. Also remove checking if
return value is
On Thu, Sep 12, 2013 at 4:06 PM, Roger Quadros rog...@ti.com wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
There can be systems which does not have a external usb_phy, so get
usb_phy only if usb-phy property is added in the case of dt boot or if
platform_data
Hi,
On 09/12/2013 01:47 PM, Vivek Gautam wrote:
On Thu, Sep 12, 2013 at 4:06 PM, Roger Quadros rog...@ti.com wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
There can be systems which does not have a external usb_phy, so get
usb_phy only if usb-phy property is added
Am 12.09.2013 12:28, schrieb Alexander Holler:
Am 12.09.2013 12:11, schrieb Javier Martinez Canillas:
On 09/12/2013 10:55 AM, Alexander Holler wrote:
...
By the way, how do you define two GPIOs/IRQs from different
gpio-banks/irq-controllers wuth that scheme?
That is indeed a very good
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3
driver in drivers/usb/phy to drivers/phy and also renamed the file to
phy-omap-pipe3 since this same driver will be used for SATA PHY and
PCIE PHY.
I
Hi,
On Thu, Sep 12, 2013 at 4:34 PM, Roger Quadros rog...@ti.com wrote:
Hi,
On 09/12/2013 01:47 PM, Vivek Gautam wrote:
On Thu, Sep 12, 2013 at 4:06 PM, Roger Quadros rog...@ti.com wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
There can be systems which does not
Am 12.09.2013 13:09, schrieb Alexander Holler:
Am 12.09.2013 12:28, schrieb Alexander Holler:
Am 12.09.2013 12:11, schrieb Javier Martinez Canillas:
On 09/12/2013 10:55 AM, Alexander Holler wrote:
...
By the way, how do you define two GPIOs/IRQs from different
gpio-banks/irq-controllers
Am 12.09.2013 13:26, schrieb Alexander Holler:
Am 12.09.2013 13:09, schrieb Alexander Holler:
Am 12.09.2013 12:28, schrieb Alexander Holler:
Am 12.09.2013 12:11, schrieb Javier Martinez Canillas:
On 09/12/2013 10:55 AM, Alexander Holler wrote:
...
So, if I understood the code correctly
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
+---+---+---+
| ECC scheme|ECC calculation|Error
This patch adds following two flavours of BCH4 ECC scheme in omap2-nand driver
- OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
- uses GPMC H/W engine for calculating ECC.
- uses software library (lib/bch.h nand_bch.h) for error correction.
- OMAP_ECC_BCH4_CODE_HW
- uses GPMC H/W
*Changes v5 - v6*
[PATCH 1/4]:
- updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks
http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html
- detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver
[PATCH 2/4]
-
DT property values for OMAP based gpmc-nand have been updated
to match changes in commit:
6faf096 ARM: OMAP2+: cleaned-up DT support of various ECC schemes
Refer: Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Signed-off-by: Pekon Gupta pe...@ti.com
---
OMAP NAND driver support multiple ECC scheme, which can used in following
different flavours, depending on in-build Hardware engines supported by SoC.
+---+---+---+
| ECC scheme|ECC calculation|Error
On Thu, Aug 22, 2013 at 07:56:57AM +, Gupta, Pekon wrote:
If anything, the device entry should somehow describe the various ecc
options
that the hardware implements (if you can't derive that from the compatible
value, which I think you can?).
Also I'll try to explain how below
Hi,
[...]
You might also consider a future patch for utilizing devm_* functions
for the probe/remove routines in drivers/mtd/nand/omap2.c. That could
improve some of the stuff I looked at in this series.
Thanks for feedback.
I have not incorporated this particular update in v6, as I do
Hi Philipp,
On Monday 09 September 2013 02:36 PM, Philipp Zabel wrote:
So if I understand correctly, the only problem is that on OMAP the clock
needs to be enabled to deassert the reset, but as long as the clock
domain is in hardware supervised mode, it won't be enabled?
Yes, enabling clock
Hi,
On Thu, Sep 12, 2013 at 07:32:54AM +0300, Alexey Pelykh wrote:
On Wed, Sep 11, 2013 at 09:22:26AM +0300, Alexey Pelykh wrote:
Hi Felipe,
Thanks for finding this issue. Indeed, there is a bug on 3M+ baud
rates. First patch is close to a complete fix, but still contains
Hi,
On Thu, Sep 12, 2013 at 07:37:07AM +0300, Alexey Pelykh wrote:
Actually, here it is, but not formatted properly
diff --git a/drivers/tty/serial/omap-serial.c
b/drivers/tty/serial/omap-serial.c
index 816d1a2..146e712 100644
--- a/drivers/tty/serial/omap-serial.c
+++
On Tue, Mar 5, 2013 at 10:13 PM, Matt Porter mpor...@ti.com wrote:
From: Santosh Shilimkar santosh.shilim...@ti.com
MMC driver probe will abort for DT case because of failed
platform_get_resource_byname() lookup. Fix it by skipping resource
byname lookup for device tree build.
Issue is
On 09/12/2013 02:26 PM, Vivek Gautam wrote:
Hi,
On Thu, Sep 12, 2013 at 4:34 PM, Roger Quadros rog...@ti.com wrote:
Hi,
On 09/12/2013 01:47 PM, Vivek Gautam wrote:
On Thu, Sep 12, 2013 at 4:06 PM, Roger Quadros rog...@ti.com wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Since now we have a separate folder for phy, move the PHY dt binding
documentation of OMAP to that folder.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
.../devicetree/bindings/{usb/usb-phy.txt = phy/omap-phy.txt}|
Hi,
Need some commit log.
cheers,
-roger
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
renamed struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also moved the driver and
include files under *phy* and made the corresponding changes in the users
of
On Thu, Sep 12, 2013 at 3:21 PM, Felipe Balbi ba...@ti.com wrote:
Hi,
On Thu, Sep 12, 2013 at 07:37:07AM +0300, Alexey Pelykh wrote:
Actually, here it is, but not formatted properly
diff --git a/drivers/tty/serial/omap-serial.c
b/drivers/tty/serial/omap-serial.c
index 816d1a2..146e712
On Thursday 12 September 2013 06:11 PM, Geert Uytterhoeven wrote:
On Tue, Mar 5, 2013 at 10:13 PM, Matt Porter mpor...@ti.com wrote:
From: Santosh Shilimkar santosh.shilim...@ti.com
MMC driver probe will abort for DT case because of failed
platform_get_resource_byname() lookup. Fix it by
On Thursday 12 September 2013 06:11 PM, Geert Uytterhoeven wrote:
On Tue, Mar 5, 2013 at 10:13 PM, Matt Porter mpor...@ti.com wrote:
From: Santosh Shilimkar santosh.shilim...@ti.com
MMC driver probe will abort for DT case because of failed
platform_get_resource_byname() lookup. Fix it by
On 09/12/2013 05:37 AM, Alexander Holler wrote:
Am 12.09.2013 13:26, schrieb Alexander Holler:
Am 12.09.2013 13:09, schrieb Alexander Holler:
Am 12.09.2013 12:28, schrieb Alexander Holler:
Am 12.09.2013 12:11, schrieb Javier Martinez Canillas:
On 09/12/2013 10:55 AM, Alexander Holler wrote:
Try adding kernel bootargs, lets say: vram=48M omapfb.vram=0:16M,1:16M,2:16M
And see what happens.
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From: Alexander Holler hol...@ahsoftware.de
This enables the use of MMC cards even when no card was inserted at boot.
Signed-off-by: Alexander Holler hol...@ahsoftware.de
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
Changes since v2:
None, again a simple repost
Changes since
This adds the irq crossbar device node.
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt
Enable the crossbar irqchip driver for DRA7xx soc.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 8413252..b602168 100644
---
Am 12.09.2013 17:19, schrieb Stephen Warren:
IRQs, DMA channels, and GPIOs are all different things. Their bindings
are defined independently. While it's good to define new types of
bindings consistently with other bindings, this hasn't always happened,
so you can make zero assumptions about
The pinmux is specified in am335x-bone-common.dtsi to be reused by the eMMC
cape.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
Changes since v2:
add missing pinmux entries
Changes since v1:
dropped the ti,non-removable entry per Sekhars request
Now with the crossbar IP in picture, the peripherals do not have the
fixed interrupt lines. Instead they rely on the crossbar irqchip to
allocate and map a free interrupt line to its crossbar input. So replacing
all the peripheral interrupt numbers with its fixed crossbar input lines.
This matches the vendor 3.8.x configuration that is shipping with the boards.
The LED layout is now:
USR0: heartbeat
USR1: mmc0 (micro-SD slot)
USR2: cpu0
USR3: mmc1 (eMMC)
The cpu0 triggers was put inbetween the mmc triggers to make is easier to see
where the disk activity is.
Signed-off-by:
Here are two patches to fix MMC on beaglebone, one fixes card detect on BBW,
the other adds the eMMC entry for BBB and its fixed regulator. After that mmc1
gets a nice speed boost by moving to 4-bit mode and LED triggers get assigned.
This series depends on:
nitpick minor comment:
$subject: ARM: dts: am335x-bone-common: switch mmc1 to 4-bit mode
On 09/12/2013 10:42 AM, Koen Kooi wrote:
The micro-SD slot hooks up all four data pins so lets' use them.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
nitpick minor comment:
$subject: ARM: dts: am335x-bone: add card detect for mmc1
btw, please use V3 in $subject next time. --subject-prefix PATCH V3
when generating patch should do the job.
On 09/12/2013 10:42 AM, Koen Kooi wrote:
From: Alexander Holler hol...@ahsoftware.de
This enables the
Nitpick minor comment:
$subject:
ARM: dts: am335x-boneblack: add eMMC DT entry
On 09/12/2013 10:42 AM, Koen Kooi wrote:
The pinmux is specified in am335x-bone-common.dtsi to be reused by the eMMC
cape.
Also might want to state that vmmcsd_fixed 3.3 voltage rail is present
in BeagleBone White
On 09/12/2013 10:42 AM, Koen Kooi wrote:
This matches the vendor 3.8.x configuration that is shipping with the boards.
The LED layout is now:
USR0: heartbeat
USR1: mmc0 (micro-SD slot)
USR2: cpu0
USR3: mmc1 (eMMC)
The cpu0 triggers was put inbetween the mmc triggers to make is easier
The micro-SD slot hooks up all four data pins so lets' use them.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the
interrupt lines from the subsystems are not needed at the same
time, so they have to be muxed to the irq-controller appropriately.
In such places a interrupt controllers are
Here are two patches to fix MMC on beaglebone, one fixes card detect on BBW,
the other adds the eMMC entry for BBB and its fixed regulator. After that mmc1
gets a nice speed boost by moving to 4-bit mode and LED triggers get assigned.
This series depends on:
From: Alexander Holler hol...@ahsoftware.de
This enables the use of MMC cards even when no card was inserted at boot.
Signed-off-by: Alexander Holler hol...@ahsoftware.de
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 14 ++
This matches the vendor 3.8.x configuration that is shipping with the boards.
The LED layout is now:
USR0: heartbeat
USR1: mmc0 (micro-SD slot)
USR2: cpu0
USR3: mmc1 (eMMC)
The cpu0 triggers was put in between the mmc triggers to make is easier to see
where the disk activity is.
Signed-off-by:
The micro-SD slot hooks up all four data pins so lets' use them.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
The pinmux is specified in am335x-bone-common.dtsi to be reused by the eMMC
cape.
Signed-off-by: Koen Kooi k...@dominion.thruhere.net
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 22 ++
arch/arm/boot/dts/am335x-boneblack.dts| 14 ++
2 files changed, 36
On 09/12/2013 01:35 PM, Koen Kooi wrote:
Here are two patches to fix MMC on beaglebone, one fixes card detect on BBW,
the other adds the eMMC entry for BBB and its fixed regulator. After that mmc1
gets a nice speed boost by moving to 4-bit mode and LED triggers get assigned.
This series
On Thu, 12 Sep 2013, Sricharan R wrote:
Signed-off-by: Sricharan R r.sricha...@ti.com
---
There is lockdep warning during the boot. This is because we try to
do one request_irq with in another and that results in kmalloc being
called from an atomic context, which generates the warning.
Any
Thomas,
On Thursday 12 September 2013 04:18 PM, Thomas Gleixner wrote:
On Thu, 12 Sep 2013, Sricharan R wrote:
Signed-off-by: Sricharan R r.sricha...@ti.com
---
There is lockdep warning during the boot. This is because we try to
do one request_irq with in another and that results in kmalloc
On Thu, Sep 12, 2013 at 09:09:08PM +0530, Sricharan R wrote:
+unsigned int crossbar_request_irq(struct irq_data *d)
+{
+ int cb_no = d-hwirq;
+ int virq = allocate_free_irq(cb_no);
+ void *irq = cb-crossbar_map[cb_no].hwirq;
+ int err;
+
+ err =
On Thu, 12 Sep 2013, Felipe Balbi wrote:
On Thu, Sep 12, 2013 at 09:09:08PM +0530, Sricharan R wrote:
+unsigned int crossbar_request_irq(struct irq_data *d)
+{
+ int cb_no = d-hwirq;
+ int virq = allocate_free_irq(cb_no);
+ void *irq = cb-crossbar_map[cb_no].hwirq;
+ int err;
On Thu, 12 Sep 2013, Thomas Gleixner wrote:
On Thu, 12 Sep 2013, Felipe Balbi wrote:
On Thu, Sep 12, 2013 at 09:09:08PM +0530, Sricharan R wrote:
+unsigned int crossbar_request_irq(struct irq_data *d)
+{
+ int cb_no = d-hwirq;
+ int virq = allocate_free_irq(cb_no);
+ void *irq
Koen Kooi k...@dominion.thruhere.net writes:
Here are two patches to fix MMC on beaglebone, one fixes card detect on BBW,
the other adds the eMMC entry for BBB and its fixed regulator. After that mmc1
gets a nice speed boost by moving to 4-bit mode and LED triggers get assigned.
This series
On Thu, 12 Sep 2013, Santosh Shilimkar wrote:
Specifically for the IRQ case addressed here, the cross-bar IP
sits between the interrupt controller and peripheral interrupts.
CPU -- GIC - CROSSBAR - PERIPHERAL IRQs
Just to expand it better, cross-bar input IRQ lines are more than
On Thursday 12 September 2013 06:22 PM, Thomas Gleixner wrote:
On Thu, 12 Sep 2013, Santosh Shilimkar wrote:
Specifically for the IRQ case addressed here, the cross-bar IP
sits between the interrupt controller and peripheral interrupts.
CPU -- GIC - CROSSBAR - PERIPHERAL IRQs
Just
On Thu, 12 Sep 2013, Santosh Shilimkar wrote:
On Thursday 12 September 2013 06:22 PM, Thomas Gleixner wrote:
Now the real question is, how that expansion mechanism is supposed to
work. There are two possible scenarios:
1) Expand the number of handled interrupts beyond the GIC capacity:
On Thursday 12 September 2013 08:26 PM, Thomas Gleixner wrote:
On Thu, 12 Sep 2013, Santosh Shilimkar wrote:
On Thursday 12 September 2013 06:22 PM, Thomas Gleixner wrote:
Now the real question is, how that expansion mechanism is supposed to
work. There are two possible scenarios:
1) Expand
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