On Wed, 11 Jun 2014, Tony Lindgren wrote:
* Lee Jones lee.jo...@linaro.org [140603 01:08]:
On Mon, 02 Jun 2014, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140528 11:11]:
* Lee Jones lee.jo...@linaro.org [140528 00:14]:
Thanks Tony, here's the pull-request:
* Lee Jones lee.jo...@linaro.org [140612 00:48]:
On Wed, 11 Jun 2014, Tony Lindgren wrote:
* Lee Jones lee.jo...@linaro.org [140603 01:08]:
On Mon, 02 Jun 2014, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140528 11:11]:
* Lee Jones lee.jo...@linaro.org [140528 00:14]:
On Tue, Jun 3, 2014 at 1:14 AM, Tony Lindgren t...@atomide.com wrote:
Looks like something like below fixes the issue.
Regards,
Tony
8 ---
From: Tony Lindgren t...@atomide.com
Date: Mon, 2 Jun 2014 16:13:46 -0700
Subject: [PATCH] gpio: of: Fix handling for deferred
On Thu, 12 Jun 2014, Tony Lindgren wrote:
* Lee Jones lee.jo...@linaro.org [140612 00:48]:
On Wed, 11 Jun 2014, Tony Lindgren wrote:
* Lee Jones lee.jo...@linaro.org [140603 01:08]:
On Mon, 02 Jun 2014, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140528 11:11]:
On 5 June 2014 23:14, Arnd Bergmann a...@arndb.de wrote:
Hi Chris, Ulf,
These are small fixes from my randconfig testing, almost all for
older bugs, please apply to a tree you see appropriate.
Thanks Arnd!
Applied for fixes.
Kind regards
Uffe
Arnd
Arnd Bergmann (4):
mmc:
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From: Nishanth Menon n...@ti.com
DMA interrupts are now available in of, and the definitions are
duplicates in hwmod. This prevents us from dynamically allocating
interrupt resources for dma from devicetree.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
From: Nishanth Menon n...@ti.com
we have currently 2 DMA drivers that try to co-exist.
drivers/dma/omap-dma.c which registers it's own IRQ and is device tree
aware and uses arch/arm/plat-omap/dma.c instance created by
arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).
This series removes the DMA interrupt registration if DT provides interrupts,
so we have no need for hwmod provided interrupt number.
This is a pre-req for crossbar migration as DMA is the last driver to use
interrupt definition from hwmod.
[V2] Rebased on 3.15 mainline
Nishanth Menon (2):
From: Nishanth Menon n...@ti.com
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 22
From: Nishanth Menon n...@ti.com
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two
different GIC interrupts. This is completely undesirable. Instead, check
if the requested crossbar event is pre-allocated and provide that GIC
mapping back to caller if already
If crossbar_of_init returns with a error, then set the cb pointer
to null.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq) gets called when irq_desc(irq) is disposed.
After this the irq is anyways unusable and have to mapped again.
Adding the above
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
register_offsets are freed as well.
Signed-off-by: Nishanth Menon
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors, return proper
error results in case of failures.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27):
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
Technical Reference Manual documentation update expected
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
WARNING: Missing a blank line after
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
From: Nishanth Menon n...@ti.com
Since crossbar is s/w configurable, the initial settings of the
crossbar cannot be assumed to be sane. This implies that:
a) On initialization all un-reserved crossbars must be initialized to
a known 'safe' value.
b) When unmapping the interrupt, the safe value
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This can open up new bugs which are
easily fixable rather than wait till allocation logic approaches
the limit to find new bugs.
Signed-off-by: Nishanth Menon
This series introduces DT support for crossbar device and
changes dra7 peripherals to use crossbar number instead of irq.
This depends on below driver fixes and cleanup series.
https://lkml.org/lkml/2014/6/12/232
[V2] Rebased on 3.15 mainline.
R Sricharan (2):
ARM: dts: DRA7: Add
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by:
This series does some cleanups, fixes for handling two interrupts
getting mapped twice to same crossbar and provides support for
hardwired IRQ and crossbar definitions.
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10,
131, 132, 133 are direct wired to hardware blocks bypassing
Tony,
Looks like we've missed this for 3.16.
cheers,
-roger
On 04/23/2014 08:34 PM, Roger Quadros wrote:
From: Keshava Munegowda keshava_mgo...@ti.com
Create hwmods for ocp2scp3 and sata modules.
[Roger Q] Clean up.
CC: Benoit Cousson bcous...@baylibre.com
Acked-by: Paul Walmsley
Tony,
We need this one as well for 3.16.
cheers,
-roger
On 04/23/2014 08:35 PM, Roger Quadros wrote:
From: Nikhil Devshatwar nikhil...@ti.com
Add hwmods for ocp2scp3 and sata modules.
[Roger Q] Clean up.
CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
On Thu, Jun 12, 2014 at 05:23:13PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This can open up new bugs which are
easily fixable rather than wait till allocation logic approaches
On Thu, Jun 12, 2014 at 05:23:16PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+void
On Thu, Jun 12, 2014 at 05:23:17PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
I would re-word the above to mention that we need to add missing
properties for kerneldoc (@write, @safemap), and we're doing
On Thu, Jun 12, 2014 at 05:23:18PM +0530, Sricharan R wrote:
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
On Thu, Jun 12, 2014 at 05:23:19PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
Hi Jason,
On Thursday 12 June 2014 06:21 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then
Hi Jason,
On Thursday 12 June 2014 06:46 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:18PM +0530, Sricharan R wrote:
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars
Hi Tomasz,
Thanks for working on this!
I have just tried this, against Linus master
64b2d1fbbfda07765dae3f601862796a61b2c451.
Added patch ARM: dts: Initial ODROID U2 support and booted on
ODROID-U2. I believe this board has the security enabled.
Unfortunately, it hangs during early boot. With
Hi Jason,
On Thursday 12 June 2014 06:40 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:16PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer
On Thu, Jun 12, 2014 at 05:23:20PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors, return proper
error results in case of failures.
Please describe what the other possible failures are and how the changes
are more correct.
Hi Jason,
On Thursday 12 June 2014 06:50 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:19PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
Hi Jason,
On Thursday 12 June 2014 06:44 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:17PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
I would re-word the above to mention that we need to add
On Thu, Jun 12, 2014 at 05:23:21PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth
On Thu, Jun 12, 2014 at 05:23:23PM +0530, Sricharan R wrote:
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq) gets called when irq_desc(irq) is disposed.
After this the irq is
Hi Jason,
On Thursday 12 June 2014 07:19 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:23PM +0530, Sricharan R wrote:
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq)
On Thu, Jun 12, 2014 at 05:23:24PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the
* Jason Cooper ja...@lakedaemon.net [140612 05:52]:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those
On Thu, Jun 12, 2014 at 06:57:15AM -0700, Tony Lindgren wrote:
* Jason Cooper ja...@lakedaemon.net [140612 05:52]:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
On Thu, Jun 12, 2014 at 06:49:17PM +0530, Sricharan R wrote:
Hi Jason,
On Thursday 12 June 2014 06:21 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be
Hi Arnd,
On Wednesday 11 June 2014 16:49:31 Arnd Bergmann wrote:
On Wednesday 11 June 2014 09:42:04 Nishanth Menon wrote:
On 06/11/2014 09:35 AM, Arnd Bergmann wrote:
The OMAP4 camera support depends on I2C and VIDEO_V4L2, both
of which can be loadable modules. This causes build failures
Hi Daniel,
On 12.06.2014 15:38, Daniel Drake wrote:
Hi Tomasz,
Thanks for working on this!
I have just tried this, against Linus master
64b2d1fbbfda07765dae3f601862796a61b2c451.
Added patch ARM: dts: Initial ODROID U2 support and booted on
ODROID-U2. I believe this board has the
On Thursday 12 June 2014 16:12:17 Laurent Pinchart wrote:
From 3a965f4fd5a6b3ef4a66aa4e7c916cfd34fd5706 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann a...@arndb.de
Date: Tue, 21 Jan 2014 09:32:43 +0100
Subject: [PATCH] [media] staging: tighten omap4iss dependencies
The OMAP4 camera
On Thu, Jun 12, 2014 at 04:15:32PM +0200, Arnd Bergmann wrote:
On Thursday 12 June 2014 16:12:17 Laurent Pinchart wrote:
From 3a965f4fd5a6b3ef4a66aa4e7c916cfd34fd5706 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann a...@arndb.de
Date: Tue, 21 Jan 2014 09:32:43 +0100
Subject: [PATCH]
On Thu, 2014-06-12 at 19:05 +0530, Sricharan R wrote:
On Thursday 12 June 2014 06:40 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:16PM +0530, Sricharan R wrote:
diff --git a/drivers/irqchip/irq-crossbar.c
b/drivers/irqchip/irq-crossbar.c
[]
@@ -34,7 +34,8 @@ struct
On Thursday 12 June 2014 07:25:15 Greg KH wrote:
On Thu, Jun 12, 2014 at 04:15:32PM +0200, Arnd Bergmann wrote:
On Thursday 12 June 2014 16:12:17 Laurent Pinchart wrote:
From 3a965f4fd5a6b3ef4a66aa4e7c916cfd34fd5706 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann a...@arndb.de
Date:
Hi Tony,
On Wednesday 11 June 2014 07:47:54 Tony Lindgren wrote:
* Arnd Bergmann a...@arndb.de [140611 07:37]:
The OMAP4 camera support depends on I2C and VIDEO_V4L2, both
of which can be loadable modules. This causes build failures
if we want the camera driver to be built-in.
That's
Hi Arnd,
On Thursday 12 June 2014 16:28:39 Arnd Bergmann wrote:
On Thursday 12 June 2014 07:25:15 Greg KH wrote:
On Thu, Jun 12, 2014 at 04:15:32PM +0200, Arnd Bergmann wrote:
On Thursday 12 June 2014 16:12:17 Laurent Pinchart wrote:
From 3a965f4fd5a6b3ef4a66aa4e7c916cfd34fd5706 Mon
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140612 07:52]:
On Wednesday 11 June 2014 07:47:54 Tony Lindgren wrote:
These should just use either pinctrl-single.c instead for muxing.
Or if they are not mux registers, we do have the syscon mapping
available in omap4.dtsi that
Hi Tony,
On Thursday 12 June 2014 08:15:35 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140612 07:52]:
On Wednesday 11 June 2014 07:47:54 Tony Lindgren wrote:
These should just use either pinctrl-single.c instead for muxing.
Or if they are not mux registers,
Hey Joe,
On Thu, Jun 12, 2014 at 07:18:31AM -0700, Joe Perches wrote:
On Thu, 2014-06-12 at 19:05 +0530, Sricharan R wrote:
On Thursday 12 June 2014 06:40 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:16PM +0530, Sricharan R wrote:
diff --git a/drivers/irqchip/irq-crossbar.c
On Thu, Jun 12, 2014 at 04:28:39PM +0200, Arnd Bergmann wrote:
On Thursday 12 June 2014 07:25:15 Greg KH wrote:
On Thu, Jun 12, 2014 at 04:15:32PM +0200, Arnd Bergmann wrote:
On Thursday 12 June 2014 16:12:17 Laurent Pinchart wrote:
From 3a965f4fd5a6b3ef4a66aa4e7c916cfd34fd5706 Mon Sep
Use clkops-clocks property to specify clocks handled by
clock_ops domain PM domain. Only clocks defined in clkops-clocks
set of clocks will be handled by Runtime PM through clock_ops
Pm domain.
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
drivers/of/of_clk.c |7 ++-
1
Hi Geert,
I've spent some time testing your patches on Keystone 2 SoC as I am interested
in these patches.
The Keystone 2 is pure DT platform, but we reuse some Drivers from Davinci SoC.
Now I have to dial with following problem:
- Some modules on Keystone need more then one clock to be managed
In many case it's useful to divide device's clocks into
few sets according to their designation.
- some clocks can be optional for the device
- some clocks can be managed by PM frameworks (like clock_ops for example)
while some need to be managed by driver directly.
This patch introduces new
On Thu, 2014-06-12 at 11:32 -0400, Jason Cooper wrote:
Hi Jason.
But bugfix backports haven't been much of an issue in
other subsystems with fairly active whitespace/style
changes.
Most of the mvebu fixes we've had that failed to apply were generally
due to a large whitespace change
On Thu, Jun 12, 2014 at 02:38:49PM +0100, Daniel Drake wrote:
From 2e67231f10ed0b05c2bacfdd05774fe21315d6da Mon Sep 17 00:00:00 2001
From: Gu1 g...@aeroxteam.fr
Date: Mon, 21 Jan 2013 04:13:56 +0100
Subject: [PATCH] ARM: EXYNOS: Add secure firmware support for l2x0 init
Conflicts:
Hi Russell,
On 12.06.2014 18:20, Russell King - ARM Linux wrote:
On Thu, Jun 12, 2014 at 02:38:49PM +0100, Daniel Drake wrote:
From 2e67231f10ed0b05c2bacfdd05774fe21315d6da Mon Sep 17 00:00:00 2001
From: Gu1 g...@aeroxteam.fr
Date: Mon, 21 Jan 2013 04:13:56 +0100
Subject: [PATCH] ARM:
Kedves E-mail felhasználói;
Túllépte 23432 Repository a postafiók szett
Web Szolgáltatások / menedzser, és problémái küldés és
fogadó mail míg ellenorzésre. Meg kell frissíteni
kattintson az alábbi linkre és töltse ki az adatokat, hogy ellenorizze
a számla.
Kérjük, kattintson az alábbi
On Thursday 12 June 2014 06:16 PM, Roger Quadros wrote:
Tony,
Looks like we've missed this for 3.16.
Without these SATA support will be broken for DRA7x and OMAP5 so can
they be queued for -rc2?
Thanks,
Sekhar
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To unsubscribe from this list: send the line unsubscribe linux-omap in
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* Laurent Pinchart laurent.pinch...@ideasonboard.com [140612 08:32]:
Hi Tony,
On Thursday 12 June 2014 08:15:35 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140612 07:52]:
On Wednesday 11 June 2014 07:47:54 Tony Lindgren wrote:
These should just use
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