* Suman Anna s-a...@ti.com [140708 11:40]:
Hi Peter,
On 07/08/2014 09:36 AM, Greg KH wrote:
On Tue, Jul 08, 2014 at 03:03:58PM +0200, Peter Meerwald wrote:
Hello,
Given the total lack of response here, I suggest just deleting the
driver. No one has ever done the real work that is
On Tue, Jul 08, 2014 at 09:55:23PM +0530, Manish Badarkhe wrote:
Replaced snd_soc_register_component with its devres equivalent,
devm_snd_soc_register_component.
Applied, thanks.
signature.asc
Description: Digital signature
On Tue, Jul 08, 2014 at 10:23:17PM +0530, Manish Badarkhe wrote:
Replaced snd_soc_register_component with its devres equivalent,
devm_snd_soc_register_component.
Applied, thanks.
signature.asc
Description: Digital signature
* Suman Anna s-a...@ti.com [140708 10:57]:
Hi Tony, Pavel,
On 07/04/2014 03:23 AM, Tony Lindgren wrote:
* Pavel Machek pa...@ucw.cz [140704 01:07]:
Hi!
The non-DT support has to be maintained for now to not break
OMAP3 legacy boot, and the legacy-style code will be cleaned
up once
* Keerthy j-keer...@ti.com [140708 22:40]:
The patch series adds the device tree nodes and the corresponding
documentation. The series also enabled tps65218 config options
in the omap2plus_defconfig.
The series is boot tested on both AM43x-epos-evm and AM437x-gp-evm.
Are the .dts changes
On Tue, Jul 08, 2014 at 02:09:12PM -0500, Felipe Balbi wrote:
The second range of this particular regulator,
starts at 1.60V, not as 1.55V as it was originally
implied by code.
Applied all, thanks. Please use subject lines consistent with the style
for the subsystem - these even vary within
This series adds hwmod entry and dt node for RTC.
Tested on DRA7: logs can be seen here: http://hastebin.com/jaxogatuta.vhdl
Lokesh Vutla (2):
ARM: DRA7: hwmod: Add data for RTC
ARM: dts: DRA7: Add node for RTC
arch/arm/boot/dts/dra7-evm.dts|1 +
arch/arm/boot/dts/dra7.dtsi
Add node for RTC.
And also making RTC regulator always-on, as RTC should be powered
always.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
[n...@ti.com: update with rtc crossbar number]
Signed-off-by: Nishanth Menon n...@ti.com
---
This patch depends on the crossbar dt patch series by Sricharan:
Add hwmod data for RTC
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
Changes since V1:
Rebased on top of linux-next 20140708.
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 41 +
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
---
Changes from
Hi,
Can you please check the comments below so we don't have to
add duplicate data just to remove it later on.
* Sebastian Andrzej Siewior bige...@linutronix.de [140708 11:43]:
+
+static struct omap_hwmod_irq_info dra7xx_gmac_irqs[] = {
+ { .name = c0_rx_thresh_pend, .irq = 50 +
* Lokesh Vutla lokeshvu...@ti.com [140709 01:37]:
Add node for RTC.
And also making RTC regulator always-on, as RTC should be powered
always.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
[n...@ti.com: update with rtc crossbar number]
Signed-off-by: Nishanth Menon n...@ti.com
---
This
On Wed, Jul 09, 2014 at 11:06:27AM +0530, Keerthy wrote:
Add fixed_uV fields for dcdc5 and dcdc6.
This doesn't apply against current code, can you please check and
resend? There were some cleanups from Felipe that just went in, it
looks like a collision with them.
signature.asc
Description:
* Tony Lindgren t...@atomide.com [140708 01:32]:
* Sekhar Nori nsek...@ti.com [140707 21:56]:
On Monday 07 July 2014 08:40 PM, Felipe Balbi wrote:
On Mon, Jul 07, 2014 at 02:40:08PM +0100, Russell King - ARM Linux wrote:
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
Hi Tony,
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren wrote:
* Lokesh Vutla lokeshvu...@ti.com [140709 01:37]:
Add node for RTC.
And also making RTC regulator always-on, as RTC should be powered
always.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
[n...@ti.com: update with rtc crossbar
On Wednesday 09 July 2014 02:44 PM, Mark Brown wrote:
On Wed, Jul 09, 2014 at 11:06:27AM +0530, Keerthy wrote:
Add fixed_uV fields for dcdc5 and dcdc6.
This doesn't apply against current code, can you please check and
resend? There were some cleanups from Felipe that just went in, it
looks
On Wednesday 09 July 2014 12:10 AM, Sebastian Andrzej Siewior wrote:
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Signed-off-by: Praveen Rao p...@ti.com
Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
---
On Wednesday 09 July 2014 12:10 AM, Sebastian Andrzej Siewior wrote:
From: Mugunthan V N mugunthan...@ti.com
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active
and sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
[Resolved
On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
I reverted my patch, applied this one and after boot I got:
|platform 48485000.mdio: Cannot lookup hwmod 'davinci_mdio'
|cpsw 48484000.ethernet: _od_fail_runtime_resume:
On 2014-07-09 11:55:52 [+0200], Sebastian Andrzej Siewior wrote:
On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
I reverted my patch, applied this one and after boot I got:
Oh me dum dum. I had --dry-run…
Acked-by:
Hi,
On Wednesday 09 July 2014 12:10 AM, Sebastian Andrzej Siewior wrote:
The core complains that the number 343 is too large. The older code has
here 124. This avoids the warning, the driver hasn't been tested.
Signed-off-by: Sebastian Andrzej Siewiorbige...@linutronix.de
---
* Keerthy a0393...@ti.com [140709 02:36]:
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren wrote:
* Lokesh Vutla lokeshvu...@ti.com [140709 01:37]:
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -249,6 +249,7 @@
* Sebastian Andrzej Siewior sebast...@breakpoint.cc [140709 03:03]:
On 2014-07-09 11:55:52 [+0200], Sebastian Andrzej Siewior wrote:
On 2014-07-08 18:46:39 [+0530], Mugunthan V N wrote:
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
I reverted my patch, applied this
Hey Tony, all
On 04.07.2014 09:27, Tony Lindgren wrote:
* Pascal Huerst pascal.hue...@gmail.com [140702 05:12]:
Hi everyone,
we have a device with an am335x and are using some gpios on bank0 to
wake up the device from suspend to ram.
We have some user buttons which are configured in the
On 07/09/2014 12:07 PM, sourav wrote:
Hi,
Hello, Sourav,
The number is correct and is complaining just because the crossbar stuff
is not
put in. I had already posted a patch[1] to remove interrupt binding as
of now.
Hence, NAK for this patch.
Thank you for explanation. What is the
On Mon, Jul 07, 2014 at 05:50:09PM +, Paul Walmsley wrote:
On Mon, 7 Jul 2014, Andre Heider wrote:
On Sun, Jun 29, 2014 at 06:21:34PM +0200, Andre Heider wrote:
this series adds PRUv2 support to uio_pruss through devicetree, makes the
device usable on am33xx and enables it on
Add fixed_uV fields for dcdc5 and dcdc6.
Signed-off-by: Keerthy j-keer...@ti.com
---
Changes from V3:
* Rebased to Latest for/tps65218 branch.
drivers/regulator/tps65218-regulator.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git
* Sebastian Andrzej Siewior bige...@linutronix.de [140709 03:20]:
On 07/09/2014 12:07 PM, sourav wrote:
Hi,
Hello, Sourav,
The number is correct and is complaining just because the crossbar stuff
is not
put in. I had already posted a patch[1] to remove interrupt binding as
of now.
On Wednesday 09 July 2014 03:39 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 02:36]:
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren wrote:
* Lokesh Vutla lokeshvu...@ti.com [140709 01:37]:
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -249,6
* Pascal Huerst pascal.hue...@gmail.com [140709 03:18]:
Hey Tony, all
On 04.07.2014 09:27, Tony Lindgren wrote:
* Pascal Huerst pascal.hue...@gmail.com [140702 05:12]:
Hi everyone,
we have a device with an am335x and are using some gpios on bank0 to
wake up the device from suspend to
* Keerthy a0393...@ti.com [140709 03:39]:
On Wednesday 09 July 2014 03:39 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 02:36]:
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren wrote:
* Lokesh Vutla lokeshvu...@ti.com [140709 01:37]:
--- a/arch/arm/boot/dts/dra7-evm.dts
+++
On Wednesday 09 July 2014 04:20 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 03:39]:
On Wednesday 09 July 2014 03:39 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 02:36]:
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren wrote:
* Lokesh Vutla lokeshvu...@ti.com
* Keerthy a0393...@ti.com [140709 03:59]:
On Wednesday 09 July 2014 04:20 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 03:39]:
On Wednesday 09 July 2014 03:39 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 02:36]:
On Wednesday 09 July 2014 02:42 PM, Tony Lindgren
On Wednesday 09 July 2014 02:01 PM, Tony Lindgren wrote:
* Keerthy j-keer...@ti.com [140708 22:40]:
The patch series adds the device tree nodes and the corresponding
documentation. The series also enabled tps65218 config options
in the omap2plus_defconfig.
The series is boot tested on both
On Wednesday 09 July 2014 02:32 PM, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I
On Wednesday 09 July 2014 04:30 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 03:59]:
On Wednesday 09 July 2014 04:20 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709 03:39]:
On Wednesday 09 July 2014 03:39 PM, Tony Lindgren wrote:
* Keerthy a0393...@ti.com [140709
* One Thousand Gnomes gno...@lxorguk.ukuu.org.uk [140707 06:22]:
On Fri, 4 Jul 2014 18:34:10 +0200
Sebastian Andrzej Siewior bige...@linutronix.de wrote:
While comparing the OMAP-serial and the 8250 part of this I noticed that
the the latter does not use runtime-pm.
Yes it does, but
* Joachim Eastwood manab...@gmail.com [140521 08:49]:
Signed-off-by: Joachim Eastwood manab...@gmail.com
---
Hi,
The mach-omap2 directory contains full register defines for OMAP4
control module but only around 27 of those are used. There are is
a total of 1795 register defines in four
On 07/09/2014 01:17 PM, Tony Lindgren wrote:
* One Thousand Gnomes gno...@lxorguk.ukuu.org.uk [140707 06:22]:
On Fri, 4 Jul 2014 18:34:10 +0200
Sebastian Andrzej Siewior bige...@linutronix.de wrote:
While comparing the OMAP-serial and the 8250 part of this I noticed that
the the latter does
* Ash Charles ashchar...@gmail.com [140610 15:24]:
This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].
[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/
Applying into
Hi Peter,
On Wed, Jul 9, 2014 at 11:18 AM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 07/08/2014 07:47 PM, Manish Badarkhe wrote:
Replaced snd_soc_register_component with its devres equivalent,
devm_snd_soc_register_component.
Signed-off-by: Manish Badarkhe badarkhe.man...@gmail.com
* Sebastian Andrzej Siewior bige...@linutronix.de [140709 04:38]:
On 07/09/2014 01:17 PM, Tony Lindgren wrote:
* One Thousand Gnomes gno...@lxorguk.ukuu.org.uk [140707 06:22]:
On Fri, 4 Jul 2014 18:34:10 +0200
Sebastian Andrzej Siewior bige...@linutronix.de wrote:
While comparing the
* Keerthy a0393...@ti.com [140709 04:03]:
On Wednesday 09 July 2014 02:01 PM, Tony Lindgren wrote:
* Keerthy j-keer...@ti.com [140708 22:40]:
The patch series adds the device tree nodes and the corresponding
documentation. The series also enabled tps65218 config options
in the
* Roger Quadros rog...@ti.com [140630 04:02]:
The ldousb_reg regulator provides power to the USB1 and USB2
High Speed PHYs.
Applying this one into omap-for-v3.17/dt thanks.
Tony
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GPMC controller supports up to 8 memory devices connected to it.
Since there is one statically allocated struct platform_device
gpmc_nand_device it is not possible to configure the system to
use more than one NAND device connected to the GPMC. This
modification makes it possible to use up to 8
On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140708 01:32]:
* Sekhar Nori nsek...@ti.com [140707 21:56]:
On Monday 07 July 2014 08:40 PM, Felipe Balbi wrote:
On Mon, Jul 07, 2014 at 02:40:08PM +0100, Russell King - ARM Linux wrote:
---
* Sekhar Nori nsek...@ti.com [140709 05:28]:
On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140708 01:32]:
* Sekhar Nori nsek...@ti.com [140707 21:56]:
On Monday 07 July 2014 08:40 PM, Felipe Balbi wrote:
On Mon, Jul 07, 2014 at 02:40:08PM
Hi,
The following hardware modules/registers are meant for NAND controller driver
usage:
- NAND I/O control (NAND address, data, command registers)
- Prefetch/Write-post engine
- ECC/BCH engine
However, these registers sit in the GPMC controller's register space and there
need to be some sane
Even though the Prefetch engine is meant for exclusive use by
the OMAP NAND controller, itst registers belong to the GPMC controller's
register space.
Introduce 4 APIs to access the Prefetch/Write-post engine.
int omap_gpmc_prefetch_start(int cs, int fifo_th, bool dma,
Even though the ECC/BCH engine is meant for exclusive use by
the OMAP NAND controller, the ECC/BCH result registers belong
to the GPMC controller's register space.
Introduce 2 APIs to access the ECC/BCH results.
void omap_gpmc_ecc_get_result(int length, u32 *result);
void
Don't access the ECC/BCH engine registers directly as they belong
to the GPMC controller's register space. Use the relevant
GPMC APIs instead.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/omap2.c | 191 +++
1 file changed, 76
Even though the ECC/BCH engine is meant for exclusive use by
the OMAP NAND controller, the ECC/BCH registers belong
to the GPMC controller's register space
Add omap_gpmc_ecc_configure_enable() and omap_gpmc_ecc_disable()
to manage the ECC engine. OMAP NAND driver must use these APIs
instead of
On Wed, Jul 09, 2014 at 05:56:37PM +0530, Sekhar Nori wrote:
On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote:
I guess no more comments. Took a look at the patch again, Sekhar, can
you please update the description with what has been discovered in this
thread and repost?
How does
Don't access the Prefetch engine registers directly as they belong
to the GPMC controller's register space. Use the relevant GPMC
APIs instead.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/omap2.c | 155 ++-
1 file changed, 45
Use the omap_gpmc_read_reg() and omap_gpmc_write_reg() APIs to
access the GPMC_STATUS, NAND_COMMAND, NAND_ADDRESS and NAND_DATA
registers from the GPMC register space.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/omap2.c | 26 ++
1 file changed, 14
The NAND driver now relies completely on the GPMC APIs to access
the NAND control lines and ECC/BCH engine. We no longer need
gpmc_update_nand_reg() and struct gpmc_nand_regs, so get rid of them.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/gpmc-nand.c | 2 --
Instead of hardcoding use the pre-calculated chip-ecc.steps for
configuring number of sectors to process with the BCH algorithm.
This also avoids unnecessary access to the ECC_CONFIG register in
omap_calculate_ecc_bch().
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/mtd/nand/omap2.c |
Introduce omap_gpmc_read_reg() and omap_gpmc_write_reg() so that the
NAND driver can access the required registers (only those specified in
enum omap_gpmc_reg).
The NAND driver must use these APIs instead of directly accesing the
NAND control registers as they belong to the GPMC controller's
There is only one NAND controller (ECC generator) that needs to be
shared among multiple devices. So point nand_chip-hwcontrol to
a single omap_hw_controller instance.
This way the NAND base driver can take care of serializing access
to this single controller (via nand_chip-controller-lock)
when
On 07/09/2014 01:48 PM, Tony Lindgren wrote:
So we can certainly enable this in a generic way, however, this
can only be done under the following conditions:
Sorry forgot to mention why I think this can now be done in a
generic way, that's because we have now runtime PM in Linux.
I have a
On 09.07.2014 12:41, Tony Lindgren wrote:
* Pascal Huerst pascal.hue...@gmail.com [140709 03:18]:
Hey Tony, all
On 04.07.2014 09:27, Tony Lindgren wrote:
* Pascal Huerst pascal.hue...@gmail.com [140702 05:12]:
Hi everyone,
we have a device with an am335x and are using some gpios on bank0
Hi Rostislav,
On 06/04/2014 05:24 PM, Rostislav Lisovy wrote:
GPMC controller supports up to 8 memory devices connected to it.
Since there is one statically allocated struct platform_device
gpmc_nand_device it is not possible to configure the system to
use more than one NAND device connected
Hello.
On 07/09/2014 05:58 AM, Nicholas Krause wrote:
This patch removes a fixme message in this file:wq for setting the usb 2
The vim's commands interspersed with text? :-)
speed on the board to the correct level. We need to depend on the
bootloader for doing this as the wires may be
On Mon, Jul 07, 2014 at 05:50:09PM +, Paul Walmsley wrote:
On Mon, 7 Jul 2014, Andre Heider wrote:
On Sun, Jun 29, 2014 at 06:21:34PM +0200, Andre Heider wrote:
this series adds PRUv2 support to uio_pruss through devicetree, makes the
device usable on am33xx and enables it on
On Wed, Jul 09, 2014 at 02:25:31AM -0700, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140708 01:32]:
* Sekhar Nori nsek...@ti.com [140707 21:56]:
On Monday 07 July 2014 08:40 PM, Felipe Balbi wrote:
On Mon, Jul 07, 2014 at 02:40:08PM +0100, Russell King - ARM Linux
wrote:
On Wed, Jul 09, 2014 at 05:56:37PM +0530, Sekhar Nori wrote:
On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140708 01:32]:
* Sekhar Nori nsek...@ti.com [140707 21:56]:
On Monday 07 July 2014 08:40 PM, Felipe Balbi wrote:
On Mon, Jul 07, 2014 at
On Monday 07 July 2014 09:40 AM, Russell King - ARM Linux wrote:
On Mon, Jul 07, 2014 at 05:39:26AM -0700, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [140707 05:17]:
On Mon, Jul 07, 2014 at 05:20:27PM +0530, Sekhar Nori wrote:
OMAP4430 had L2 cache controller
On Wednesday 09 July 2014 08:39 AM, Russell King - ARM Linux wrote:
On Wed, Jul 09, 2014 at 05:56:37PM +0530, Sekhar Nori wrote:
On Wednesday 09 July 2014 02:55 PM, Tony Lindgren wrote:
I guess no more comments. Took a look at the patch again, Sekhar, can
you please update the description with
* Sebastian Andrzej Siewior bige...@linutronix.de [140709 05:45]:
On 07/09/2014 01:48 PM, Tony Lindgren wrote:
So we can certainly enable this in a generic way, however, this
can only be done under the following conditions:
Sorry forgot to mention why I think this can now be done in a
On 07/09/2014 03:29 AM, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [140708 10:57]:
Hi Tony, Pavel,
On 07/04/2014 03:23 AM, Tony Lindgren wrote:
* Pavel Machek pa...@ucw.cz [140704 01:07]:
Hi!
The non-DT support has to be maintained for now to not break
OMAP3 legacy boot, and the
* Pascal Huerst pascal.hue...@gmail.com [140709 05:47]:
On 09.07.2014 12:41, Tony Lindgren wrote:
If you just comment out the _gpio_rmw part above do
things work as expected?
Yes. It only wakes up on gpio 6 not on gpio 11 anymore.
Then if that works as expected, maybe write only some
The following changes since commit cd3de83f147601356395b57a8673e9c5ff1e59d1:
Linux 3.16-rc4 (2014-07-06 12:37:51 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.16/fixes-rc4
for you to fetch changes up to
* Tero Kristo t-kri...@ti.com [140703 11:19]:
Hi Tony,
Posting this pull-request also early due to my holidays. Anyway, these
patches were supposed to go in already during 3.16 merge window, but they
missed it due to pending dependencies. Finalizes the move of OMAP24xx clock
data to the DT,
* Tony Lindgren t...@atomide.com [140626 03:28]:
* Sricharan R r.sricha...@ti.com [140626 01:36]:
Hi Tony,
On Thursday 26 June 2014 01:14 PM, Tony Lindgren wrote:
* Sricharan R r.sricha...@ti.com [140626 00:29]:
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar
On 07/09/2014 05:12 PM, Tony Lindgren wrote:
And also please note that for runtime PM the wake-up events need
to be always enabled, so the device_may_wakeup() checks should
be only implemented for suspend and resume. I think I got that
corrected for most part in omap-serial.c recently, but
This patch removes a fixme message in this file for setting the usb 2
speed on the board to the correct level. We need to depend on the
bootloader for doing this as the wires may be shared for the other
things on the board with the usb chipset.
Signed-off-by: Nicholas Krause xerofo...@gmail.com
Ok, this has been fun to watch on lkml for a while now, but really,
please, just stop doing this. Randomly searching the kernel source for
FIXME lines and just commenting them out, isn't ok. Almost always,
those lines are there because the original developer really doesn't know
how else to
On 07/07/2014 03:09 PM, One Thousand Gnomes wrote:
Please update the patch to clearly describe the locking
assumptions/requirements for the caller (and not to use it unless you
have no other choice)
done.
Sebastian
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Greg KH wrote on July 9th at 1:19 P.M.
Ok, this has been fun to watch on lkml for a while now, but really,
please, just stop doing this. Randomly searching the kernel source for
FIXME lines and just commenting them out, isn't ok. Almost always,
those lines are there because the original
On 07/07/2014 03:09 PM, One Thousand Gnomes wrote:
On Fri, 4 Jul 2014 18:34:09 +0200
Sebastian Andrzej Siewior bige...@linutronix.de wrote:
The OMAP version of the 8250 can actually use 1:1 serial8250_startup().
However it needs to be extended by a wakeup irq which should to be
requested
There is no access to access a struct uart_8250_port for a specific
line. This is only required outside of the 8250/uart callbacks like for
devices' suspend remove callbacks. For those the 8250-core provides
wrapper like serial8250_unregister_port() which passes the struct
to the proper function
While comparing the OMAP-serial and the 8250 part of this I noticed that
the the latter does not use runtime-pm. Here are the pieces. It is
basically a get before first register access and a last_busy + put after
last access.
If I understand this correct, it should do nothing as long as
This patch provides a 8250-core based UART driver for the internal OMAP
UART. The longterm goal is to provide the same functionality as the
current OMAP uart driver and hopefully DMA support which could borrowed
from the 8250-core.
It has been only tested as console UART on am335x-evm and
This is version three of the patch set. Unless something serious comes up
I would drop the RFC on the next post.
So far I should have everything covered up comparing to the omap-serial
driver except for the throttle callbacks. And now I would slowly start
looking into DMA support…
Sebastian
--
With the upcomming rs485 support it is required that
serial8250_stop_rx() is called from serial8250_start_tx(). With this
reordering there is no need for a forward declaration of the former
function.
Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
---
So after I stuffed the rs485 support from the omap-serial into
8250-omap, I've been looking at it and the only omap specific part was
the OMAP_UART_SCR_TX_EMPTY part. The driver has always TX_EMPTY set
because the 8250 core expects an interrupt after the TX fifo + shift
register is empty. The
The OMAP version of the 8250 can actually use 1:1 serial8250_startup().
However it needs to be extended by a wakeup irq which should to be
requested enabled at -startup() time and disabled at -shutdown() time.
v1…v2: add shutdown callback
Signed-off-by: Sebastian Andrzej Siewior
+Subject
On 2014-07-09 19:49:31 [+0200], Sebastian Andrzej Siewior wrote:
This is version three of the patch set. Unless something serious comes up
I would drop the RFC on the next post.
So far I should have everything covered up comparing to the omap-serial
driver except for the throttle
On Wed, Jul 09, 2014 at 07:49:36PM +0200, Sebastian Andrzej Siewior wrote:
So after I stuffed the rs485 support from the omap-serial into
8250-omap, I've been looking at it and the only omap specific part was
the OMAP_UART_SCR_TX_EMPTY part. The driver has always TX_EMPTY set
because the 8250
This patch moves data allocated using clk_put and
snd_soc_register_component to the corresponding managed interfaces and
does away with the functions to free memory in the probe and remove
functions. The probe function is no longer required and is completely
removed.
Signed-off-by: Himangi
On 9.07.2014 10:07, Tony Lindgren wrote:
* Suman Anna s-a...@ti.com [140708 11:40]:
Hi Peter,
On 07/08/2014 09:36 AM, Greg KH wrote:
On Tue, Jul 08, 2014 at 03:03:58PM +0200, Peter Meerwald wrote:
Hello,
Given the total lack of response here, I suggest just deleting the
driver. No one
Hi Tony,
On Wednesday 09 July 2014 09:14 PM, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140626 03:28]:
* Sricharan R r.sricha...@ti.com [140626 01:36]:
Hi Tony,
On Thursday 26 June 2014 01:14 PM, Tony Lindgren wrote:
* Sricharan R r.sricha...@ti.com [140626 00:29]:
From: R
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