* Lokesh Vutla [151013 20:53]:
> Hi Tony,
>
> On Wednesday 14 October 2015 04:43 AM, Tony Lindgren wrote:
> > On boards with more than 2GB of RAM booting goes wrong with things not
> > working
> > and we're getting lots of l3 warnings:
> >
> > WARNING: CPU: 0 PID: 1 at
On Wed, Oct 14, 2015 at 04:12:21PM +0300, Peter Ujfalusi wrote:
> The DMA event crossbar on AM33xx/AM43xx is different from the one found in
> DRA7x family.
> Instead of a single event crossbar it has 64 identical mux attached to each
> eDMA event line. When the 0 event mux is selected, the
On Wed, Oct 14, 2015 at 04:12:13PM +0300, Peter Ujfalusi wrote:
> @@ -1320,41 +1317,92 @@ static struct dma_async_tx_descriptor
> *edma_prep_dma_memcpy(
> struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
> size_t len, unsigned long tx_flags)
> {
> - int ret;
> + int
On 14/10/15 16:34, Franklin S Cooper Jr. wrote:
>
>
> On 09/18/2015 09:53 AM, Roger Quadros wrote:
>> Add compatible id, GPMC register resource and interrupt
>> resource to NAND controller nodes.
>>
>> The GPMC driver now implements gpiochip and irqchip so
>> enable gpio-controller and
Hi,
Bin Liu writes:
> Hi,
>
> On 10/13/2015 01:22 PM, Felipe Balbi wrote:
>> Yegor Yefremov writes:
>>> On Mon, Oct 12, 2015 at 11:34 AM, Yegor Yefremov
>>> wrote:
We have a problem, when using more than 12 FTDI ports.
On 10/14/2015 05:48 PM, Vinod Koul wrote:
> On Wed, Oct 14, 2015 at 04:12:21PM +0300, Peter Ujfalusi wrote:
>> The DMA event crossbar on AM33xx/AM43xx is different from the one found in
>> DRA7x family.
>> Instead of a single event crossbar it has 64 identical mux attached to each
>> eDMA event
On 10/14/2015 09:11 AM, Roger Quadros wrote:
> On 14/10/15 16:26, Franklin S Cooper Jr. wrote:
>>
>> On 10/14/2015 06:52 AM, Roger Quadros wrote:
>>> Franklin,
>>>
>>> On 14/10/15 14:36, Roger Quadros wrote:
On 13/10/15 04:38, Franklin S Cooper Jr wrote:
> Switch from
Hi,
On 10/13/2015 01:22 PM, Felipe Balbi wrote:
Yegor Yefremov writes:
On Mon, Oct 12, 2015 at 11:34 AM, Yegor Yefremov
wrote:
We have a problem, when using more than 12 FTDI ports. Kernels tried:
3.18.1, 4.2.3 and 4.3-rc5. SoC am335x
* Franklin S Cooper Jr. [151014 07:37]:
>
>
> On 10/14/2015 09:11 AM, Roger Quadros wrote:
> > On 14/10/15 16:26, Franklin S Cooper Jr. wrote:
> >>
> >> On 10/14/2015 06:52 AM, Roger Quadros wrote:
> >>> Franklin,
> >>>
> >>> On 14/10/15 14:36, Roger Quadros wrote:
> On
* Arnd Bergmann [151014 02:20]:
> On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote:
> > On boards with more than 2GB of RAM booting goes wrong with things not
> > working
> > and we're getting lots of l3 warnings:
> >
> > WARNING: CPU: 0 PID: 1 at
On Wed, Oct 14, 2015 at 02:42:42PM +0300, Peter Ujfalusi wrote:
> Hi,
>
> Cover letter:
>
> with this series the edma two driver setup will be changed to have only one
> driver to support eDMA3. The legacy edma interface will be removed and eDMA
> can
> only be used via dmaengine API from this
On 10/14/2015 10:56 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
Hi,
On 10/13/2015 01:22 PM, Felipe Balbi wrote:
Yegor Yefremov writes:
On Mon, Oct 12, 2015 at 11:34 AM, Yegor Yefremov
wrote:
We have a problem, when
On 10/14/2015 09:17 AM, Roger Quadros wrote:
> On 14/10/15 16:34, Franklin S Cooper Jr. wrote:
>>
>> On 09/18/2015 09:53 AM, Roger Quadros wrote:
>>> Add compatible id, GPMC register resource and interrupt
>>> resource to NAND controller nodes.
>>>
>>> The GPMC driver now implements gpiochip and
This series implements the handling of a pending imprecise abort left behind
by the bootloader/firmware running before Linux in the common ARM startup code.
It turns pending imprecise aborts that may signal during the first unmasking
of such aborts on the boot CPU into a non-faulting event and
Install a non-faulting handler just before unmasking imprecise aborts
and switch back to the regular one after unmasking is done.
This catches any pending imprecise abort that the firmware/bootloader
may have left behind that would normally crash the kernel at that point.
As there are apparently
This is not needed anymore. Handling a potentially pending imprecise external
abort left behind by the bootloader is now done in a slightly safer way inside
the common ARM startup code.
Signed-off-by: Lucas Stach
---
arch/arm/mach-bcm/bcm_5301x.c | 35
This is not needed anymore. Handling a potentially pending imprecise external
abort left behind by the bootloader is now done in a slightly safer way inside
the common ARM startup code.
Signed-off-by: Lucas Stach
---
arch/arm/mach-omap2/pdata-quirks.c | 29
This is not needed anymore. Handling a potentially pending imprecise external
abort left behind by the bootloader is now done in a slightly safer way inside
the common ARM startup code.
Signed-off-by: Lucas Stach
---
arch/arm/mach-mvebu/board-v7.c | 35
On 10/14/2015 05:41 PM, Vinod Koul wrote:
> On Wed, Oct 14, 2015 at 04:12:13PM +0300, Peter Ujfalusi wrote:
>> @@ -1320,41 +1317,92 @@ static struct dma_async_tx_descriptor
>> *edma_prep_dma_memcpy(
>> struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
>> size_t len, unsigned long
On Wednesday, October 14, 2015 10:18:27 AM Marc Titinger wrote:
> On 14/10/2015 02:55, Rafael J. Wysocki wrote:
> > On Monday, September 28, 2015 03:20:44 PM Marc Titinger wrote:
> >> - change arg3 to a state name string: we got the current CPU rom the trace
> >> backend already. This also
Hi,
Bin Liu writes:
> On 10/14/2015 10:56 AM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Bin Liu writes:
>>> Hi,
>>>
>>> On 10/13/2015 01:22 PM, Felipe Balbi wrote:
Yegor Yefremov writes:
> On Mon, Oct 12, 2015 at 11:34 AM, Yegor
Hi,
Bin Liu writes:
> On 10/14/2015 12:05 PM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Bin Liu writes:
>>> Felipe,
>>>
>>> On 10/14/2015 11:25 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
> On 10/14/2015 10:56 AM, Felipe Balbi wrote:
* Heiko Schocher [151012 22:58]:
> Of this, secure content (including PPA) uses initial
> portion of the SRAM. This chunk is not (and shouldn't
> be) accessible from the public code.
>
> The minimum size of this chunk (0x350) is used in this
> patch. Available size is rounded off
On 10/14/2015 12:19 PM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
On 10/14/2015 12:05 PM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
Felipe,
On 10/14/2015 11:25 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
On 10/14/2015 10:56 AM, Felipe Balbi
On 10/14/2015 11:18 AM, Tony Lindgren wrote:
> * Franklin S Cooper Jr. [151014 07:37]:
>>
>> On 10/14/2015 09:11 AM, Roger Quadros wrote:
>>> On 14/10/15 16:26, Franklin S Cooper Jr. wrote:
On 10/14/2015 06:52 AM, Roger Quadros wrote:
> Franklin,
>
> On 14/10/15
On 10/14/2015 12:05 PM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
Felipe,
On 10/14/2015 11:25 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
On 10/14/2015 10:56 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
Hi,
On 10/13/2015 01:22 PM, Felipe
Hi,
* Lucas Stach [151014 07:52]:
> This is not needed anymore. Handling a potentially pending imprecise external
> abort left behind by the bootloader is now done in a slightly safer way inside
> the common ARM startup code.
With commit bbeb92095159 ("ARM: 8422/1:
Hi,
Bin Liu writes:
> Felipe,
>
> On 10/14/2015 11:25 AM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Bin Liu writes:
>>> On 10/14/2015 10:56 AM, Felipe Balbi wrote:
Hi,
Bin Liu writes:
> Hi,
>
> On 10/13/2015 01:22 PM, Felipe
On 13/10/15 16:44, Franklin S Cooper Jr wrote:
> ELM address information is provided by device tree. No longer need
> to include this information within hwmod.
>
> Signed-off-by: Franklin S Cooper Jr
Acked-by: Roger Quadros
Franklin,
Can you please do the same
On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote:
> On boards with more than 2GB of RAM booting goes wrong with things not working
> and we're getting lots of l3 warnings:
>
> WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147
> l3_interrupt_handler+0x260/0x384()
> 4400.ocp:L3
Some module needs more than one functional clock in order to be accessible,
like the McASPs found in DRA7xx family.
This flag will indicate that the opt_clks need to be handled at the same
time as the main_clk for the given hwmod, ensuring that all needed clocks
are enabled before we try to access
Hi Paul,
This is the followup series for the hwmod changes needed to get audio working
on DRA7xx family based boards.
The DTS patches has been applied by Tony from the original series:
http://www.spinics.net/lists/linux-omap/msg121473.html
I have addressed your comments in the hwmod data and did
On 14/10/2015 02:55, Rafael J. Wysocki wrote:
On Monday, September 28, 2015 03:20:44 PM Marc Titinger wrote:
- change arg3 to a state name string: we got the current CPU rom the trace
backend already. This also prepares for multiple/named states in the power
domain, consistent with idle-states.
McASP3 is used by default on DRA7x based boards for audio.
Signed-off-by: Peter Ujfalusi
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 +++
1 file changed, 56 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+Dave
On 14/10/15 08:52, Vignesh R wrote:
> On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from lower power
> state via pinctrl and IO daisy chain using generic wakeirq framework.
> With commit 3fffd1283927 ("i2c: allow specifying separate wakeup
> interrupt in device tree") i2c core
Tony,
On 13/10/15 18:18, Tony Lindgren wrote:
> * Roger Quadros [151012 23:33]:
>> On 13/10/15 03:43, Tony Lindgren wrote:
>>> * Roger Quadros [150918 08:00]:
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC driver now implements gpiochip and irqchip so
enable gpio-controller and interrupt-controller properties.
With this the interrupt parent of NAND node changes so fix it
accordingly.
Signed-off-by:
On 10/14/2015 02:16 PM, Roger Quadros wrote:
>
> On 14/10/15 08:52, Vignesh R wrote:
>> On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from lower power
>> state via pinctrl and IO daisy chain using generic wakeirq framework.
>> With commit 3fffd1283927 ("i2c: allow specifying separate
I see that people are still sending emails to my old address (that no
longer exists) since is the one mentioned in the IGEP DTS. Replace it
with my current email address to avoid this.
Signed-off-by: Javier Martinez Canillas
---
arch/arm/boot/dts/omap3-igep.dtsi
* Javier Martinez Canillas [151013 10:43]:
> Hello Laurent,
>
> Thanks a lot for the patch.
>
> On Tue, Oct 13, 2015 at 7:31 PM, Laurent Pinchart
> wrote:
> > Use the macro instead of absolute register offsets to make the code more
> >
The following changes since commit 25cb62b76430a91cc6195f902e61c2cb84ade622:
Linux 4.3-rc5 (2015-10-11 11:09:45 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v4.3/fixes-rc5
for you to fetch changes up to
On 10/14/2015 01:13 PM, Tony Lindgren wrote:
> * Franklin S Cooper Jr. [151014 09:27]:
>>
>> On 10/14/2015 11:18 AM, Tony Lindgren wrote:
>>> * Franklin S Cooper Jr. [151014 07:37]:
On 10/14/2015 09:11 AM, Roger Quadros wrote:
> On 14/10/15 16:26,
On Wednesday 14 October 2015 09:17:56 Tony Lindgren wrote:
> * Arnd Bergmann [151014 02:20]:
> > On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote:
> > > On boards with more than 2GB of RAM booting goes wrong with things not
> > > working
> > > and we're getting lots of l3
* Suman Anna [151014 13:32]:
> On 10/14/2015 03:12 PM, Arnd Bergmann wrote:
> > On Wednesday 14 October 2015 09:17:56 Tony Lindgren wrote:
> >> * Arnd Bergmann [151014 02:20]:
> >>> On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote:
> On boards with more
* Mark Jackson [151014 06:35]:
> Add USB hooks into NanoBone DTS file
Hmm looking at things, we really should not set status = "disabled"
for any of the internal devices. Setting "disabled" makes the kernel
completely ignore the device and we're better off from PM point of
* Tero Kristo [151014 04:52]:
> Remove the OMAP3 core DPLL re-program code, and the associated SRAM
> code that does the low-level programming of the DPLL divider, idling
> of the SDRAM etc.
>
> This code was never fully implemented in the kernel; things missing
> were driver
On 10/14/2015 03:12 PM, Arnd Bergmann wrote:
> On Wednesday 14 October 2015 09:17:56 Tony Lindgren wrote:
>> * Arnd Bergmann [151014 02:20]:
>>> On Tuesday 13 October 2015 16:13:20 Tony Lindgren wrote:
On boards with more than 2GB of RAM booting goes wrong with things not
The following changes since commit 049e6dde7e57f0054fdc49102e7ef4830c698b46:
Linux 4.3-rc4 (2015-10-04 16:57:17 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v4.4/dt-pt1
for you to fetch changes up to
The following changes since commit 049e6dde7e57f0054fdc49102e7ef4830c698b46:
Linux 4.3-rc4 (2015-10-04 16:57:17 +0100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v4.4/cleanup-pt1
for you to fetch changes up to
Lucas,
On Wed, 14 Oct 2015 16:48:32 +0200, Lucas Stach wrote:
> This is not needed anymore. Handling a potentially pending imprecise external
> abort left behind by the bootloader is now done in a slightly safer way inside
> the common ARM startup code.
>
> Signed-off-by: Lucas Stach
On 10/14/2015 04:48 PM, Lucas Stach wrote:
> This is not needed anymore. Handling a potentially pending imprecise external
> abort left behind by the bootloader is now done in a slightly safer way inside
> the common ARM startup code.
>
> Signed-off-by: Lucas Stach
On 10/14/2015 04:48 PM, Lucas Stach wrote:
> Install a non-faulting handler just before unmasking imprecise aborts
> and switch back to the regular one after unmasking is done.
>
> This catches any pending imprecise abort that the firmware/bootloader
> may have left behind that would normally
* Tony Lindgren [151014 10:56]:
> * Heiko Schocher [151012 22:58]:
> > Of this, secure content (including PPA) uses initial
> > portion of the SRAM. This chunk is not (and shouldn't
> > be) accessible from the public code.
> >
> > The minimum size of this chunk
Hi,
This series fixes warnings and console noise for boards that don't use
ssi ports. Tested on beagleboard-c4.
cheers,
-roger
Roger Quadros (2):
hsi: omap_ssi_port: Prevent warning if cawake_gpio is not defined.
ARM: dts: omap3: keep ssi ports by default
arch/arm/boot/dts/omap3-n900.dts
The error handling path is broken as cawake_gpio was defined as
unsigned integer causing the following warnings on boards that don't
use SSI port and so don't have cawake_gpio defined. e.g. beagleboard C4.
[ 30.094635] WARNING: CPU: 0 PID: 322 at drivers/gpio/gpiolib.c:86
Vignesh,
On 14/10/15 12:12, Vignesh R wrote:
>
>
> On 10/14/2015 02:16 PM, Roger Quadros wrote:
>
>>
>> On 14/10/15 08:52, Vignesh R wrote:
>>> On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from lower power
>>> state via pinctrl and IO daisy chain using generic wakeirq framework.
>>>
On 10/14/2015 01:27 PM, Vinod Koul wrote:
> On Thu, Sep 24, 2015 at 01:01:47PM +0300, Peter Ujfalusi wrote:
>> Hi,
>>
>> Cover letter:
>>
>> with this series the edma two driver setup will be changed to have only one
>> driver to support eDMA3. The legacy edma interface will be removed and eDMA
On 10/14/2015 01:20 PM, Vinod Koul wrote:
> On Thu, Sep 24, 2015 at 01:02:07PM +0300, Peter Ujfalusi wrote:
>
>> +if (edesc->cyclic) {
>> +vchan_cyclic_callback(>vdesc);
>> +spin_unlock(>vchan.lock);
>> +return;
>> +} else if (edesc->processed ==
Hi,
On Wed, Oct 14, 2015 at 01:44:16PM +0300, Roger Quadros wrote:
> Let's keep the SSI ports disabled in the omap3.dtsi to avoid
> getting the following noise on the console for boards that don't
> use the SSI ports.
>
> "omap_ssi_port 4805a000.ssi-port: DT data is missing cawake gpio (err=-2)"
Hi,
On Wed, Oct 14, 2015 at 01:44:15PM +0300, Roger Quadros wrote:
> The error handling path is broken as cawake_gpio was defined as
> unsigned integer causing the following warnings on boards that don't
> use SSI port and so don't have cawake_gpio defined. e.g. beagleboard C4.
>
> [...]
Thanks,
On 10/14/2015 04:34 PM, Roger Quadros wrote:
> Vignesh,
>
> On 14/10/15 12:12, Vignesh R wrote:
>>
>>
>> On 10/14/2015 02:16 PM, Roger Quadros wrote:
>>
>>>
>>> On 14/10/15 08:52, Vignesh R wrote:
On am437x-gp-evm, pixcir_i2c_ts can wakeup the system from lower power
state via pinctrl
On Thu, Sep 24, 2015 at 01:02:07PM +0300, Peter Ujfalusi wrote:
> + if (edesc->cyclic) {
> + vchan_cyclic_callback(>vdesc);
> + spin_unlock(>vchan.lock);
> + return;
> + } else if (edesc->processed == edesc->pset_nr) {
> + dev_dbg(dev,
On Wednesday 14 October 2015 13:44:16 Roger Quadros wrote:
> Let's keep the SSI ports disabled in the omap3.dtsi to avoid
> getting the following noise on the console for boards that don't
> use the SSI ports.
>
> "omap_ssi_port 4805a000.ssi-port: DT data is missing cawake gpio (err=-2)"
>
> As
Hi Pali,
On Wed, Oct 14, 2015 at 12:53:04PM +0200, Pali Rohár wrote:
> On Wednesday 14 October 2015 13:44:16 Roger Quadros wrote:
> > Let's keep the SSI ports disabled in the omap3.dtsi to avoid
> > getting the following noise on the console for boards that don't
> > use the SSI ports.
> >
> >
On 14/10/15 14:19, Sebastian Reichel wrote:
> Hi,
>
> On Wed, Oct 14, 2015 at 01:44:16PM +0300, Roger Quadros wrote:
>> Let's keep the SSI ports disabled in the omap3.dtsi to avoid
>> getting the following noise on the console for boards that don't
>> use the SSI ports.
>>
>> "omap_ssi_port
Hi,
On Wed, Oct 14, 2015 at 02:27:27PM +0300, Roger Quadros wrote:
> On 14/10/15 14:19, Sebastian Reichel wrote:
> > On Wed, Oct 14, 2015 at 01:44:16PM +0300, Roger Quadros wrote:
> >> Let's keep the SSI ports disabled in the omap3.dtsi to avoid
> >> getting the following noise on the console for
On 10/14/2015 02:12 PM, Peter Ujfalusi wrote:
>>> + } else if (edma_read(ecc, EDMA_QEMR)) {
>>> + dev_dbg(ecc->dev, "QEMR %02x\n",
>>> + edma_read(ecc, EDMA_QEMR));
>>> + for (i = 0; i < 8; i++) {
>>> +
On 13/10/15 04:38, Franklin S Cooper Jr wrote:
> Switch from dma_request_channel to allow passing dma channel
> information from DT rather than hardcoding a value.
>
> Signed-off-by: Franklin S Cooper Jr
Acked-by: Roger Quadros
> ---
> drivers/mtd/nand/omap2.c
* Tony Lindgren [151014 15:27]:
> * Tony Lindgren [151014 10:56]:
> > * Heiko Schocher [151012 22:58]:
> > > Of this, secure content (including PPA) uses initial
> > > portion of the SRAM. This chunk is not (and shouldn't
> > > be) accessible
In the ccerr interrupt handler the code checks for pending errors in the
error status registers in two different places.
Move the check out to a helper function.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 20
1 file changed, 12
Hi,
Changes since v4:
- checkpatch errors/warnings/checks has been fixed in spot and not in a followup
patch.
- Sekhar's Acked-by added to patches touching arch/arm/mach-davinci/
- Other comments for v4 has been addressed
Changes since v3:
- Separated the two (patch 10/11 in v2 patch 10 in v3)
Instead of using defines to specify the size of different arrays and
bitmaps, allocate the memory for them based on the information we get from
the HW itself.
Since these defines are set based on the worst case, there are devices
where they are not valid.
Signed-off-by: Peter Ujfalusi
Move the code out from arch/arm/common and merge it inside of the dmaengine
driver.
This change is done with as minimal (if eny) functional change to the code
as possible to avoid introducing regression.
Signed-off-by: Peter Ujfalusi
Acked-by: Tony Lindgren
Warning message in case of linking between paRAM slots in different eDMA
controllers.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index f6653da0ee16..d33ae0b43925
With the merger of the arch/arm/common/edma.c code into the dmaengine
driver, there is no longer need to have per channel callback/data storage
for interrupt events.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 450
Instead of directly reading it from CCCFG register take the information out
once when we set up the configuration from the HW.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
On 14/10/15 14:37, Sebastian Reichel wrote:
> Hi,
>
> On Wed, Oct 14, 2015 at 02:27:27PM +0300, Roger Quadros wrote:
>> On 14/10/15 14:19, Sebastian Reichel wrote:
>>> On Wed, Oct 14, 2015 at 01:44:16PM +0300, Roger Quadros wrote:
Let's keep the SSI ports disabled in the omap3.dtsi to avoid
On Fri, Oct 02, 2015 at 06:02:42PM -0500, Suman Anna wrote:
> Suman Anna (2):
> Documentation: dt: Update OMAP iommu bindings for DRA7 DSPs
> iommu/omap: Add support for configuring dsp iommus on DRA7xx
>
> .../devicetree/bindings/iommu/ti,omap-iommu.txt| 27 ++
>
On 13/10/15 04:38, Franklin S Cooper Jr wrote:
> The prefetch engine sends a dma request once a FIFO threshold has
> been met. No other requests are received until the previous request
> is handled.
>
> Starting an edma transfer (dma_async_issue_pending) results in any
> previous event for the
No need to run through the bits in QEMR and CCERR events since they will
not trigger any action, so just clearing the errors there is fine.
In case of the missed event the loop can be optimized so we spend less time
to handle the event.
Signed-off-by: Peter Ujfalusi
---
The upcoming change to merge the arch/arm/common/edma.c into
drivers/dma/edma.c will need this change when booting daVinci devices in
no DT mode.
Signed-off-by: Peter Ujfalusi
Acked-by: Sekhar Nori
---
arch/arm/mach-davinci/devices-da8xx.c | 2 ++
Convert the eDMA platform device creation to use
struct platform_device_info XX __initconst and
platform_device_register_full()
This will allow us to cleanly specify the dma_mask for the devices in an
upcoming patch.
Signed-off-by: Peter Ujfalusi
Acked-by: Sekhar Nori
The code path in edma_execute() and edma_callback() can be simplified
and make it more optimal.
There is not need to call in to edma_execute() when the transfer
has been finished for example.
Also the handling of missed/first or next batch of paRAMs can
be done in a more optimal way.
On 13/10/15 04:38, Franklin S Cooper Jr wrote:
> Add additional details to the gpmc and nand documentation to clarify
> what is needed to enable nand dma prefetch.
>
> Signed-off-by: Franklin S Cooper Jr
> ---
> Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
Since the driver stack no longer depends on lookup with id number in a
global array of pointers, the limitation for the number of eDMAs are no
longer needed. We can handle as many eDMAs in legacy and DT boot as we have
memory for them to allocate the needed structures.
Signed-off-by: Peter
Currently we have one device created to handle all (maximum 2) eDMAs in the
system.
With this change all eDMA instance will have it's own device/driver.
This change is needed for further cleanups in the eDMA driver stack since
the one device/driver to handle all eDMAs in the system was not
If the of_dma_controller is registered in the non dmaengine driver we could
have race condition:
the of_dma_controller has been registered, but the dmaengine driver is not
yet probed. Drivers requesting DMA channels during this window will fail
since we do not yet have dmaengine drivers
We no longer have users for these functions so they can be removed.
Remove also unused enums from the header file.
Signed-off-by: Peter Ujfalusi
---
arch/arm/common/edma.c | 376 -
include/linux/platform_data/edma.h | 33
edma_write_slot() is for writing an entire paRAM slot.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index 08f9bd0aa0b3..f6653da0ee16 100644
---
If the eDMA3 has support for channel paRAM slot mapping we can utilize it
to allocate slots on demand and save precious slots for real transfers.
On am335x the eDMA has 64 channels which means we can unlock 64 paRAM
slots out from the available 256.
Signed-off-by: Peter Ujfalusi
On 13/10/15 04:38, Franklin S Cooper Jr wrote:
> Add dma channel information to the gpmc. Although not enabled by
> default this will allow prefetch-dma to be used.
>
> Signed-off-by: Franklin S Cooper Jr
> ---
> arch/arm/boot/dts/am33xx.dtsi | 2 ++
>
The names chosen for the bitfields were quite confusing and given no real
information on what they are used for...
edma_inuse -> slot_inuse: tracks the slot usage/availability
edma_unused -> channel_unused: tracks the channel usage/availability
Signed-off-by: Peter Ujfalusi
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that does the low-level programming of the DPLL divider, idling
of the SDRAM etc.
This code was never fully implemented in the kernel; things missing
were driver side handling of core clock changes (they need to account
for
Merge the iomem into the 'struct edma' and change the internal (static)
functions to use pointer to the edma_cc instead of the ctlr number.
Signed-off-by: Peter Ujfalusi
---
arch/arm/common/edma.c | 400 -
1 file changed,
On 10/12/2015 08:01 PM, Tony Lindgren wrote:
* Tony Lindgren [150812 03:59]:
* Tony Lindgren [150812 00:29]:
* Tero Kristo [150716 01:10]:
Remove the OMAP3 core DPLL re-program code, and the associated SRAM
code that does the low-level
Remove or rewrite the comments for the internal functions.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 86 +++---
1 file changed, 11 insertions(+), 75 deletions(-)
diff --git a/drivers/dma/edma.c
We have access to dev, so it is better to use the dev_dbg for debug prints.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index
Instead of relying on indexes pointing to edma private date in the global
pointer array, pass the private data pointer via the public API.
Signed-off-by: Peter Ujfalusi
---
arch/arm/common/edma.c | 305 ++---
drivers/dma/edma.c
Be consistent and do not mix the use of dev, >dev, etc in the
functions.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 61 +++---
1 file changed, 30 insertions(+), 31 deletions(-)
diff --git a/drivers/dma/edma.c
When allocating a memory for number of items it is better (looks better)
to use devm_kcalloc.
Signed-off-by: Peter Ujfalusi
---
drivers/dma/edma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c
index
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