[PATCH] DSS2: Code Clean-up
* Removed duplicate return statement
* General code clean-up
My 1st patch.
---
diff --git a/drivers/video/omap2/dss/display.c
b/drivers/video/omap2/dss/display.c
index 6a74ea1..a5a6859 100644
--- a/drivers/video/omap2/dss/display.c
+++ b/drivers/video/omap2/dss/display.c
@@ -340,10 +340,11 @@ int omapdss_default_get_recommended_bpp(struct
omap_dss_device *dssdev)
return 24;
else
return 16;
+
case OMAP_DISPLAY_TYPE_VENC:
case OMAP_DISPLAY_TYPE_SDI:
return 24;
- return 24;
+
default:
BUG();
}
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index f0ba573..0185782 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -450,10 +450,6 @@ static void venc_power_off(struct omap_dss_device *dssdev)
venc_enable_clocks(0);
}
-
-
-
-
/* driver */
static int venc_panel_probe(struct omap_dss_device *dssdev)
{
@@ -654,8 +650,6 @@ static struct omap_dss_driver venc_driver = {
};
/* driver end */
-
-
int venc_init(struct platform_device *pdev)
{
u8 rev_id;
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c
b/drivers/video/omap2/omapfb/omapfb-main.c
index 4a76917..6d72784 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -1771,8 +1771,7 @@ static int omapfb_fb_init(struct omapfb2_device
*fbdev, struct fb_info *fbi)
var->bits_per_pixel = 32;
break;
default:
- dev_err(fbdev->dev, "illegal display "
- "bpp\n");
+ dev_err(fbdev->dev, "illegal display bpp\n");
return -EINVAL;
}
}
--
1.6.3.3
--
--
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RE: [PATCH] ARM:iommu support for OMAP4
> -Original Message-
> From: Kanigeri, Hari
> Sent: Friday, April 16, 2010 9:47 PM
> To: linux-omap@vger.kernel.org
> Cc: Doyu Hiroshi (Nokia-D/Helsinki); Shilimkar, Santosh; t...@atomide.com
> Subject: [PATCH] ARM:iommu support for OMAP4
>
> From 708914e1a82a608d423b050cb31b4deb46eb8411 Mon Sep 17 00:00:00 2001
> From: Hari Kanigeri
> Date: Mon, 8 Mar 2010 17:55:21 -0600
> Subject: [PATCH] ARM:iommu support for OMAP4
>
> This patch provides the iommu support for OMAP4 co-processors.
>
> Signed-off-by: Hari Kanigeri
> ---
> arch/arm/mach-omap2/Makefile |2 +-
> arch/arm/mach-omap2/omap4-iommu.c | 110
> +
> arch/arm/plat-omap/iommu.c| 10 ++-
> 3 files changed, 117 insertions(+), 5 deletions(-)
> create mode 100644 arch/arm/mach-omap2/omap4-iommu.c
>
> diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
> index d3e54da..1395125 100644
> --- a/arch/arm/mach-omap2/Makefile
> +++ b/arch/arm/mach-omap2/Makefile
> @@ -77,7 +77,7 @@ mailbox_mach-objs := mailbox.o
>
> iommu-y += iommu2.o
> iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o
> -
> +iommu-$(CONFIG_ARCH_OMAP4) += omap4-iommu.o
> obj-$(CONFIG_OMAP_IOMMU) += $(iommu-y)
>
> i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
> diff --git a/arch/arm/mach-omap2/omap4-iommu.c
> b/arch/arm/mach-omap2/omap4-iommu.c
> new file mode 100644
> index 000..6225616
> --- /dev/null
> +++ b/arch/arm/mach-omap2/omap4-iommu.c
> @@ -0,0 +1,110 @@
> +/*
> + * omap iommu: omap4 device registration
> + *
> + * Copyright (C) 2009-2010 Nokia Corporation
You should Add TI copyrights as well here
> + *
> + * Written by Hari Kanigeri
> + *
> + * Added support for OMAP4. This is based on original file
> + * omap3-iommu.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include
> +
> +#include
> +#include
> +
> +#define OMAP4_MMU1_BASE 0x55082000
> +#define OMAP4_MMU2_BASE 0x4A066000
Can you move these base definitions to plat/omap44xx.h and use
them directly.
> +
> +#define OMAP4_MMU1_IRQ INT_44XX_DUCATI_MMU_IRQ
> +#define OMAP4_MMU2_IRQ INT_44XX_DSP_MMU
> +
> +
> +
> +static unsigned long iommu_base[] __initdata = {
> + OMAP4_MMU1_BASE,
> + OMAP4_MMU2_BASE,
> +};
> +
> +static int iommu_irq[] __initdata = {
> + OMAP4_MMU1_IRQ,
> + OMAP4_MMU2_IRQ,
> +};
> +
> +static const struct iommu_platform_data omap4_iommu_pdata[] __initconst = {
> + {
> + .name = "ducati",
> + .nr_tlb_entries = 32,
> + },
> +#if defined(CONFIG_MPU_TESLA_IOMMU)
> + {
> + .name = "tesla",
> + .nr_tlb_entries = 32,
> + },
> +#endif
> +};
> +#define NR_IOMMU_DEVICES ARRAY_SIZE(omap4_iommu_pdata)
> +
> +static struct platform_device *omap4_iommu_pdev[NR_IOMMU_DEVICES];
> +
> +static int __init omap4_iommu_init(void)
> +{
> + int i, err;
> +
> + for (i = 0; i < NR_IOMMU_DEVICES; i++) {
> + struct platform_device *pdev;
> + struct resource res[2];
> +
> + pdev = platform_device_alloc("omap-iommu", i);
> + if (!pdev) {
> + err = -ENOMEM;
> + goto err_out;
> + }
> +
> + memset(res, 0, sizeof(res));
> + res[0].start = iommu_base[i];
> + res[0].end = iommu_base[i] + MMU_REG_SIZE - 1;
> + res[0].flags = IORESOURCE_MEM;
> + res[1].start = res[1].end = iommu_irq[i];
> + res[1].flags = IORESOURCE_IRQ;
> +
> + err = platform_device_add_resources(pdev, res,
> + ARRAY_SIZE(res));
> + if (err)
> + goto err_out;
> + err = platform_device_add_data(pdev, &omap4_iommu_pdata[i],
> +sizeof(omap4_iommu_pdata[0]));
> + if (err)
> + goto err_out;
> + err = platform_device_add(pdev);
> + if (err)
> + goto err_out;
> + omap4_iommu_pdev[i] = pdev;
> + }
> + return 0;
> +
> +err_out:
> + while (i--)
> + platform_device_put(omap4_iommu_pdev[i]);
> + return err;
> +}
> +module_init(omap4_iommu_init);
> +
> +static void __exit omap4_iommu_exit(void)
> +{
> + int i;
> +
> + for (i = 0; i < NR_IOMMU_DEVICES; i++)
> + platform_device_unregister(omap4_iommu_pdev[i]);
> +}
> +module_exit(omap4_iommu_exit);
> +
> +MODULE_AUTHOR("Hiroshi DOYU, Hari Kanigeri");
> +MODULE_DESCRIPTION("omap iommu: omap4 device registration");
> +MODULE_LICENSE("GPL v2");
> +
> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
> index 905ed83.
[PATCH 5/5] DSPBRIDGE: Remove Reg module
>From 1046e5fabff98074f706ed257c040ca3dd0decdb Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 21:46:50 -0500
Subject: [PATCH 5/5] DSPBRIDGE: Remove Reg module
Remove Reg module from services.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/dbdcddef.h |8 +
arch/arm/plat-omap/include/dspbridge/reg.h | 150 --
drivers/dsp/bridge/Makefile |4 +-
drivers/dsp/bridge/rmgr/dbdcd.c | 220 +++-
drivers/dsp/bridge/rmgr/drv.c |1 -
drivers/dsp/bridge/rmgr/drv_interface.c |1 -
drivers/dsp/bridge/rmgr/dspdrv.c|1 -
drivers/dsp/bridge/rmgr/proc.c |1 -
drivers/dsp/bridge/services/cfg.c |1 -
drivers/dsp/bridge/services/reg.c | 142 -
drivers/dsp/bridge/services/regsup.c| 245 ---
drivers/dsp/bridge/services/regsup.h| 48 -
drivers/dsp/bridge/services/services.c | 10 +-
drivers/dsp/bridge/wmd/io_sm.c |1 -
drivers/dsp/bridge/wmd/tiomap3430.c |1 -
15 files changed, 178 insertions(+), 656 deletions(-)
delete mode 100644 arch/arm/plat-omap/include/dspbridge/reg.h
delete mode 100644 drivers/dsp/bridge/services/reg.c
delete mode 100644 drivers/dsp/bridge/services/regsup.c
delete mode 100644 drivers/dsp/bridge/services/regsup.h
diff --git a/arch/arm/plat-omap/include/dspbridge/dbdcddef.h
b/arch/arm/plat-omap/include/dspbridge/dbdcddef.h
index 7f59bb7..492c93c 100644
--- a/arch/arm/plat-omap/include/dspbridge/dbdcddef.h
+++ b/arch/arm/plat-omap/include/dspbridge/dbdcddef.h
@@ -32,9 +32,17 @@
#define DCD_REGKEY "Software\\TexasInstruments\\DspBridge\\DCD"
#define DCD_REGISTER_SECTION".dcd_register"
+#define DCD_MAXPATHLENGTH255
+
/* DCD Manager Object */
struct dcd_manager;
+struct dcd_key_elem {
+ struct list_head link; /* Make it linked to a list */
+ char name[DCD_MAXPATHLENGTH]; /* Name of a given value entry */
+ char *path; /* Pointer to the actual data */
+};
+
/* DCD Node Properties */
struct dcd_nodeprops {
struct dsp_ndbprops ndb_props;
diff --git a/arch/arm/plat-omap/include/dspbridge/reg.h
b/arch/arm/plat-omap/include/dspbridge/reg.h
deleted file mode 100644
index 8f32157..000
--- a/arch/arm/plat-omap/include/dspbridge/reg.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * reg.h
- *
- * DSP-BIOS Bridge driver support functions for TI OMAP processors.
- *
- * Provides registry functions.
- *
- * Copyright (C) 2005-2006 Texas Instruments, Inc.
- *
- * This package is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
- * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
- */
-
-#ifndef _REG_H
-#define _REG_H
-
-#include
-
-#define REG_MAXREGPATHLENGTH255
-
-/*
- * reg_delete_value
- * Purpose:
- * Deletes a registry entry. NOTE: A registry entry is not the same as
- * a registry key.
- * Parameters:
- * pstrValue: Name of entry to delete.
- * Returns:
- * DSP_SOK:Success.
- * DSP_EFAIL: General failure.
- * Requires:
- * - REG initialized.
- * - pstrValue is non-NULL value.
- * - length of pstrValue < REG_MAXREGPATHLENGTH.
- * Ensures:
- * Details:
- */
-extern dsp_status reg_delete_value(IN CONST char *pstrValue);
-
-/*
- * reg_enum_value
- * Purpose:
- * Enumerates values of a specified key. Retrieves each value name and
- * the data associated with the value.
- * Parameters:
- * dw_index:Specifies the index of the value to retrieve.
- * pstrKey:The name of the registry key to be enumerated.
- * pstrValue: Pointer to buffer that receives the name of the value.
- * pdwValueSize: Specifies bytes of memory pstrValue points to on input,
- * On output, specifies actual memory bytes written into.
- * If there is no value, pdwValueSize returns NULL
- * pstrData: Pointer to buffer that receives the data of a value.
- * pdwDataSize:Specifies bytes of memory in pstrData on input and
- * bytes of memory written into pstrData on output.
- * If there is no data, pdwDataSize returns NULL.
- * Returns:
- * DSP_SOK:Success.
- * DSP_EFAIL: General failure.
- * Requires:
- * REG initialized.
- * pstrKey is a non-NULL value.
- * pstrValue, pstrData, pdwValueSize and pdwDataSize are valid pointers.
- * Length of pstrKey is less than REG_MAXREGPATHLENGTH.
- *
[PATCH 4/5] DSPBRIDGE: Remove handles from registry
>From 874bc262b47319b311d14ca32a7c1afb9eb388e8 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Thu, 1 Apr 2010 00:17:24 -0600
Subject: [PATCH 4/5] DSPBRIDGE: Remove handles from registry
Remove handles from registry.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/drv.h |3 +
drivers/dsp/bridge/services/cfg.c | 59 +--
2 files changed, 40 insertions(+), 22 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/drv.h
b/arch/arm/plat-omap/include/dspbridge/drv.h
index 210ca68..f505b21 100644
--- a/arch/arm/plat-omap/include/dspbridge/drv.h
+++ b/arch/arm/plat-omap/include/dspbridge/drv.h
@@ -128,6 +128,9 @@ struct drv_data {
char *base_img;
s32 shm_size;
int tc_wordswapon;
+ void *drv_object;
+ void *dev_object;
+ void *mgr_object;
};
/* Process Context */
diff --git a/drivers/dsp/bridge/services/cfg.c
b/drivers/dsp/bridge/services/cfg.c
index 8f9f84c..8e2d614 100644
--- a/drivers/dsp/bridge/services/cfg.c
+++ b/drivers/dsp/bridge/services/cfg.c
@@ -82,6 +82,10 @@ dsp_status cfg_get_dev_object(struct cfg_devnode
*dev_node_obj,
{
dsp_status status = DSP_SOK;
u32 dw_buf_size;
+ struct drv_data *drv_datap = dev_get_drvdata(bridge);
+
+ if (!drv_datap)
+ status = DSP_EFAIL;
if (!dev_node_obj)
status = CFG_E_INVALIDHDEVNODE;
@@ -92,14 +96,12 @@ dsp_status cfg_get_dev_object(struct cfg_devnode
*dev_node_obj,
dw_buf_size = sizeof(pdwValue);
if (DSP_SUCCEEDED(status)) {
- /* check the device string and then call the reg_set_value */
+ /* check the device string and then store dev object */
if (!
(strcmp
((char *)((struct drv_ext *)dev_node_obj)->sz_string,
"TIOMAP1510")))
- status =
- reg_get_value("DEVICE_DSP", (u8 *) pdwValue,
- &dw_buf_size);
+ *pdwValue = (u32)drv_datap->dev_object;
}
if (DSP_FAILED(status))
pr_err("%s: Failed, status 0x%x\n", __func__, status);
@@ -144,23 +146,31 @@ dsp_status cfg_get_exec_file(struct cfg_devnode
*dev_node_obj, u32 ul_buf_size,
dsp_status cfg_get_object(OUT u32 *pdwValue, u32 dw_type)
{
dsp_status status = DSP_EINVALIDARG;
- u32 dw_buf_size;
+ struct drv_data *drv_datap = dev_get_drvdata(bridge);
+
DBC_REQUIRE(pdwValue != NULL);
- dw_buf_size = sizeof(pdwValue);
+ if (!drv_datap)
+ return DSP_EFAIL;
+
switch (dw_type) {
case (REG_DRV_OBJECT):
- status =
- reg_get_value(DRVOBJECT, (u8 *) pdwValue, &dw_buf_size);
- if (DSP_FAILED(status))
+ if (drv_datap->drv_object) {
+ *pdwValue = (u32)drv_datap->drv_object;
+ status = DSP_SOK;
+ } else {
status = CFG_E_RESOURCENOTAVAIL;
+ }
break;
case (REG_MGR_OBJECT):
- status =
- reg_get_value(MGROBJECT, (u8 *) pdwValue, &dw_buf_size);
- if (DSP_FAILED(status))
+ if (drv_datap->mgr_object) {
+ *pdwValue = (u32)drv_datap->mgr_object;
+ status = DSP_SOK;
+ } else {
status = CFG_E_RESOURCENOTAVAIL;
+ }
break;
+
default:
break;
}
@@ -191,18 +201,21 @@ bool cfg_init(void)
dsp_status cfg_set_dev_object(struct cfg_devnode *dev_node_obj, u32 dwValue)
{
dsp_status status = DSP_SOK;
- u32 dw_buff_size;
+ struct drv_data *drv_datap = dev_get_drvdata(bridge);
+
+ if (!drv_datap) {
+ pr_err("%s: Failed, status 0x%x\n", __func__, status);
+ return DSP_EFAIL;
+ }
if (!dev_node_obj)
status = CFG_E_INVALIDHDEVNODE;
- dw_buff_size = sizeof(dwValue);
if (DSP_SUCCEEDED(status)) {
/* Store the WCD device object in the Registry */
if (!(strcmp((char *)dev_node_obj, "TIOMAP1510"))) {
- status = reg_set_value("DEVICE_DSP", (u8 *) &dwValue,
- dw_buff_size);
+ drv_datap->dev_object = (void *) dwValue;
}
}
if (DSP_FAILED(status))
@@ -219,17 +232,19 @@ dsp_status cfg_set_dev_object(struct cfg_devnode
*dev_node_obj, u32 dwValue)
dsp_status cfg_set_object(u32 dwValue, u32 dw_type)
{
dsp_status status = DSP_EINVALIDARG;
- u32 dw_buff_size;
+ struct drv_data *drv_datap = dev_get_drvdata(bridge);
+
+ if (!drv_datap)
+ return DSP_EFAIL;
- dw_buff_size = sizeof(dwVa
[PATCH 3/5] DSPBRIDGE: Remove DSP resources from registry
>From 10010c14048a946190356cc682089d35b1bf7f48 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 21:40:57 -0500
Subject: [PATCH 3/5] DSPBRIDGE: Remove DSP resources from registry
Remove DSP resources from registry.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/dbdefs.h |7
arch/arm/plat-omap/include/dspbridge/drv.h|7
drivers/dsp/bridge/rmgr/drv.c |8 ++--
drivers/dsp/bridge/rmgr/drv_interface.c | 43 -
drivers/dsp/bridge/rmgr/proc.c| 10 +-
drivers/dsp/bridge/services/cfg.c | 27 ++-
drivers/dsp/bridge/wmd/tiomap3430.c | 20 +---
7 files changed, 60 insertions(+), 62 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
index 9dcfbfb..150ad05 100644
--- a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
@@ -543,11 +543,4 @@ bit 15 - Output (writeable) buffer
/* Max registry path length. Also the max registry value length. */
#define MAXREGPATHLENGTH 255
-/* MiniDriver related definitions */
-#define DEFEXEC"DefaultExecutable" /* Default executable */
-#define AUTOSTART "AutoStart" /* Statically load flag */
-#define CURRENTCONFIG "CurrentConfig" /* Current resources */
-#define SHMSIZE"SHMSize" /* Size of shm reservd on MPU */
-#define TCWORDSWAP "TCWordSwap"/* Traffic Controller WordSwp */
-
#endif /* DBDEFS_ */
diff --git a/arch/arm/plat-omap/include/dspbridge/drv.h
b/arch/arm/plat-omap/include/dspbridge/drv.h
index 588aa8e..210ca68 100644
--- a/arch/arm/plat-omap/include/dspbridge/drv.h
+++ b/arch/arm/plat-omap/include/dspbridge/drv.h
@@ -123,6 +123,13 @@ enum gpp_proc_res_state {
PROC_RES_FREED
};
+/* Bridge Data */
+struct drv_data {
+ char *base_img;
+ s32 shm_size;
+ int tc_wordswapon;
+};
+
/* Process Context */
struct process_context {
/* Process State */
diff --git a/drivers/dsp/bridge/rmgr/drv.c b/drivers/dsp/bridge/rmgr/drv.c
index e9bb9a8..21b6098 100644
--- a/drivers/dsp/bridge/rmgr/drv.c
+++ b/drivers/dsp/bridge/rmgr/drv.c
@@ -764,6 +764,7 @@ dsp_status drv_request_bridge_res_dsp(void
**phost_resources)
u32 dw_buff_size;
u32 dma_addr;
u32 shm_size;
+ struct drv_data *drv_datap = dev_get_drvdata(bridge);
dw_buff_size = sizeof(struct cfg_hostres);
@@ -806,10 +807,9 @@ dsp_status drv_request_bridge_res_dsp(void
**phost_resources)
dev_dbg(bridge, "dw_wd_timer_dsp_base %p\n",
host_res->dw_wd_timer_dsp_base);
dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
- dw_buff_size = sizeof(shm_size);
- status =
- reg_get_value(SHMSIZE, (u8 *) &shm_size, &dw_buff_size);
- if (DSP_SUCCEEDED(status)) {
+
+ shm_size = drv_datap->shm_size;
+ if (shm_size >= 0x1) {
/* Allocate Physically contiguous,
* non-cacheable memory */
host_res->dw_mem_base[1] =
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
index 06b3803..d9dcd14 100644
--- a/drivers/dsp/bridge/rmgr/drv_interface.c
+++ b/drivers/dsp/bridge/rmgr/drv_interface.c
@@ -247,10 +247,10 @@ static struct notifier_block iva_clk_notifier = {
static int __devinit omap34_xx_bridge_probe(struct platform_device *pdev)
{
int status;
- u32 init_status;
- u32 temp;
+ u32 init_status = DSP_SOK;
dev_t dev = 0;
int result;
+ struct drv_data *drv_datap = NULL;
#ifdef CONFIG_BRIDGE_DVFS
int i = 0;
#endif
@@ -300,21 +300,23 @@ static int __devinit omap34_xx_bridge_probe(struct
platform_device *pdev)
/* Autostart flag. This should be set to true if the DSP image should
* be loaded and run during bridge module initialization */
-
- if (base_img) {
- temp = true;
- reg_set_value(AUTOSTART, (u8 *) &temp, sizeof(temp));
- reg_set_value(DEFEXEC, (u8 *) base_img, strlen(base_img) + 1);
+ drv_datap = mem_calloc(sizeof(struct drv_data), MEM_PAGED);
+ if (drv_datap) {
+ drv_datap->shm_size = shm_size;
+ drv_datap->tc_wordswapon = tc_wordswapon;
+ if (base_img) {
+ drv_datap->base_img = kmalloc(strlen(base_img) + 1,
+ GFP_KERNEL);
+ if (drv_datap->base_img)
+ strncpy(drv_datap->base_img, base_img,
+ strlen(base_img) + 1);
+ else
+ status =
[PATCH 1/5] DSPBRIDGE: Remove DSP resources from registry
>From 9ac5e14af1471b79a64076aec6b866abe87b3365 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Wed, 31 Mar 2010 21:10:16 -0600
Subject: [PATCH 1/5] DSPBRIDGE: Remove DSP resources from registry
Remove DSP resources from registry.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/cfg.h | 21 ---
arch/arm/plat-omap/include/dspbridge/cfgdefs.h |9 -
arch/arm/plat-omap/include/dspbridge/dbdefs.h |1 -
arch/arm/plat-omap/include/dspbridge/dev.h |4 +--
arch/arm/plat-omap/include/dspbridge/wmd.h |3 +-
drivers/dsp/bridge/pmgr/dev.c | 18 +++--
drivers/dsp/bridge/rmgr/mgr.c | 14 ++-
drivers/dsp/bridge/services/cfg.c | 45
drivers/dsp/bridge/wmd/tiomap3430.c|6 +--
9 files changed, 14 insertions(+), 107 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/cfg.h
b/arch/arm/plat-omap/include/dspbridge/cfg.h
index 80c8fde..30e75c1 100644
--- a/arch/arm/plat-omap/include/dspbridge/cfg.h
+++ b/arch/arm/plat-omap/include/dspbridge/cfg.h
@@ -95,27 +95,6 @@ extern dsp_status cfg_get_dev_object(IN struct cfg_devnode
*dev_node_obj,
OUT u32 *pdwValue);
/*
- * cfg_get_dsp_resources
- * Purpose:
- * Get the DSP resources available to a given device.
- * Parameters:
- * dev_node_obj: Handle to the DEVNODE who's resources we are querying.
- * pDSPResTable: Ptr to a location to store the DSP resource table.
- * Returns:
- * DSP_SOK:On success.
- * CFG_E_INVALIDHDEVNODE: dev_node_obj is invalid.
- * CFG_E_RESOURCENOTAVAIL: The DSP Resource information is not
- * available
- * Requires:
- * CFG initialized.
- * Ensures:
- * DSP_SOK:pDSPResTable points to a filled table of resources
allocated
- * for the specified WMD.
- */
-extern dsp_status cfg_get_dsp_resources(IN struct cfg_devnode *dev_node_obj,
- OUT struct cfg_dspres *pDSPResTable);
-
-/*
* cfg_get_exec_file
* Purpose:
* Retreive the default executable, if any, for this board.
diff --git a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
index bd24611..982eb59 100644
--- a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
@@ -81,13 +81,4 @@ struct cfg_dspmemdesc {
u32 ul_max; /* Maximum amount of memory of this type. */
};
-struct cfg_dspres {
- u32 chip_type; /* DSP chip type. */
- u32 word_size; /* Number of bytes in a word */
- u32 chip_number;/* Number of chips. */
- u32 mem_types; /* Types of memory. */
- struct cfg_dspmemdesc mem_desc[CFG_DSPMAXMEMTYPES];
- /* DSP Memory types */
-};
-
#endif /* CFGDEFS_ */
diff --git a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
index d01d9ae..9dcfbfb 100644
--- a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
@@ -549,6 +549,5 @@ bit 15 - Output (writeable) buffer
#define CURRENTCONFIG "CurrentConfig" /* Current resources */
#define SHMSIZE"SHMSize" /* Size of shm reservd on MPU */
#define TCWORDSWAP "TCWordSwap"/* Traffic Controller WordSwp */
-#define DSPRESOURCES "DspTMSResources" /* C55 DSP resurces on OMAP */
#endif /* DBDEFS_ */
diff --git a/arch/arm/plat-omap/include/dspbridge/dev.h
b/arch/arm/plat-omap/include/dspbridge/dev.h
index 13b0cad..7771ad1 100644
--- a/arch/arm/plat-omap/include/dspbridge/dev.h
+++ b/arch/arm/plat-omap/include/dspbridge/dev.h
@@ -100,8 +100,7 @@ extern dsp_status dev_create_device(OUT struct dev_object
**phDevObject,
IN CONST char *pstrWMDFileName,
IN CONST struct cfg_hostres
- *pHostConfig, IN CONST struct cfg_dspres
- *pDspConfig,
+ *pHostConfig,
struct cfg_devnode *dev_node_obj);
/*
@@ -146,7 +145,6 @@ extern dsp_status dev_create_iva_device(OUT struct
dev_object
IN CONST char *pstrWMDFileName,
IN CONST struct cfg_hostres
*pHostConfig,
- IN CONST struct cfg_dspres *pDspConfig,
struct cfg_devnode *dev_node_obj);
/*
diff --git a/arch/arm/plat-omap/include/dspbridge/wmd.h
b/arch/arm/plat-omap/include/dspbridge/wmd.h
index f9883db..9294a96 100644
--- a/arch/arm/plat-omap/include/dspbridge/wmd.h
+++ b/ar
[PATCH] DSPBRIDGE: MMU-Fault debugging enhancements
>From 4aee61479659b42127d107da6054e1c22be56d66 Mon Sep 17 00:00:00 2001 From: Cris Jansson Date: Wed, 24 Mar 2010 11:12:05 -0600 Subject: [PATCH] DSPBRIDGE: MMU-Fault debugging enhancements These changes allow for DSP task information to be printed by the MPU dspbridge when DSP MMU fault ocurrs. Signed-off-by: Cris Jansson [change to open source coding style] Signed-off-by: Ernesto Ramos --- arch/arm/plat-omap/include/dspbridge/cod.h |1 + arch/arm/plat-omap/include/dspbridge/dbll.h |3 +- arch/arm/plat-omap/include/dspbridge/gh.h|2 + arch/arm/plat-omap/include/dspbridge/io_sm.h |5 + arch/arm/plat-omap/include/dspbridge/nldr.h |2 + arch/arm/plat-omap/include/dspbridge/node.h | 15 + drivers/dsp/bridge/Makefile |1 + drivers/dsp/bridge/gen/gh.c | 24 ++ drivers/dsp/bridge/pmgr/dbll.c | 84 drivers/dsp/bridge/rmgr/nldr.c | 80 drivers/dsp/bridge/rmgr/node.c | 31 ++ drivers/dsp/bridge/wmd/io_sm.c | 568 +- drivers/dsp/bridge/wmd/ue_deh.c | 65 +++- 13 files changed, 771 insertions(+), 110 deletions(-) diff --git a/arch/arm/plat-omap/include/dspbridge/cod.h b/arch/arm/plat-omap/include/dspbridge/cod.h index 3d76a6b..e508565 100644 --- a/arch/arm/plat-omap/include/dspbridge/cod.h +++ b/arch/arm/plat-omap/include/dspbridge/cod.h @@ -26,6 +26,7 @@ #define COD_MAXPATHLENGTH 255 #define COD_TRACEBEG"SYS_PUTCBEG" #define COD_TRACEEND"SYS_PUTCEND" +#define COD_TRACECURPOS"BRIDGE_SYS_PUTC_current" #define COD_TRACESECT "trace" #define COD_TRACEBEGOLD "PUTCBEG" #define COD_TRACEENDOLD "PUTCEND" diff --git a/arch/arm/plat-omap/include/dspbridge/dbll.h b/arch/arm/plat-omap/include/dspbridge/dbll.h index daf8a0a..01c4647 100644 --- a/arch/arm/plat-omap/include/dspbridge/dbll.h +++ b/arch/arm/plat-omap/include/dspbridge/dbll.h @@ -51,5 +51,6 @@ extern void dbll_set_attrs(struct dbll_tar_obj *target, extern void dbll_unload(struct dbll_library_obj *lib, struct dbll_attrs *attrs); extern dsp_status dbll_unload_sect(struct dbll_library_obj *lib, char *sectName, struct dbll_attrs *attrs); - +bool dbll_find_dsp_symbol(struct dbll_library_obj *zl_lib, u32 address, + u32 offset_range, u32 *sym_addr_output, char *name_output); #endif /* DBLL_ */ diff --git a/arch/arm/plat-omap/include/dspbridge/gh.h b/arch/arm/plat-omap/include/dspbridge/gh.h index e4da0f2..55c0489 100644 --- a/arch/arm/plat-omap/include/dspbridge/gh.h +++ b/arch/arm/plat-omap/include/dspbridge/gh.h @@ -27,4 +27,6 @@ extern void gh_exit(void); extern void *gh_find(struct gh_t_hash_tab *hash_tab, void *key); extern void gh_init(void); extern void *gh_insert(struct gh_t_hash_tab *hash_tab, void *key, void *value); +void gh_iterate(struct gh_t_hash_tab *hash_tab, + void (*callback)(void *, void *), void *user_data); #endif /* GH_ */ diff --git a/arch/arm/plat-omap/include/dspbridge/io_sm.h b/arch/arm/plat-omap/include/dspbridge/io_sm.h index aa4d0cf..66aa50f 100644 --- a/arch/arm/plat-omap/include/dspbridge/io_sm.h +++ b/arch/arm/plat-omap/include/dspbridge/io_sm.h @@ -293,4 +293,9 @@ extern void io_sm_init(void); extern dsp_status print_dsp_trace_buffer(struct wmd_dev_context *hwmd_context); +dsp_status dump_dsp_stack(struct wmd_dev_context *wmd_context); + +void dump_dl_modules(struct wmd_dev_context *wmd_context); + + #endif /* IOSM_ */ diff --git a/arch/arm/plat-omap/include/dspbridge/nldr.h b/arch/arm/plat-omap/include/dspbridge/nldr.h index 2ec928a..2b930d1 100644 --- a/arch/arm/plat-omap/include/dspbridge/nldr.h +++ b/arch/arm/plat-omap/include/dspbridge/nldr.h @@ -49,5 +49,7 @@ extern dsp_status nldr_load(struct nldr_nodeobject *nldr_node_obj, enum nldr_phase phase); extern dsp_status nldr_unload(struct nldr_nodeobject *nldr_node_obj, enum nldr_phase phase); +dsp_status nldr_find_addr(struct nldr_nodeobject *nldr_node, u32 sym_addr, + u32 offset_range, void *offset_output, char *sym_name); #endif /* NLDR_ */ diff --git a/arch/arm/plat-omap/include/dspbridge/node.h b/arch/arm/plat-omap/include/dspbridge/node.h index f2375a2..57d820b 100644 --- a/arch/arm/plat-omap/include/dspbridge/node.h +++ b/arch/arm/plat-omap/include/dspbridge/node.h @@ -566,4 +566,19 @@ extern dsp_status node_get_uuid_props(void *hprocessor, OUT struct dsp_ndbprops *node_props); +/** + * node_find_addr() - Find the closest symbol to the given address. + * + * @node_mgr: Node manager handle + * @sym_addr: Given address to find the closest symbol + * @offset_range: offset range to look fo the closest symbol + * @sym_addr_output: Symbol Ou
[PATCH 5/5] DSPBRIDGE: Avoid errors if stream id is zero
>From e8b0597f602aa501cdda039c609a5f4fe31b3281 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 18:40:53 -0500
Subject: [PATCH 5/5] DSPBRIDGE: Avoid errors if stream id is zero
As 'zero' can be a perfectly good id, it can be picked up as
a NULL from userspace, avoid issues in API and user apps if stream
handle is zero.
Signed-off-by: Ernesto Ramos
---
drivers/dsp/bridge/pmgr/wcd.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 9d63b1f..43e8186 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -1498,7 +1498,7 @@ inline void find_strm_handle(struct strm_res_object
**strmres,
{
rcu_read_lock();
*strmres = idr_find(((struct process_context *)pr_ctxt)->strm_idp,
- (int)hstream);
+ (int)hstream - 1);
rcu_read_unlock();
return;
}
@@ -1713,6 +1713,8 @@ u32 strmwrap_open(union Trapped_Args *args, void *pr_ctxt)
args->args_strm_open.index, &attr, &strm_res_obj,
pr_ctxt);
CP_TO_USR(args->args_strm_open.ph_stream, &strm_res_obj->id, status, 1);
+ if (DSP_SUCCEEDED(status))
+ *args->args_strm_open.ph_stream += 1;
return status;
}
--
1.5.4.5
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[PATCH 4/5] DSPBRIDGE: Use stream id instead of kernel address
>From 49cfb8a2ef77480ea5f622da9b80694387be Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 18:39:28 -0500
Subject: [PATCH 4/5] DSPBRIDGE: Use stream id instead of kernel address
Send stream ids to the user instead of handles, then when
the id is coming from user dspbridge can retrive the handle
using id and avoid using invalid handles.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/drv.h |5 +-
.../plat-omap/include/dspbridge/resourcecleanup.h |6 -
arch/arm/plat-omap/include/dspbridge/strm.h|8 +-
drivers/dsp/bridge/pmgr/wcd.c | 103 +++--
drivers/dsp/bridge/rmgr/drv.c | 155 +++-
drivers/dsp/bridge/rmgr/drv_interface.c| 13 ++-
drivers/dsp/bridge/rmgr/strm.c | 77 +-
7 files changed, 194 insertions(+), 173 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/drv.h
b/arch/arm/plat-omap/include/dspbridge/drv.h
index 02f93f5..9307001 100644
--- a/arch/arm/plat-omap/include/dspbridge/drv.h
+++ b/arch/arm/plat-omap/include/dspbridge/drv.h
@@ -114,7 +114,7 @@ struct strm_res_object {
void *hstream;
u32 num_bufs;
u32 dir;
- struct strm_res_object *next;
+ int id;
};
/* Overall Bridge process resource usage state */
@@ -146,8 +146,7 @@ struct process_context {
struct dspheap_res_object *pdspheap_list;
/* Stream resources */
- struct strm_res_object *pstrm_list;
- struct mutex strm_mutex;
+ struct idr *strm_idp;
};
/*
diff --git a/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
b/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
index 00d5148..4e93446 100644
--- a/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
+++ b/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
@@ -47,12 +47,6 @@ extern dsp_status drv_proc_insert_strm_res_element(bhandle
hStrm,
bhandle strm_res,
bhandle pPctxt);
-extern dsp_status drv_get_strm_res_element(bhandle hStrm, bhandle strm_res,
- bhandle ctxt);
-
-extern dsp_status drv_proc_remove_strm_res_element(bhandle strm_res,
- bhandle ctxt);
-
extern dsp_status drv_remove_all_strm_res_elements(bhandle ctxt);
extern enum node_state node_get_state(bhandle hnode);
diff --git a/arch/arm/plat-omap/include/dspbridge/strm.h
b/arch/arm/plat-omap/include/dspbridge/strm.h
index 51a897f..4f12989 100644
--- a/arch/arm/plat-omap/include/dspbridge/strm.h
+++ b/arch/arm/plat-omap/include/dspbridge/strm.h
@@ -44,7 +44,7 @@
* ap_buffer != NULL.
* Ensures:
*/
-extern dsp_status strm_allocate_buffer(struct strm_object *hStrm,
+extern dsp_status strm_allocate_buffer(struct strm_res_object *strmres,
u32 usize,
OUT u8 **ap_buffer,
u32 num_bufs,
@@ -66,7 +66,7 @@ extern dsp_status strm_allocate_buffer(struct strm_object
*hStrm,
* strm_init(void) called.
* Ensures:
*/
-extern dsp_status strm_close(struct strm_object *hStrm,
+extern dsp_status strm_close(struct strm_res_object *strmres,
struct process_context *pr_ctxt);
/*
@@ -137,7 +137,7 @@ extern void strm_exit(void);
* ap_buffer != NULL.
* Ensures:
*/
-extern dsp_status strm_free_buffer(struct strm_object *hStrm,
+extern dsp_status strm_free_buffer(struct strm_res_object *strmres,
u8 **ap_buffer, u32 num_bufs,
struct process_context *pr_ctxt);
@@ -273,7 +273,7 @@ extern dsp_status strm_issue(struct strm_object *hStrm, IN
u8 * pbuf,
*/
extern dsp_status strm_open(struct node_object *hnode, u32 dir,
u32 index, IN struct strm_attr *pattr,
- OUT struct strm_object **phStrm,
+ OUT struct strm_res_object **strmres,
struct process_context *pr_ctxt);
/*
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 61a4ab9..9d63b1f 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -1491,6 +1491,19 @@ func_cont:
}
/*
+ * find_strm_handle =
+ */
+inline void find_strm_handle(struct strm_res_object **strmres,
+ void *pr_ctxt, void *hstream)
+{
+ rcu_read_lock();
+ *strmres = idr_find(((struct process_context *)pr_ctxt)->strm_idp,
+ (int)hstream);
+ rcu_read_unlock();
+ return;
+}
+
+/*
* strmwrap_allocate_buffer
*/
u32 strmwrap_allocate_buffer(union Trapped_Args *args, void *pr_ctxt)
@@ -1498,13 +1511,20 @@ u32 strmwr
[PATCH 3/5] DSPBRIDGE: Use processor handle from context instead of user's
>From 615114515a5298d4510250507aa99544e923ba46 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 19 Mar 2010 11:38:27 -0600
Subject: [PATCH 3/5] DSPBRIDGE: Use processor handle from context instead of
user's
Make sure dspbridge driver uses a valid processor handle by
using the handle stored in process context.
Signed-off-by: Ernesto Ramos
---
drivers/dsp/bridge/pmgr/wcd.c | 56 -
1 files changed, 33 insertions(+), 23 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index d51798a..61a4ab9 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -613,6 +613,7 @@ u32 procwrap_ctrl(union Trapped_Args *args, void *pr_ctxt)
args->args_proc_ctrl.pargs;
u8 *pargs = NULL;
dsp_status status = DSP_SOK;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
if (psize) {
if (get_user(cb_data_size, psize)) {
@@ -630,7 +631,7 @@ u32 procwrap_ctrl(union Trapped_Args *args, void *pr_ctxt)
cb_data_size);
}
if (DSP_SUCCEEDED(status)) {
- status = proc_ctrl(args->args_proc_ctrl.hprocessor,
+ status = proc_ctrl(hprocessor,
args->args_proc_ctrl.dw_cmd,
(struct dsp_cbdata *)pargs);
}
@@ -660,11 +661,12 @@ u32 procwrap_enum_node_info(union Trapped_Args *args,
void *pr_ctxt)
void *node_tab[MAX_NODES];
u32 num_nodes;
u32 alloc_cnt;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
if (!args->args_proc_enumnode_info.node_tab_size)
return DSP_ESIZE;
- status = proc_enum_nodes(args->args_proc_enumnode_info.hprocessor,
+ status = proc_enum_nodes(hprocessor,
node_tab,
args->args_proc_enumnode_info.node_tab_size,
&num_nodes, &alloc_cnt);
@@ -683,12 +685,13 @@ u32 procwrap_enum_node_info(union Trapped_Args *args,
void *pr_ctxt)
u32 procwrap_flush_memory(union Trapped_Args *args, void *pr_ctxt)
{
dsp_status status;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
if (args->args_proc_flushmemory.ul_flags >
PROC_WRITEBACK_INVALIDATE_MEM)
return DSP_EINVALIDARG;
- status = proc_flush_memory(args->args_proc_flushmemory.hprocessor,
+ status = proc_flush_memory(hprocessor,
args->args_proc_flushmemory.pmpu_addr,
args->args_proc_flushmemory.ul_size,
args->args_proc_flushmemory.ul_flags);
@@ -701,9 +704,10 @@ u32 procwrap_flush_memory(union Trapped_Args *args, void
*pr_ctxt)
u32 procwrap_invalidate_memory(union Trapped_Args *args, void *pr_ctxt)
{
dsp_status status;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
status =
- proc_invalidate_memory(args->args_proc_invalidatememory.hprocessor,
+ proc_invalidate_memory(hprocessor,
args->args_proc_invalidatememory.pmpu_addr,
args->args_proc_invalidatememory.ul_size);
return status;
@@ -716,13 +720,14 @@ u32 procwrap_enum_resources(union Trapped_Args *args,
void *pr_ctxt)
{
dsp_status status = DSP_SOK;
struct dsp_resourceinfo resource_info;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
if (args->args_proc_enumresources.resource_info_size <
sizeof(struct dsp_resourceinfo))
return DSP_ESIZE;
status =
- proc_get_resource_info(args->args_proc_enumresources.hprocessor,
+ proc_get_resource_info(hprocessor,
args->args_proc_enumresources.resource_type,
&resource_info,
args->args_proc_enumresources.
@@ -742,13 +747,13 @@ u32 procwrap_get_state(union Trapped_Args *args, void
*pr_ctxt)
{
dsp_status status;
struct dsp_processorstate proc_state;
+ void *hprocessor = ((struct process_context *)pr_ctxt)->hprocessor;
if (args->args_proc_getstate.state_info_size <
sizeof(struct dsp_processorstate))
return DSP_ESIZE;
- status =
- proc_get_state(args->args_proc_getstate.hprocessor, &proc_state,
+ status = proc_get_state(hprocessor, &proc_state,
args->args_proc_getstate.state_info_size);
CP_TO_USR(args->args_proc_getstate.proc_state_obj, &proc_state, status,
1);
@@ -763,14 +768,14 @@ u32 procwrap_get_trace(union Trapped_Args *args, void
*pr_ctxt)
{
dsp_status status;
u8 *pbuf;
+ void *hproc
[PATCH 2/5] DSPBRIDGE: Avoid errors if node handle is zero
>From 827cbf0b4ade7ec7839b503922ecb278df1ff233 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 18:22:36 -0500
Subject: [PATCH 2/5] DSPBRIDGE: Avoid errors if node handle is zero
As 'zero' can be a perfectly good id, it can be picked up as
a NULL from userspace, avoid issues in API and user apps if node
handle is zero.
Signed-off-by: Ernesto Ramos
---
drivers/dsp/bridge/pmgr/wcd.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 20e02f1..d51798a 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -1028,7 +1028,7 @@ inline void find_node_handle(struct node_res_object
**noderes,
{
rcu_read_lock();
*noderes = idr_find(((struct process_context *)pr_ctxt)->node_idp,
- (int)hnode);
+ (int)hnode - 1);
rcu_read_unlock();
return;
}
@@ -1086,6 +1086,8 @@ u32 nodewrap_allocate(union Trapped_Args *args, void
*pr_ctxt)
if (DSP_FAILED(status)) {
status = DSP_EPOINTER;
node_delete(node_res, pr_ctxt);
+ } else {
+ *args->args_node_allocate.ph_node += 1;
}
}
func_cont:
--
1.5.4.5
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[PATCH 1/5] DSPBRIDGE: Use node id instead of kernel address
>From 4e2c98b47ef85348674ad983334ac238be39beed Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Fri, 16 Apr 2010 18:15:21 -0500
Subject: [PATCH 1/5] DSPBRIDGE: Use node id instead of kernel address
Use idr kernel library to send/receive node ids to the
user instead of kernel address.
This id will be use to access the node handles at the
kernel side, if id does not match to any handle
DSP error DSP_EHANDlE is returned.
Signed-off-by: Ernesto Ramos
---
arch/arm/plat-omap/include/dspbridge/drv.h |6 +-
arch/arm/plat-omap/include/dspbridge/node.h|4 +-
.../plat-omap/include/dspbridge/resourcecleanup.h |5 -
drivers/dsp/bridge/pmgr/wcd.c | 158 +---
drivers/dsp/bridge/rmgr/drv.c | 154 ++-
drivers/dsp/bridge/rmgr/drv_interface.c|9 +-
drivers/dsp/bridge/rmgr/node.c | 102 +++--
7 files changed, 254 insertions(+), 184 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/drv.h
b/arch/arm/plat-omap/include/dspbridge/drv.h
index 947cbdd..02f93f5 100644
--- a/arch/arm/plat-omap/include/dspbridge/drv.h
+++ b/arch/arm/plat-omap/include/dspbridge/drv.h
@@ -24,6 +24,7 @@
#include
#include
+#include
#define DRV_ASSIGN 1
#define DRV_RELEASE0
@@ -81,7 +82,7 @@ struct node_res_object {
s32 node_allocated; /* Node status */
s32 heap_allocated; /* Heap status */
s32 streams_allocated; /* Streams status */
- struct node_res_object *next;
+ int id;
};
/* Used for DMM mapped memory accounting */
@@ -131,8 +132,7 @@ struct process_context {
void *hprocessor;
/* DSP Node resources */
- struct node_res_object *node_list;
- struct mutex node_mutex;
+ struct idr *node_idp;
/* DMM mapped memory resources */
struct list_head dmm_map_list;
diff --git a/arch/arm/plat-omap/include/dspbridge/node.h
b/arch/arm/plat-omap/include/dspbridge/node.h
index ec0dcf3..f2375a2 100644
--- a/arch/arm/plat-omap/include/dspbridge/node.h
+++ b/arch/arm/plat-omap/include/dspbridge/node.h
@@ -60,7 +60,7 @@ extern dsp_status node_allocate(struct proc_object
*hprocessor,
OPTIONAL IN CONST struct dsp_cbdata
*pargs, OPTIONAL IN CONST struct dsp_nodeattrin
*attr_in,
- OUT struct node_object **ph_node,
+ OUT struct node_res_object **noderes,
struct process_context *pr_ctxt);
/*
@@ -261,7 +261,7 @@ extern dsp_status node_create_mgr(OUT struct node_mgr
**phNodeMgr,
* Ensures:
* DSP_SOK:hnode is invalid.
*/
-extern dsp_status node_delete(struct node_object *hnode,
+extern dsp_status node_delete(struct node_res_object *hnoderes,
struct process_context *pr_ctxt);
/*
diff --git a/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
b/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
index ef18477..00d5148 100644
--- a/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
+++ b/arch/arm/plat-omap/include/dspbridge/resourcecleanup.h
@@ -34,16 +34,11 @@ extern dsp_status drv_remove_all_resources(bhandle pPctxt);
extern dsp_status drv_remove_proc_context(struct drv_object *hDRVObject,
bhandle pr_ctxt);
-extern dsp_status drv_get_node_res_element(bhandle hnode, bhandle node_res,
- bhandle ctxt);
-
extern dsp_status drv_insert_node_res_element(bhandle hnode, bhandle node_res,
bhandle ctxt);
extern void drv_proc_node_update_heap_status(bhandle hNodeRes, s32 status);
-extern dsp_status drv_remove_node_res_element(bhandle node_res, bhandle
status);
-
extern void drv_proc_node_update_status(bhandle hNodeRes, s32 status);
extern dsp_status drv_proc_update_strm_res(u32 num_bufs, bhandle strm_res);
diff --git a/drivers/dsp/bridge/pmgr/wcd.c b/drivers/dsp/bridge/pmgr/wcd.c
index 15a05a6..20e02f1 100644
--- a/drivers/dsp/bridge/pmgr/wcd.c
+++ b/drivers/dsp/bridge/pmgr/wcd.c
@@ -1021,6 +1021,20 @@ u32 procwrap_stop(union Trapped_Args *args, void
*pr_ctxt)
}
/*
+ * find_handle =
+ */
+inline void find_node_handle(struct node_res_object **noderes,
+ void *pr_ctxt, void *hnode)
+{
+ rcu_read_lock();
+ *noderes = idr_find(((struct process_context *)pr_ctxt)->node_idp,
+ (int)hnode);
+ rcu_read_unlock();
+ return;
+}
+
+
+/*
* nodewrap_allocate
*/
u32 nodewrap_allocate(union Trapped_Args *args, void *pr_ctxt)
@@ -1031,7 +1045,7 @@ u32 nodewrap_allocate(union Trapped_Args *args, void
*pr_ctxt)
u32 __user *psize = (u32 __user *) args->args_node_allocate.pa
[PATCH] DSPBRIDGE: Always delete nodes during resource cleanup
>From 9b263cc8cf0dea7e440aabb77fc88d06e01d62a4 Mon Sep 17 00:00:00 2001
From: Ernesto Ramos
Date: Thu, 18 Mar 2010 23:48:56 -0600
Subject: [PATCH] DSPBRIDGE: Always delete nodes during resource cleanup
Right now, during resource clean up, nodes are not being
deleted if they are in state NODE_DONE. This fix makes
sure they are deleted if they are in any valid state.
Signed-off-by: Ernesto Ramos
---
drivers/dsp/bridge/rmgr/drv.c | 12 +++-
1 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/dsp/bridge/rmgr/drv.c b/drivers/dsp/bridge/rmgr/drv.c
index 98f9b78..75b9b9f 100644
--- a/drivers/dsp/bridge/rmgr/drv.c
+++ b/drivers/dsp/bridge/rmgr/drv.c
@@ -157,17 +157,11 @@ static dsp_status drv_proc_free_node_res(bhandle hPCtxt)
if (node_state <= NODE_DELETING) {
if ((node_state == NODE_RUNNING) ||
(node_state == NODE_PAUSED) ||
- (node_state == NODE_TERMINATING)) {
+ (node_state == NODE_TERMINATING))
status = node_terminate
(node_res_obj->hnode, &status);
- status =
- node_delete(node_res_obj->hnode,
- ctxt);
- } else if ((node_state == NODE_ALLOCATED)
- || (node_state == NODE_CREATED))
- status =
- node_delete(node_res_obj->hnode,
- ctxt);
+
+ status = node_delete(node_res_obj->hnode, ctxt);
}
}
}
--
1.5.4.5
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[PATCH 1/5] DSPBRIDGE: Remove checkpatch errors regarding braces
>From 451e9733672b7fd3879ec109f3c6b2ac55c21cf5 Mon Sep 17 00:00:00 2001
From: Armando Uribe De Leon
Date: Thu, 8 Apr 2010 17:14:38 -0500
Subject: [PATCH 1/5] DSPBRIDGE: Remove checkpatch errors regarding braces
This patch removes checkpatch errors due to misleading braces
Signed-off-by: Armando Uribe De Leon
---
arch/arm/plat-omap/include/dspbridge/mem.h |8
drivers/dsp/bridge/dynload/cload.c |4 ++--
drivers/dsp/bridge/pmgr/cmm.c |5 ++---
drivers/dsp/bridge/pmgr/dbll.c |3 +--
drivers/dsp/bridge/wmd/io_sm.c |3 +--
drivers/dsp/bridge/wmd/tiomap3430_pwr.c|6 ++
6 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/mem.h
b/arch/arm/plat-omap/include/dspbridge/mem.h
index 087f69f..effba29 100644
--- a/arch/arm/plat-omap/include/dspbridge/mem.h
+++ b/arch/arm/plat-omap/include/dspbridge/mem.h
@@ -172,10 +172,10 @@ extern void mem_free_phys_mem(void *pVirtualAddress,
* A subsequent call to MEM_IS_VALID_HANDLE() will fail for this object.
*/
#define MEM_FREE_OBJECT(pObj)\
-{ \
-pObj->dw_signature = 0x00; \
-kfree(pObj);\
-}
+do { \
+ pObj->dw_signature = 0x00; \
+ kfree(pObj);\
+} while (0)
/*
* mem_get_num_pages diff --git
a/drivers/dsp/bridge/dynload/cload.c b/drivers/dsp/bridge/dynload/cload.c
index d0de525..7f3c3bd 100644
--- a/drivers/dsp/bridge/dynload/cload.c
+++ b/drivers/dsp/bridge/dynload/cload.c
@@ -48,8 +48,8 @@ static const char loader_dllview_root[] = { "?DLModules?" };
*/
static const char readstrm[] = { "Error reading %s from input stream" };
static const char err_alloc[] = { "Syms->dload_allocate( %d ) failed" };
-static const char tgtalloc[] =
-{ "Target memory allocate failed, section %s size " FMT_UI32 };
+static const char tgtalloc[] = {
+ "Target memory allocate failed, section %s size " FMT_UI32 };
static const char initfail[] = { "%s to target address " FMT_UI32 " failed" };
static const char dlvwrite[] = { "Write to DLLview list failed" }; static
const char iconnect[] = { "Connect call to init interface failed" }; diff --git
a/drivers/dsp/bridge/pmgr/cmm.c b/drivers/dsp/bridge/pmgr/cmm.c index
7523361..8c770da 100644
--- a/drivers/dsp/bridge/pmgr/cmm.c
+++ b/drivers/dsp/bridge/pmgr/cmm.c
@@ -1010,11 +1010,10 @@ dsp_status cmm_xlator_delete(struct cmm_xlatorobject
*xlator, bool bForce)
DBC_REQUIRE(refs > 0);
- if (MEM_IS_VALID_HANDLE(xlator_obj, CMMXLATESIGNATURE)) {
+ if (MEM_IS_VALID_HANDLE(xlator_obj, CMMXLATESIGNATURE))
MEM_FREE_OBJECT(xlator_obj);
- } else {
+ else
status = DSP_EHANDLE;
- }
return status;
}
diff --git a/drivers/dsp/bridge/pmgr/dbll.c b/drivers/dsp/bridge/pmgr/dbll.c
index 0e7c4a4..c983d6d 100644
--- a/drivers/dsp/bridge/pmgr/dbll.c
+++ b/drivers/dsp/bridge/pmgr/dbll.c
@@ -848,9 +848,8 @@ void dbll_unload(struct dbll_library_obj *lib, struct
dbll_attrs *attrs)
&zl_lib->symbol.dl_symbol,
&zl_lib->allocate.dl_alloc,
&zl_lib->init.dl_init);
- if (err != 0) {
+ if (err != 0)
dev_dbg(bridge, "%s: failed: 0x%x\n", __func__, err);
- }
}
/* remove symbols from symbol table */
if (zl_lib->sym_tab != NULL) {
diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c
index 1b5d977..0517f1a 100644
--- a/drivers/dsp/bridge/wmd/io_sm.c
+++ b/drivers/dsp/bridge/wmd/io_sm.c
@@ -578,9 +578,8 @@ dsp_status bridge_io_on_loaded(struct io_mgr *hio_mgr)
ae_proc[ndx].ul_gpp_va,
ae_proc[ndx].ul_dsp_va *
hio_mgr->word_size, page_size[i]);
- if (DSP_FAILED(status)) {
+ if (DSP_FAILED(status))
goto func_end;
- }
}
pa_curr += page_size[i];
va_curr += page_size[i];
diff --git a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
index 0b5d2f2..938d86d 100644
--- a/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
+++ b/drivers/dsp/bridge/wmd/tiomap3430_pwr.c
@@ -228,9 +228,8 @@ dsp_status sleep_dsp(struct wmd_dev_context *dev_context,
IN u32 dw_cmd,
/* Turn off DSP Peripheral clocks */
status = dsp_peripheral_clocks_disable(dev_context, NULL);
- if (DSP_FAILED(status)) {
+ if (DSP_FAILED(status))
return status;
- }
#ifdef C
OMAP camera port connected to Davinci VPIF port
Hi, On a board I'm working on, it has the OMAP 3530's camera port connected to the Davinci DM6467's VPIF port. The Davince is supposed to send BT656 stream over this link to OMAP. How to get the OMAP camera driver to work in this situation? In kernel config, I set the CONFIG_VIDEO_OMAP3_CAM=yes option. I saw that omap34xxcam.c got compiled and the omap34xxcam device got probed during boot up. But I don't get a /dev/video0 node. Do I need to write a specific driver for the Davinci VPIF interface? What else do I need to do? Thanks, Ke -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] HACK: OMAP3630: PM: allow testing of DVFS & FBB
This hack should not be applied to any git trees.
Enables 800MHz and 1GHz OPPs on VDD1 for 36XX silicon and bypasses an
error condition in vp_forceupdate_scale_voltage to allow for voltage
scaling to happen in the absence of complete SmartReflex support.
These changes are needed to allow DVFS transitions via cpufreq on top of
pm-wip-sr and to test the FBB transitions that only happen @ 1GHz on
3630.
Not-Signed-Off-By: Mike Turquette
---
arch/arm/mach-omap2/cpufreq34xx.c |8
arch/arm/mach-omap2/voltage.c |1 -
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/cpufreq34xx.c
b/arch/arm/mach-omap2/cpufreq34xx.c
index 189c42e..47913dc 100644
--- a/arch/arm/mach-omap2/cpufreq34xx.c
+++ b/arch/arm/mach-omap2/cpufreq34xx.c
@@ -80,9 +80,9 @@ static struct omap_opp_def __initdata
omap36xx_mpu_rate_table[] = {
/* OPP2 - OPP100 */
OMAP_OPP_DEF(true, 6, 110),
/* OPP3 - OPP-Turbo */
- OMAP_OPP_DEF(false, 8, 126),
+ OMAP_OPP_DEF(true, 8, 126),
/* OPP4 - OPP-SB */
- OMAP_OPP_DEF(false, 10, 135),
+ OMAP_OPP_DEF(true, 10, 135),
/* Terminator */
OMAP_OPP_DEF(0, 0, 0)
};
@@ -102,9 +102,9 @@ static struct omap_opp_def __initdata
omap36xx_dsp_rate_table[] = {
/* OPP2 - OPP100 */
OMAP_OPP_DEF(true, 52000, 110),
/* OPP3 - OPP-Turbo */
- OMAP_OPP_DEF(false, 66000, 126),
+ OMAP_OPP_DEF(true, 66000, 126),
/* OPP4 - OPP-SB */
- OMAP_OPP_DEF(false, 8, 135),
+ OMAP_OPP_DEF(true, 8, 135),
/* Terminator */
OMAP_OPP_DEF(0, 0, 0)
};
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 98d8bb3..bec8c18 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -571,7 +571,6 @@ static int vp_forceupdate_scale_voltage(u32 vdd, unsigned
long target_volt,
pr_warning("Unable to get voltage table for VDD%d \
during voltage scaling. Some really Wrong!",
vdd + 1);
- return false;
}
vp_reg[vdd].vp_errorgain = (volt_data.vp_errorgain <<
OMAP3430_ERRORGAIN_SHIFT);
--
1.6.3.2
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[PATCH 2/3] OMAP3630: PM: implement Foward Body-Bias for OPP1G
Introduces voltscale_adaptive_body_bias function to voltage.c.
voltscale_adaptive_body_bias is called by omap_voltage_scale after a
voltage transition has occured. Currently voltscale_adaptive_body_bias
only implements Forward Body-Bias (FBB) for OMAP3630 when MPU runs at
1GHz or higher. In the future Reverse Body-Bias might be included.
FBB is an Adaptive Body-Bias technique to boost performance for weak
process devices at high OPPs. This results in voltage boost on the VDD1
PMOS back gates when running at maximum OPP. Current recommendations
are to enable FBB on all 3630 regardless of silicon characteristics and
EFUSE values.
ABB applies to all OMAP silicon based on 45nm process, which includes
OMAP4. OMAP4 recommendations for ABB are not complete and will be added
to voltscale_adaptive_body_bias in the future.
Signed-off-by: Mike Turquette
---
arch/arm/mach-omap2/voltage.c | 129 -
1 files changed, 127 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index c2c8192..98d8bb3 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -37,6 +37,11 @@
#define VP_IDLE_TIMEOUT200
#define VP_TRANXDONE_TIMEOUT 300
+#define ABB_MAX_SETTLING_TIME 30
+#define ABB_FAST_OPP 1
+#define ABB_NOMINAL_OPP2
+#define ABB_SLOW_OPP 3
+
/**
* OMAP3 Voltage controller SR parameters. TODO: Pass this info as part of
* board data or PMIC data
@@ -635,6 +640,118 @@ static int vp_forceupdate_scale_voltage(u32 vdd, unsigned
long target_volt,
}
/**
+ * voltscale_adaptive_body_bias - controls ABB ldo during voltage scaling
+ * @target_volt: target voltage determines if ABB ldo is active or bypassed
+ *
+ * Adaptive Body-Bias is a technique in all OMAP silicon that uses the 45nm
+ * process. ABB can boost voltage in high OPPs for silicon with weak
+ * characteristics (forward Body-Bias) as well as lower voltage in low OPPs
+ * for silicon with strong characteristics (Reverse Body-Bias).
+ *
+ * Only Foward Body-Bias for operating at high OPPs is implemented below, per
+ * recommendations from silicon team.
+ * Reverse Body-Bias for saving power in active cases and sleep cases is not
+ * yet implemented.
+ * OMAP4 hardward also supports ABB ldo, but no recommendations have been made
+ * to implement it yet.
+ */
+int voltscale_adaptive_body_bias(unsigned long target_volt)
+{
+ u32 sr2en_enabled;
+ int timeout;
+ int sr2_wtcnt_value;
+
+ /* calculate SR2_WTCNT_VALUE settling time */
+ sr2_wtcnt_value = (ABB_MAX_SETTLING_TIME *
+ (clk_get_rate("sys_ck") / 100) / 8);
+
+ /* has SR2EN been enabled previously? */
+ sr2en_enabled = (prm_read_mod_reg(OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_CTRL_OFFSET) &
+ OMAP3630_SR2EN);
+
+ /* select fast, nominal or slow OPP for ABB ldo */
+ /* FIXME: include OMAP4 once recommendations are complete */
+ if (cpu_is_omap3630() && (target_volt >= 135)) {
+ /* program for fast opp - enable FBB */
+ prm_rmw_mod_reg_bits(OMAP3630_OPP_SEL_MASK,
+ (ABB_FAST_OPP << OMAP3630_OPP_SEL_SHIFT),
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_SETUP_OFFSET);
+
+ /* enable the ABB ldo if not done already */
+ if (!sr2en_enabled)
+ prm_set_mod_reg_bits(OMAP3630_SR2EN,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_CTRL_OFFSET);
+ } else if (sr2en_enabled) {
+ /* program for nominal opp - bypass ABB ldo */
+ prm_rmw_mod_reg_bits(OMAP3630_OPP_SEL_MASK,
+ (ABB_NOMINAL_OPP << OMAP3630_OPP_SEL_SHIFT),
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_SETUP_OFFSET);
+ } else {
+ /* nothing to do here yet... might enable RBB here someday */
+ return 0;
+ }
+
+ /* set ACTIVE_FBB_SEL for all 45nm silicon */
+ prm_set_mod_reg_bits(OMAP3630_ACTIVE_FBB_SEL,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_CTRL_OFFSET);
+
+ /* program settling time of 30us for ABB ldo transition */
+ prm_rmw_mod_reg_bits(OMAP3630_SR2_WTCNT_VALUE_MASK,
+ (sr2_wtcnt_value << OMAP3630_SR2_WTCNT_VALUE_SHIFT),
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_LDO_ABB_CTRL_OFFSET);
+
+ /* clear ABB ldo interrupt status */
+ prm_write_mod_reg(OMAP3630_ABB_LDO_TRANXDONE_ST,
+ OCP_MOD,
+ OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
+
+ /* enable ABB LDO OPP change */
+ prm_set_mod_reg_bits(OMAP3630_
[PATCH 1/3] OMAP: PM: update PRM registers for ABB
PRCM on OMAP devices using the 45nm process support Adaptive Body Bias ldo as well as some new MPU interrupts related to voltage control. These devices currently include OMAP 3630 and 4430. This patch adds these bitfields to the appropriate headers. Also adds register offset for OMAP36XX_CONTROL_VBBLDO_EFUSE_CTRL. Though currently unused it might be used in the future to enable other ABB features such as active RBB and sleep RBB based on silicon characteristics. OMAP3630_VC_BYPASS_ACK_EN, OMAP3630_VC_VP1_ACK_EN & OMAP3630_ABB_LDO_TRANXDONE_EN have been added for completeness sake, but these interrupts do not have to be enabled to poll on their corresponding status bits. Signed-off-by: Mike Turquette --- arch/arm/mach-omap2/prm-regbits-34xx.h| 22 ++ arch/arm/mach-omap2/prm.h |6 ++ arch/arm/plat-omap/include/plat/control.h |4 3 files changed, 32 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 0066693..58c9765 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -212,6 +212,9 @@ /* PRM_SYSCONFIG specific bits */ /* PRM_IRQSTATUS_MPU specific bits */ +#define OMAP3630_VC_BYPASS_ACK_ST (1 << 28) +#define OMAP3630_VC_VP1_ACK_ST (1 << 27) +#define OMAP3630_ABB_LDO_TRANXDONE_ST (1 << 26) #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25 #define OMAP3430ES2_SND_PERIPH_DPLL_ST (1 << 25) #define OMAP3430_VC_TIMEOUTERR_ST (1 << 24) @@ -244,6 +247,9 @@ #define OMAP3430_FS_USB_WKUP_ST(1 << 1) /* PRM_IRQENABLE_MPU specific bits */ +#define OMAP3630_VC_BYPASS_ACK_EN (1 << 28) +#define OMAP3630_VC_VP1_ACK_EN (1 << 27) +#define OMAP3630_ABB_LDO_TRANXDONE_EN (1 << 26) #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25 #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN (1 << 25) #define OMAP3430_VC_TIMEOUTERR_EN (1 << 24) @@ -581,6 +587,22 @@ /* PRM_VP2_STATUS specific bits */ +/* PRM_LDO_ABB_SETUP specific bits */ +#define OMAP3630_SR2_IN_TRANSITION (1 << 6) +#define OMAP3630_SR2_STATUS_SHIFT 3 +#define OMAP3630_SR2_STATUS_MASK (3 << 3) +#define OMAP3630_OPP_CHANGE(1 << 2) +#define OMAP3630_OPP_SEL_SHIFT 0 +#define OMAP3630_OPP_SEL_MASK (3 << 0) + +/* PRM_LDO_ABB_CTRL specific bits */ +#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8 +#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff << 8) +#define OMAP3630_SLEEP_RBB_SEL (1 << 3) +#define OMAP3630_ACTIVE_FBB_SEL(1 << 2) +#define OMAP3630_ACTIVE_RBB_SEL(1 << 1) +#define OMAP3630_SR2EN (1 << 0) + /* RM_RSTST_NEON specific bits */ /* PM_WKDEP_NEON specific bits */ diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 5fba2aa..2a58847 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -160,6 +160,12 @@ #define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) #define OMAP3_PRM_VP2_STATUS_OFFSET0x00e4 #define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) +#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0X00f0 +#define OMAP3630_PRM_LDO_ABB_SETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, \ + 0X00f0) +#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0X00f4 +#define OMAP3630_PRM_LDO_ABB_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, \ + 0X00f4) #define OMAP3_PRM_CLKSEL_OFFSET0x0040 #define OMAP3430_PRM_CLKSELOMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index d540ae8..120d0c1 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h @@ -209,6 +209,10 @@ #define OMAP343X_CONTROL_WKUP_DEBOBS3 (OMAP343X_CONTROL_GENERAL_WKUP + 0x014) #define OMAP343X_CONTROL_WKUP_DEBOBS4 (OMAP343X_CONTROL_GENERAL_WKUP + 0x018) +/* 36xx GENERAL_WKUP register offsets */ +#define OMAP36XX_CONTROL_VBBLDO_EFUSE_CTRL (OMAP343X_CONTROL_GENERAL_WKUP + \ + 0X02C) + /* 34xx D2D idle-related pins, handled by PM core */ #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 #define OMAP3_PADCONF_SAD2D_IDLEACK0x254 -- 1.6.3.2 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a me
[PATCH 0/4] OMAP: PM: introduce Adaptive Body-Bias LDO
This patch series introduces Forward Body-Bias (FBB), which is one technique possible using the Adaptive Body-Bias (ABB) LDO. FBB boosts voltage on VDD1 PMOS back gates which helps cold devices with weak silicon characteristics sustain voltage at high OPPs. All OMAP devices built on the 45nm process have ABB as a part of SmartReflex2. This patchset introduces it for OMAP 3630 and OMAP 4 will make use of ABB in the future. Patch series is based on pm-wip-sr and tested on Zoom3. Please note that the final patch in the series is a total hack and only meant for those wishing to test this new feature. arch/arm/mach-omap2/cpufreq34xx.c |8 +- arch/arm/mach-omap2/prm-regbits-34xx.h| 22 + arch/arm/mach-omap2/prm.h |6 ++ arch/arm/mach-omap2/voltage.c | 130 - arch/arm/plat-omap/include/plat/control.h |4 + 5 files changed, 163 insertions(+), 7 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: OMAP 3430SDP i2c boot crash
On Fri, Apr 16, 2010 at 2:07 PM, Nahamo wrote: > Tomi Valkeinen nokia.com> writes: > >> >> Hi, >> >> I haven't been able to boot my OMAP 3430SDP board with mainstream kernel >> for a while, with the omap_3430sdp_defconfig. Anyone else having >> problems? I don't get anything on the console after "Uncompressing >> Linux... done, booting the kernel.", and Trace32 shows the log below. >> >> Â Tomi > > Hi Tomi, > i am also getting exactly the same error. > Thanks You need this patch: https://patchwork.kernel.org/patch/87590/ it's still not reached mainline for some reason.. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
DVSDK on OMAP/3530
I'm trying to run the DVSDK 3.01.00.03 on an OMAP/3530 board which is not the OMAP3EVM (close, but from a different manufacturer). I've ported my board specifics to the kernel that comes with the DVSDK and everything seems to work. Except for the video demos :-( When I try to run 'decode', it attempts to open the device '/dev/video1' which I've deduced is a display in video mode. However, I can't figure out where or how that device is supposed to be created. I've compared my kernel config with the standard EVM config and all of the VIDEO/DSS/FB options match. Can someone give me some help/guidance? note: I'm not sure the best place to ask this - the DVSDK getting started guide refers to omap3530_dvevm_b...@list.ti.com but I cannot find it... Thanks -- Gary Thomas | Consulting for the MLB Associates |Embedded world -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: OMAP add TLB preservation support to IOMMU
>From bcdd232666a163d2661d704f9c21d055bacfd178 Mon Sep 17 00:00:00 2001
From: Hari Kanigeri
Date: Mon, 8 Mar 2010 18:00:36 -0600
Subject: [PATCH] ARM: OMAP add TLB preservation support to IOMMU
This patch adds TLB preservation support to IOMMU module
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/iommu2.c |7 +--
arch/arm/plat-omap/iommu.c | 16 +---
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 6f4b7cc..2735bd7 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -146,6 +146,8 @@ static u32 omap2_iommu_fault_isr(struct iommu *obj, u32 *ra)
printk("\n");
iommu_write_reg(obj, stat, MMU_IRQSTATUS);
+ /* Disable MMU to stop continuous generation of MMU faults */
+ omap2_iommu_disable(obj);
return stat;
}
@@ -183,7 +185,7 @@ static struct cr_regs *omap2_alloc_cr(struct iommu *obj,
struct iotlb_entry *e)
if (!cr)
return ERR_PTR(-ENOMEM);
- cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz;
+ cr->cam = (e->da & MMU_CAM_VATAG_MASK) | e->prsvd | e->pgsz | e->valid;
cr->ram = e->pa | e->endian | e->elsz | e->mixed;
return cr;
@@ -211,7 +213,8 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct
cr_regs *cr, char *buf)
char *p = buf;
/* FIXME: Need more detail analysis of cam/ram */
- p += sprintf(p, "%08x %08x\n", cr->cam, cr->ram);
+ p += sprintf(p, "%08x %08x %01x\n", cr->cam, cr->ram,
+ (cr->cam & MMU_CAM_P) ? 1 : 0);
return p - buf;
}
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 5186728..64d676e 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -171,15 +171,12 @@ static void iotlb_lock_get(struct iommu *obj, struct
iotlb_lock *l)
l->base = MMU_LOCK_BASE(val);
l->vict = MMU_LOCK_VICT(val);
- BUG_ON(l->base != 0); /* Currently no preservation is used */
}
static void iotlb_lock_set(struct iommu *obj, struct iotlb_lock *l)
{
u32 val;
- BUG_ON(l->base != 0); /* Currently no preservation is used */
-
val = (l->base << MMU_LOCK_BASE_SHIFT);
val |= (l->vict << MMU_LOCK_VICT_SHIFT);
@@ -241,7 +238,7 @@ int load_iotlb_entry(struct iommu *obj, struct iotlb_entry
*e)
break;
}
- if (i == obj->nr_tlb_entries) {
+ if (i == obj->nr_tlb_entries || (l.base == obj->nr_tlb_entries)) {
dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
err = -EBUSY;
goto out;
@@ -252,13 +249,18 @@ int load_iotlb_entry(struct iommu *obj, struct
iotlb_entry *e)
clk_disable(obj->clk);
return PTR_ERR(cr);
}
-
iotlb_load_cr(obj, cr);
kfree(cr);
+ /* Increment base number if preservation is set */
+ if (e->prsvd)
+ l.base++;
/* increment victim for next tlb load */
- if (++l.vict == obj->nr_tlb_entries)
- l.vict = 0;
+ if (++l.vict == obj->nr_tlb_entries) {
+ l.vict = l.base;
+ goto out;
+ }
+
iotlb_lock_set(obj, &l);
out:
clk_disable(obj->clk);
--
1.7.0
Thank you,
Best regards,
Hari
0001-ARM-OMAP-add-TLB-preservation-support-to-IOMMU.patch
Description: 0001-ARM-OMAP-add-TLB-preservation-support-to-IOMMU.patch
[PATCH] ARM:iommu support for OMAP4
>From 708914e1a82a608d423b050cb31b4deb46eb8411 Mon Sep 17 00:00:00 2001
From: Hari Kanigeri
Date: Mon, 8 Mar 2010 17:55:21 -0600
Subject: [PATCH] ARM:iommu support for OMAP4
This patch provides the iommu support for OMAP4 co-processors.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/omap4-iommu.c | 110 +
arch/arm/plat-omap/iommu.c| 10 ++-
3 files changed, 117 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap4-iommu.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index d3e54da..1395125 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -77,7 +77,7 @@ mailbox_mach-objs := mailbox.o
iommu-y+= iommu2.o
iommu-$(CONFIG_ARCH_OMAP3) += omap3-iommu.o
-
+iommu-$(CONFIG_ARCH_OMAP4) += omap4-iommu.o
obj-$(CONFIG_OMAP_IOMMU) += $(iommu-y)
i2c-omap-$(CONFIG_I2C_OMAP):= i2c.o
diff --git a/arch/arm/mach-omap2/omap4-iommu.c
b/arch/arm/mach-omap2/omap4-iommu.c
new file mode 100644
index 000..6225616
--- /dev/null
+++ b/arch/arm/mach-omap2/omap4-iommu.c
@@ -0,0 +1,110 @@
+/*
+ * omap iommu: omap4 device registration
+ *
+ * Copyright (C) 2009-2010 Nokia Corporation
+ *
+ * Written by Hari Kanigeri
+ *
+ * Added support for OMAP4. This is based on original file
+ * omap3-iommu.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+
+#include
+#include
+
+#define OMAP4_MMU1_BASE0x55082000
+#define OMAP4_MMU2_BASE0x4A066000
+
+#define OMAP4_MMU1_IRQ INT_44XX_DUCATI_MMU_IRQ
+#define OMAP4_MMU2_IRQ INT_44XX_DSP_MMU
+
+
+
+static unsigned long iommu_base[] __initdata = {
+ OMAP4_MMU1_BASE,
+ OMAP4_MMU2_BASE,
+};
+
+static int iommu_irq[] __initdata = {
+ OMAP4_MMU1_IRQ,
+ OMAP4_MMU2_IRQ,
+};
+
+static const struct iommu_platform_data omap4_iommu_pdata[] __initconst = {
+ {
+ .name = "ducati",
+ .nr_tlb_entries = 32,
+ },
+#if defined(CONFIG_MPU_TESLA_IOMMU)
+ {
+ .name = "tesla",
+ .nr_tlb_entries = 32,
+ },
+#endif
+};
+#define NR_IOMMU_DEVICES ARRAY_SIZE(omap4_iommu_pdata)
+
+static struct platform_device *omap4_iommu_pdev[NR_IOMMU_DEVICES];
+
+static int __init omap4_iommu_init(void)
+{
+ int i, err;
+
+ for (i = 0; i < NR_IOMMU_DEVICES; i++) {
+ struct platform_device *pdev;
+ struct resource res[2];
+
+ pdev = platform_device_alloc("omap-iommu", i);
+ if (!pdev) {
+ err = -ENOMEM;
+ goto err_out;
+ }
+
+ memset(res, 0, sizeof(res));
+ res[0].start = iommu_base[i];
+ res[0].end = iommu_base[i] + MMU_REG_SIZE - 1;
+ res[0].flags = IORESOURCE_MEM;
+ res[1].start = res[1].end = iommu_irq[i];
+ res[1].flags = IORESOURCE_IRQ;
+
+ err = platform_device_add_resources(pdev, res,
+ ARRAY_SIZE(res));
+ if (err)
+ goto err_out;
+ err = platform_device_add_data(pdev, &omap4_iommu_pdata[i],
+ sizeof(omap4_iommu_pdata[0]));
+ if (err)
+ goto err_out;
+ err = platform_device_add(pdev);
+ if (err)
+ goto err_out;
+ omap4_iommu_pdev[i] = pdev;
+ }
+ return 0;
+
+err_out:
+ while (i--)
+ platform_device_put(omap4_iommu_pdev[i]);
+ return err;
+}
+module_init(omap4_iommu_init);
+
+static void __exit omap4_iommu_exit(void)
+{
+ int i;
+
+ for (i = 0; i < NR_IOMMU_DEVICES; i++)
+ platform_device_unregister(omap4_iommu_pdev[i]);
+}
+module_exit(omap4_iommu_exit);
+
+MODULE_AUTHOR("Hiroshi DOYU, Hari Kanigeri");
+MODULE_DESCRIPTION("omap iommu: omap4 device registration");
+MODULE_LICENSE("GPL v2");
+
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 905ed83..5186728 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -862,10 +862,12 @@ static int __devinit omap_iommu_probe(struct
platform_device *pdev)
if (!obj)
return -ENOMEM;
- obj->clk = clk_get(&pdev->dev, pdata->clk_name);
- if (IS_ERR(obj->clk))
- goto err_clk;
-
+ /* FIX ME: OMAP4 PM framework not ready */
+ if (!cpu_is_omap44xx()) {
+ obj->clk = clk_get(&pdev->dev, pdata->clk_name);
+ if (IS_ERR(obj->clk))
+ goto err_clk;
+
Re: OMAP 3430SDP i2c boot crash
Tomi Valkeinen nokia.com> writes: > > Hi, > > I haven't been able to boot my OMAP 3430SDP board with mainstream kernel > for a while, with the omap_3430sdp_defconfig. Anyone else having > problems? I don't get anything on the console after "Uncompressing > Linux... done, booting the kernel.", and Trace32 shows the log below. > > Tomi > > ___address|0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABC DEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF > SD::C0424B00 |hsusb2_clk 0x1700 -> 0x0003.<7>mux: Setting signal etk_d12.hsusb2_dir 0x1700 -> > 0x010b.<7>mux: Setting signal etk_d13.hsusb2_nxt > SD::C0424B80 | 0x1700 -> 0x010b.<7>mux: Setting signal etk_d14.hsusb2_data0 0x1700 -> > 0x010b.<7>mux: Setting signal etk_d15.hsusb2_data1 0x170 > SD::C0424C00 |0 -> 0x010b.<7>mux: Setting signal mcspi1_cs3.hsusb2_data2 0x1708 -> > 0x010b.<7>mux: Setting signal mcspi2_cs1.hsusb2_data3 0x170 > SD::C0424C80 |8 -> 0x010b.<7>mux: Setting signal mcspi2_simo.hsusb2_data4 0x1700 -> > 0x010b.<7>mux: Setting signal mcspi2_somi.hsusb2_data5 0x1 > SD::C0424D00 |700 -> 0x010b.<7>mux: Setting signal mcspi2_cs0.hsusb2_data6 0x1708 -> > 0x010b.<7>mux: Setting signal mcspi2_clk.hsusb2_data7 0x1 > SD::C0424D80 |700 -> 0x010b.<6>OMAP DMA hardware revision 4.0.<4>bio: create slab at > 0.<5>SCSI subsystem initialized.<6>usbcore: regis > SD::C0424E00 |tered new interface driver usbfs.<6>usbcore: registered new interface driver > hub.<6>usbcore: registered new device driver usb.<1 > SD::C0424E80 |>Unhandled fault: alignment exception (0x801) at 0xfa070009.<0>Internal error: : > 801 [#1].<0>last sysfs file: .<4>Modules linked > SD::C0424F00 | in:.<4>CPU: 0Not tainted (2.6.34-rc4-00014-g7591eef #937).<4>PC is at > omap_i2c_unidle+0x4c/0x140.<4>LR is at omap2_dflt_cl > SD::C0424F80 |k_enable+0xd8/0xe8.<4>pc : []lr : []psr: 6013.<4>sp : > c7c19e60 ip : 0009 fp : c7c19e74.<4> > SD::C0425000 |r10: r9 : r8 : c03fa908.<4>r7 : c03fac48 r6 : c03fa900 r5 : c7ca0e00 r4 > : c7ca0e00.<4>r3 : 0009 r2 : > SD::C0425080 | fa07 r1 : r0 : .<4>Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM > Segment kernel.<4>Control: 10c53 > SD::C0425100 |87f Table: 80004019 DAC: 0017.<0>Process swapper (pid: 1, stack limit = > 0xc7c182e8).<0>Stack: (0xc7c19e60 to 0xc7c1a000).< > SD::C0425180 |0>9e60: c03f521c c7ca0e00 c7c19eac c7c19e78 c02f7e9c c024b8a8 > c0416110.<0>9e80: c7c19e9c c7c19e90 c00fe430 c03fa908 c03 > SD::C0425200 |fa908 c041bac0 c7ca3cc0 c0416110.<0>9ea0: c7c19ebc c7c19eb0 c01e8d60 c02f7cf8 > c7c19edc c7c19ec0 c01e7d38 c01e8d4c.<0>9ec0: c03fa > SD::C0425280 |908 c03fa93c c041bac0 c7ca3cc0 c7c19efc c7c19ee0 c01e7e58 c01e7c7c.<0>9ee0: > c01e7df0 c041bac0 c7ca3cc0 c7c19f24 c7c19f0 > SD::C0425300 |0 c01e7514 c01e7dfc.<0>9f00: c7c04af8 c7c445f0 c0194238 c0026ba4 c041bac0 > c041bac0 c7c19f34 c7c19f28.<0>9f20: c01e7b84 c01e74d0 > SD::C0425380 |c7c19f64 c7c19f38 c01e6df4 c01e7b70 c03c051a .<0>9f40: c0026ba4 > c041bac0 c7c19f8c c7 > SD::C0425400 |c19f68.<0>9f60: c01e8194 c01e6d58 c0026ba4 c0020018 > .<0>9f80: c7c19f9c c7c19f90 c01e9204 c01e > SD::C0425480 |80f0 c7c19fac c7c19fa0 c002002c c01e91c4.<0>9fa0: c7c19fdc c7c19fb0 c0031374 > c0020024 c7c19fdc c7c19fc8.<0>9fc > SD::C0425500 |0: c0026ba4 c7c19ff4 c7c19fe0 c00085f4 > c003131c.<0>9fe0: c7c19ff8 c0060304 > SD::C0425580 | c0008568 28050809 01004804.<4>Backtrace: .<4>[] > (omap_i2c_unidle+0x0/0x140) from [] (omap_i2c_probe+0x1b0/0 > SD::C0425600 |x3a4).<4> r5:c7ca0e00 r4:c03f521c.<4>[] (omap_i2c_probe+0x0/0x3a4) > from [] (platform_drv_probe+0x20/0x24).<4 > SD::C0425680 |> r8:c0416110 r7:c7ca3cc0 r6:c041bac0 r5:c03fa908 r4:c03fa908.<4>[] > (platform_drv_probe+0x0/0x24) from [] (d > SD::C0425700 |river_probe_device+0xc8/0x180).<4>[] > (driver_probe_device+0x0/0x180) from [] (__driver_attach+0x68/0x8c).<4> > SD::C0425780 | r7:c7ca3cc0 r6:c041bac0 r5:c03fa93c r4:c03fa908.<4> [] > (__driver_attach+0x0/0x8c) from [] (bus_for_each_dev+ > SD::C0425800 |0x50/0x84).<4> r7:c7ca3cc0 r6:c041bac0 r5:c01e7df0 > r4:.<4>[] (bus_for_each_dev+0x0/0x84) from [] (dr > SD::C0425880 |iver_attach+0x20/0x28).<4> r6:c041bac0 r5:c041bac0 > r4:c0026ba4.<4>[] (driver_attach+0x0/0x28) from [] (bus_a > SD::C0425900 |dd_driver+0xa8/0x230).<4>[] (bus_add_driver+0x0/0x230) from > [] (driver_register+0xb0/0x138).<4>[] > SD::C0425980 |(driver_register+0x0/0x138) from [] > (platform_driver_register+0x4c/0x60).<4> r9: r8: r7: r6:c0 > SD::C0425A00 |020018 r5:.<4>r4:c0026ba4.<4>[] > (platform_driver_register+0x0/0x60) from [] (omap_i2c_init_dr
Re: [PATCH 3/6] OMAP NAND: configurable fifo threshold to gain the throughput
Hi Ghorai,
On Fri, Apr 16, 2010 at 5:05 PM, Sukumar Ghorai wrote:
[...]
> - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
> + ret = gpmc_prefetch_enable(info->gpmc_cs, 0x40, 0x0, len, 0x0);
Use macros here too then.
>if (ret) {
>/* PFPW engine is busy, use cpu copy method */
>if (info->nand.options & NAND_BUSWIDTH_16)
> @@ -354,7 +354,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
>}
>
>/* configure and start prefetch transfer */
> - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x1);
> + ret = gpmc_prefetch_enable(info->gpmc_cs, 0x40, 0x0, len, 0x1);
here too
>if (ret) {
>/* PFPW engine is busy, use cpu copy method */
>if (info->nand.options & NAND_BUSWIDTH_16)
> @@ -405,10 +405,11 @@ static inline int omap_nand_dma_transfer(struct
> mtd_info *mtd, void *addr,
>dma_addr_t dma_addr;
>int ret;
>
> - /* The fifo depth is 64 bytes. We have a sync at each frame and frame
> -* length is 64 bytes.
> + /* The fifo depth is 64 bytes max.
> +* But configure the FIFO-threahold to 32 to get a sync at each frame
> +* and frame length is 32 bytes.
> */
> - int buf_len = len >> 6;
> + int buf_len = len >> 5;
>
>if (addr >= high_memory) {
>struct page *p1;
> @@ -447,7 +448,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info
> *mtd, void *addr,
>OMAP24XX_DMA_GPMC, OMAP_DMA_SRC_SYNC);
>}
>/* configure and start prefetch transfer */
> - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x1, len, is_write);
> + ret = gpmc_prefetch_enable(info->gpmc_cs, 0x20, 0x1, len, is_write);
>if (ret)
>/* PFPW engine is busy, use cpu copy methode */
>goto out_copy;
> @@ -524,6 +525,7 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd,
> static irqreturn_t omap_nand_irq(int this_irq, void *dev)
> {
>struct omap_nand_info *info = (struct omap_nand_info *) dev;
> + u32 *p = (u32 *) info->buf;
>u32 irq_enb = 0, pref_status = 0, bytes = 0;
>u32 irq_stats = __raw_readl(info->gpmc_baseaddr + GPMC_IRQSTATUS);
>u32 pref_config = __raw_readl(info->gpmc_baseaddr +
> @@ -533,14 +535,11 @@ static irqreturn_t omap_nand_irq(int this_irq, void
> *dev)
>if (irq_stats & 0x2)
>goto done;
>
> - u32 *p = (u32 *) info->buf;
> - pref_status = gpmc_prefetch_status();
> - bytes = ((pref_status >> 24) & 0x7F);
> + bytes = PREFETCH_FIFOTHRESHOLD_WRITE;
By this, you are not really keeping prefetch the busyest.
you are filling only 'PREFETCH_FIFOTHRESHOLD_WRITE' bytes, while there
could be more free spaces.
Previous way of doing it was more efficent.
>iowrite32_rep(info->nand_pref_fifo_add, p, bytes >> 2);
>info->buf = info->buf + bytes;
>
>} else {
> - u32 *p = (u32 *) info->buf;
>pref_status = gpmc_prefetch_status();
>bytes = ((pref_status >> 24) & 0x7F);
>ioread32_rep(info->nand_pref_fifo_add, p, bytes >> 2);
> @@ -586,7 +585,8 @@ static void omap_read_buf_irq_pref(struct mtd_info *mtd,
> u_char *buf, int len)
>init_completion(&info->comp);
>
>/* configure and start prefetch transfer */
> - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
> + ret = gpmc_prefetch_enable(info->gpmc_cs,
> + PREFETCH_FIFOTHRESHOLD_READ, 0x0, len, 0x0);
>if (ret)
>/* PFPW engine is busy, use cpu copy methode */
>goto out_copy;
> @@ -630,7 +630,8 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd,
>init_completion(&info->comp);
>
>/* configure and start prefetch transfer */
> - ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x1);
> + ret = gpmc_prefetch_enable(info->gpmc_cs,
> + PREFETCH_FIFOTHRESHOLD_WRITE, 0x0, len, 0x1);
In case of write, in my experiments, fifo thresholed '24' was the best
compromise for throughput and cpu load.
Regards,
Vimal
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DevKit8K: DSS TV-Out Issue
I am trying to load the kernel (Linux 2.6.34-rc3-07875-geba0147-dirty) in the DevKit8K board. My default output device is TV. Initially, none of the DSS devices got detected. After merging the "Koen Kooi" patch, DSS devices are getting detected and still getting below error: [ 97.250915] OMAPFB: omapfb_init [ Â 97.251007] OMAPFB: omapfb_probe [ Â 97.251037] OMAP_DSS_GET_NEXT_DEV [ Â 97.254486] DSS DEV 0 [ Â 97.256774] OMAP_DSS_GET_NEXT_DEV [ Â 97.260101] DSS DEV 1 [ Â 97.262420] OMAP_DSS_GET_NEXT_DEV [ Â 97.265777] TV:NTSC [ Â 97.267883] omapdss VENC: venc_check_timings [ Â 97.267883] omapdss VENC: venc_set_timings [ Â 97.267913] OMAPFB: create 2 framebuffers [ Â 97.267944] OMAPFB: fb_infos allocated [ Â 97.267974] Overlay 0 [ Â 97.272674] OMAPFB: allocating 1388544 bytes for fb 0 [ Â 97.283447] OMAPFB: allocated VRAM paddr 805b5000, vaddr c8a0 [ Â 97.283447] Overlay 0 [ Â 97.288146] OMAPFB: allocating 4194304 bytes for fb 1 [ Â 97.320404] OMAPFB: allocated VRAM paddr 80708000, vaddr c900 [ Â 97.320434] OMAPFB: region0 phys 805b5000 virt c8a0 size=1388544 [ Â 97.320465] OMAPFB: region1 phys 80708000 virt c900 size=4194304 [ Â 97.320465] OMAPFB: fbmems allocated [ Â 97.320495] Overlay 0 [ Â 97.325714] RESL H 482 W 720 Mode 0 [ Â 97.333984] omapfb omapfb: illegal display bpp 0 [ Â 97.338653] omapfb omapfb: failed to setup fb_info [ Â 97.343475] OMAPFB: free_resources [ Â 97.343505] OMAPFB: free all fbmem [ Â 97.343536] omapfb omapfb: failed to setup omapfb [ Â 97.348297] omapfb: probe of omapfb failed with error -22 [ Â 97.354309] regulator_init_complete: incomplete constraints, leaving VDVI on [ Â 97.361511] regulator_init_complete: incomplete constraints, leaving VDAC on [ Â 97.369323] twl_rtc twl_rtc: setting system clock to 2000-01-01 Here is my understanding: omapfp-main.c: omapfb_get_recommended_bpp(fbdev, display)) Â \--> fbdev->bpp_overrides[i].bpp --> bpp value is 0 This fbdev->bpp_overrides[i].bpp value is initialised by omapfp-main.c: omapfb_set_def_mode() Â \--> omapfb_mode_to_timings(mode_str, &timings, &bpp) fbdev->bpp_overrides[fbdev->num_bpp_overrides].bpp = bpp; (Value is 0) If the FOR loop in omapfp_get_recommended_bpp() is commented out, then it gets the bpp value from the below function, Â dss/display.c: omapdss_default_get_recommended_bpp() --> Return bpp 24 But after this modification, kernel panic is happening. http://bharathi.pastebin.com/G7ZdmjQt Any clue to overcome this TV-Out issue? -- Thanks -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 03/13] DSPBRIDGE: Moving functions from mem.c to drv.c
Ivan,
> In the commit 702b94bff3c50542a6e4ab9a4f4cef093262fe65 (2.6.34) the
> functions
> dmac_inv_range and dmac_clean_range were removed.
>
> I'm wondering how to fix this in order to rebase to 2.6.34.
>
> Thanks
2 options:
1. Replace dmac_inv_range and dmac_clean_range functions with the new dma map
and unmap functions. These are supposed to be the new functions to do the same
functionality, but in our limited testing some time ago, the dma_unmap function
wasn't invalidating the cache. You can check this at your end.
2. Revert the patch that deprecated these APIs to unblock you temporarily.
Thank you,
Best regards,
Hari
> -Original Message-
> From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> ow...@vger.kernel.org] On Behalf Of VÃctor M. Jáquez L.
> Sent: Friday, April 16, 2010 5:37 AM
> To: Gomez Castellanos, Ivan
> Cc: linux-omap@vger.kernel.org; Hiroshi DOYU; Felipe Contreras; Ameya
> Palande; Menon, Nishanth
> Subject: Re: [PATCH 03/13] DSPBRIDGE: Moving functions from mem.c to drv.c
>
> On Thu, Apr 08, 2010 at 06:47:13PM -0500, Gomez Castellanos, Ivan wrote:
>
> > +/*
> > + * mem_flush_cache ===
> > + * Purpose:
> > + * Flush cache
> > + */
> > +void mem_flush_cache(void *pMemBuf, u32 byte_size, s32 FlushType)
> > +{
> > + if (!pMemBuf)
> > + return;
> > +
> > + switch (FlushType) {
> > + /* invalidate only */
> > + case PROC_INVALIDATE_MEM:
> > + dmac_inv_range(pMemBuf, pMemBuf + byte_size);
> > + outer_inv_range(__pa((u32) pMemBuf), __pa((u32) pMemBuf
> +
> > + byte_size));
> > + break;
> > + /* writeback only */
> > + case PROC_WRITEBACK_MEM:
> > + dmac_clean_range(pMemBuf, pMemBuf + byte_size);
> > + outer_clean_range(__pa((u32) pMemBuf), __pa((u32)
> pMemBuf +
> > + byte_size));
> > + break;
> > + /* writeback and invalidate */
> > + case PROC_WRITEBACK_INVALIDATE_MEM:
> > + dmac_flush_range(pMemBuf, pMemBuf + byte_size);
> > + outer_flush_range(__pa((u32) pMemBuf), __pa((u32)
> pMemBuf +
> > + byte_size));
> > + break;
> > + }
>
> In the commit 702b94bff3c50542a6e4ab9a4f4cef093262fe65 (2.6.34) the
> functions
> dmac_inv_range and dmac_clean_range were removed.
>
> I'm wondering how to fix this in order to rebase to 2.6.34.
>
> Thanks
>
> vmjl
> --
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> the body of a message to majord...@vger.kernel.org
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[PATCH 6/6] omap: NAND: Making ecc layout as compatible with romcode ecc
This patch overrides nand ecc layout and bad block descriptor (for 8-bit
device) to support hw ecc in romcode layout. So as to have in sync with ecc
layout throughout; i.e. x-laod, u-boot and kernel.
This patch also enables to use romcode ecc for spd and zoom, by default.
This enables to flash x-load, u-boot, kernel, FS images from kernel itself
and compatiable with other tools.
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/board-sdp-flash.c |2 +-
arch/arm/mach-omap2/board-zoom-flash.c |2 +-
drivers/mtd/nand/omap2.c | 42
3 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 437a1a4..ac891ea
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -162,7 +162,7 @@ __init board_nand_init(struct flash_partitions
sdp_nand_parts, u8 cs)
sdp_nand_data.cs= cs;
sdp_nand_data.parts = sdp_nand_parts.parts;
sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
- sdp_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
+ sdp_nand_data.ecc_opt = 0x2; /* HW ECC layout as in ROMCODE */
if (cpu_is_omap3630())
sdp_nand_data.devsize = 1; /* 0: 8-bit, 1: 16-bit device */
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 1547bdb..53eeaa6
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -71,7 +71,7 @@ void __init zoom_flash_init(struct flash_partitions
zoom_nand_parts[], int cs)
zoom_nand_data.cs = cs;
zoom_nand_data.parts= zoom_nand_parts[0].parts;
zoom_nand_data.nr_parts = zoom_nand_parts[0].nr_parts;
- zoom_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
+ zoom_nand_data.ecc_opt = 0x2; /* HW ECC in romcode layout */
zoom_nand_data.gpmc_baseaddr= (void *)(gpmc_base_add);
zoom_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
GPMC_CS0_BASE + cs * GPMC_CS_SIZE);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 207fb3c..f5d2c53
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -152,6 +152,39 @@ struct omap_nand_info {
u_char *buf;
};
+static struct nand_ecclayout hw_x8_romcode_oob_64 = {
+ .eccbytes = 12,
+ .eccpos = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
+ },
+ .oobfree = {
+ {.offset = 13,
+.length = 51}
+ }
+};
+
+/* Define some generic bad / good block scan pattern which are used
+ * while scanning a device for factory marked good / bad blocks
+ */
+static uint8_t scan_ff_pattern[] = { 0xff };
+static struct nand_bbt_descr bb_descrip_flashbased = {
+ .options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
+ .offs = 0,
+ .len = 1,
+ .pattern = scan_ff_pattern,
+};
+
+static struct nand_ecclayout hw_x16_romcode_oob_64 = {
+ .eccbytes = 12,
+ .eccpos = {
+ 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
+ },
+ .oobfree = {
+ {.offset = 14,
+.length = 50}
+ }
+};
+
/**
* omap_nand_wp - This function enable or disable the Write Protect feature
* @mtd: MTD device structure
@@ -1136,6 +1169,15 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
info->nand.verify_buf = omap_verify_buf;
if (pdata->ecc_opt & 0x3) {
+ if (pdata->ecc_opt == 0x2) {
+ if (info->nand.options & NAND_BUSWIDTH_16) {
+ info->nand.ecc.layout = &hw_x16_romcode_oob_64;
+ } else {
+ info->nand.ecc.layout = &hw_x8_romcode_oob_64;
+ info->nand.badblock_pattern =
+ &bb_descrip_flashbased;
+ }
+ }
info->nand.ecc.bytes= 3;
info->nand.ecc.size = 512;
info->nand.ecc.calculate= omap_calculate_ecc;
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[PATCH 5/6] omap: NAND: ecc layout select from board file
This patch makes it possible to select sw or hw (different layout options)
ecc scheme supported by omap nand driver. And hw ecc layout selected for
sdp and zoom boards, by default.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/board-sdp-flash.c |1 +
arch/arm/mach-omap2/board-zoom-flash.c |1 +
arch/arm/plat-omap/include/plat/nand.h |4
drivers/mtd/nand/omap2.c | 28
4 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 81b83ce..437a1a4
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -162,6 +162,7 @@ __init board_nand_init(struct flash_partitions
sdp_nand_parts, u8 cs)
sdp_nand_data.cs= cs;
sdp_nand_data.parts = sdp_nand_parts.parts;
sdp_nand_data.nr_parts = sdp_nand_parts.nr_parts;
+ sdp_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
if (cpu_is_omap3630())
sdp_nand_data.devsize = 1; /* 0: 8-bit, 1: 16-bit device */
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 6a5dcf4..1547bdb
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -71,6 +71,7 @@ void __init zoom_flash_init(struct flash_partitions
zoom_nand_parts[], int cs)
zoom_nand_data.cs = cs;
zoom_nand_data.parts= zoom_nand_parts[0].parts;
zoom_nand_data.nr_parts = zoom_nand_parts[0].nr_parts;
+ zoom_nand_data.ecc_opt = 0x1; /* HW ECC in default layout */
zoom_nand_data.gpmc_baseaddr= (void *)(gpmc_base_add);
zoom_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
GPMC_CS0_BASE + cs * GPMC_CS_SIZE);
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 8ba2e3e..b2ccd68
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -25,6 +25,10 @@ struct omap_nand_platform_data {
void __iomem*gpmc_cs_baseaddr;
void __iomem*gpmc_baseaddr;
int devsize;
+ int ecc_opt; /* 0x0 - sw ecc
+ * 0x1 - hw ecc default ecc layout
+ * 0x2 - hw ecc in romcode layout
+ */
};
/* size (4 KiB) for IO mapping */
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 61c0c01..207fb3c
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -31,7 +31,6 @@
#defineGPMC_BUF_FULL 0x0001
#defineGPMC_BUF_EMPTY 0x
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
#define NAND_Ecc_P1e (1 << 0)
#define NAND_Ecc_P2e (1 << 1)
#define NAND_Ecc_P4e (1 << 2)
@@ -98,7 +97,6 @@
#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
-#endif /* CONFIG_MTD_NAND_OMAP_HWECC */
#ifdef CONFIG_MTD_PARTITIONS
static const char *part_probes[] = { "cmdlinepart", NULL };
@@ -673,7 +671,6 @@ static int omap_verify_buf(struct mtd_info *mtd, const
u_char * buf, int len)
return 0;
}
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
/**
* omap_hwecc_init - Initialize the HW ECC for NAND flash in GPMC controller
* @mtd: MTD device structure
@@ -951,7 +948,6 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int
mode)
__raw_writel(val, info->gpmc_baseaddr + GPMC_ECC_CONFIG);
}
-#endif
/**
* omap_wait - wait until the command is done
@@ -1139,19 +1135,19 @@ static int __devinit omap_nand_probe(struct
platform_device *pdev)
}
info->nand.verify_buf = omap_verify_buf;
-#ifdef CONFIG_MTD_NAND_OMAP_HWECC
- info->nand.ecc.bytes= 3;
- info->nand.ecc.size = 512;
- info->nand.ecc.calculate= omap_calculate_ecc;
- info->nand.ecc.hwctl= omap_enable_hwecc;
- info->nand.ecc.correct = omap_correct_data;
- info->nand.ecc.mode = NAND_ECC_HW;
+ if (pdata->ecc_opt & 0x3) {
+ info->nand.ecc.bytes= 3;
+ info->nand.ecc.size = 512;
+ info->nand.ecc.calculate= omap_calculate_ecc;
+ info->nand.ecc.hwctl= omap_enable_hwecc;
+ info->nand.ecc.correct = omap_correct_data;
+ info->nand.ecc.mode = NAND_ECC_HW;
- /* init HW ECC */
- omap_hwecc_init(&info->mtd);
-#else
- info->nand.ecc.mode = NAND_ECC_SOFT;
-#endif
+ /* init HW ECC */
+ omap_hwecc_init(&info->mtd);
+ } else {
[PATCH 4/6] omap-3630 NAND: enable NAND io in prefetch-irq mode
Update config file to enable NAND in prefetch IRQ mode for ZOOM3 and 3630SDP . Signed-off-by: Sukumar Ghorai --- arch/arm/configs/omap_3630sdp_defconfig |1 + arch/arm/configs/omap_zoom3_defconfig |1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap_3630sdp_defconfig b/arch/arm/configs/omap_3630sdp_defconfig index a623927..9dfce1a --- a/arch/arm/configs/omap_3630sdp_defconfig +++ b/arch/arm/configs/omap_3630sdp_defconfig @@ -525,6 +525,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_OMAP_PREFETCH=y # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ=y CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set diff --git a/arch/arm/configs/omap_zoom3_defconfig b/arch/arm/configs/omap_zoom3_defconfig index 1a12e3e..27b16ed --- a/arch/arm/configs/omap_zoom3_defconfig +++ b/arch/arm/configs/omap_zoom3_defconfig @@ -534,6 +534,7 @@ CONFIG_MTD_NAND=y CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_NAND_OMAP_PREFETCH=y # CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set +CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ=y CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set -- 1.5.4.7 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/6] OMAP NAND: configurable fifo threshold to gain the throughput
Configure the FIFO THREASHOLD value to 50% (32 bytes) to keep busy both
filling and to drain out of FIFO at reading and writing.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/gpmc.c |9 ++---
arch/arm/plat-omap/include/plat/gpmc.h |7 +--
drivers/mtd/nand/omap2.c | 25 +
3 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 9c77af0..1380886 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -391,12 +391,15 @@ EXPORT_SYMBOL(gpmc_cs_free);
* @u32_count: number of bytes to be transferred
* @is_write: prefetch read(0) or write post(1) mode
*/
-int gpmc_prefetch_enable(int cs, int dma_mode,
+int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
unsigned int u32_count, int is_write)
{
uint32_t prefetch_config1;
- if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
+ if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
+ printk(KERN_ERR "PREFETCH Fifo Threshold is not supported\n");
+ return -1;
+ } else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
/* Set the amount of bytes to be prefetched */
gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
@@ -404,7 +407,7 @@ int gpmc_prefetch_enable(int cs, int dma_mode,
* enable the engine. Set which cs is has requested for.
*/
prefetch_config1 = ((cs << CS_NUM_SHIFT) |
- PREFETCH_FIFOTHRESHOLD |
+ PREFETCH_FIFOTHRESHOLD(fifo_th) |
ENABLE_PREFETCH |
(dma_mode << DMA_MPU_MODE) |
(0x1 & is_write));
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index 347d212..a36a046 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -55,10 +55,13 @@
#define GPMC_CHUNK_SHIFT24 /* 16 MB */
#define GPMC_SECTION_SHIFT 28 /* 128 MB */
-#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
+#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
+#define PREFETCH_FIFOTHRESHOLD(val)(val << 8)
#define CS_NUM_SHIFT24
#define ENABLE_PREFETCH (0x1 << 7)
#define DMA_MPU_MODE2
+#define PREFETCH_FIFOTHRESHOLD_READ32 /* threashold size for read */
+#define PREFETCH_FIFOTHRESHOLD_WRITE 32 /* threashold size for write */
#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
@@ -136,7 +139,7 @@ extern int gpmc_cs_request(int cs, unsigned long size,
unsigned long *base);
extern void gpmc_cs_free(int cs);
extern int gpmc_cs_set_reserved(int cs, int reserved);
extern int gpmc_cs_reserved(int cs);
-extern int gpmc_prefetch_enable(int cs, int dma_mode,
+extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
unsigned int u32_count, int is_write);
extern void gpmc_prefetch_reset(void);
extern int gpmc_prefetch_status(void);
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index de9b058..61c0c01
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -310,7 +310,7 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char
*buf, int len)
}
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x0);
+ ret = gpmc_prefetch_enable(info->gpmc_cs, 0x40, 0x0, len, 0x0);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
@@ -354,7 +354,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
}
/* configure and start prefetch transfer */
- ret = gpmc_prefetch_enable(info->gpmc_cs, 0x0, len, 0x1);
+ ret = gpmc_prefetch_enable(info->gpmc_cs, 0x40, 0x0, len, 0x1);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
@@ -405,10 +405,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info
*mtd, void *addr,
dma_addr_t dma_addr;
int ret;
- /* The fifo depth is 64 bytes. We have a sync at each frame and frame
-* length is 64 bytes.
+ /* The fifo depth is 64 bytes max.
+* But configure the FIFO-threahold to 32 to get a sync at each frame
+* and frame length is 32 bytes.
*/
- int buf_len = len >> 6;
+ int buf_len = len >> 5;
if (addr >= high_memory) {
struct page *p1;
@@ -447,7 +448,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info
*mtd, void *addr,
[PATCH 2/6] omap3: NAND Prefetch in IRQ mode support
This patch enable prefetch-irq mode for NAND.
Signed-off-by: Vimal Singh
Signed-off-by: Sukumar Ghorai
---
arch/arm/mach-omap2/board-sdp-flash.c |1 +
arch/arm/mach-omap2/board-zoom-flash.c |1 +
arch/arm/plat-omap/include/plat/nand.h |1 +
drivers/mtd/nand/Kconfig | 14 +++-
drivers/mtd/nand/omap2.c | 180 +++-
5 files changed, 191 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/board-sdp-flash.c
b/arch/arm/mach-omap2/board-sdp-flash.c
index 57116e6..81b83ce
--- a/arch/arm/mach-omap2/board-sdp-flash.c
+++ b/arch/arm/mach-omap2/board-sdp-flash.c
@@ -151,6 +151,7 @@ static struct omap_nand_platform_data sdp_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings,
.dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .gpmc_irq = 20,
.dev_ready = NULL,
.devsize= 0,/* '0' for 8-bit, '1' for 16-bit device */
};
diff --git a/arch/arm/mach-omap2/board-zoom-flash.c
b/arch/arm/mach-omap2/board-zoom-flash.c
index 55e173b..6a5dcf4 100644
--- a/arch/arm/mach-omap2/board-zoom-flash.c
+++ b/arch/arm/mach-omap2/board-zoom-flash.c
@@ -54,6 +54,7 @@ static struct omap_nand_platform_data zoom_nand_data = {
.nand_setup = NULL,
.gpmc_t = &nand_timings,
.dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .gpmc_irq = 20,
.dev_ready = NULL,
.devsize= 1,/* '0' for 8-bit, '1' for 16-bit device */
};
diff --git a/arch/arm/plat-omap/include/plat/nand.h
b/arch/arm/plat-omap/include/plat/nand.h
index 6ba88d2..8ba2e3e 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -20,6 +20,7 @@ struct omap_nand_platform_data {
int (*nand_setup)(void);
int (*dev_ready)(struct omap_nand_platform_data *);
int dma_channel;
+ int gpmc_irq;
unsigned long phys_base;
void __iomem*gpmc_cs_baseaddr;
void __iomem*gpmc_baseaddr;
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index b712aed..ee9abbd
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -94,6 +94,9 @@ config MTD_NAND_OMAP_PREFETCH
help
The NAND device can be accessed for Read/Write using GPMC PREFETCH
engine
to improve the performance.
+GPMC PREFETCH can be configured eigther in MPU interrupt mode or in DMA
+interrupt mode. If not selected any of them prefetch will be used in
+polling mode.
config MTD_NAND_OMAP_PREFETCH_DMA
depends on MTD_NAND_OMAP_PREFETCH
@@ -102,7 +105,16 @@ config MTD_NAND_OMAP_PREFETCH_DMA
help
The GPMC PREFETCH engine can be configured eigther in MPU interrupt
mode
or in DMA interrupt mode.
-Say y for DMA mode or MPU mode will be used
+Say y for DMA mode
+
+config MTD_NAND_OMAP_PREFETCH_IRQ
+ depends on MTD_NAND_OMAP_PREFETCH && !MTD_NAND_OMAP_PREFETCH_DMA
+ bool "IRQ mode"
+ default n
+ help
+The GPMC PREFETCH engine can be configured eigther in MPU interrupt
mode
+or in DMA interrupt mode.
+Say y for IRQ mode
config MTD_NAND_IDS
tristate
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 09a89f9..de9b058 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -111,17 +112,27 @@ module_param(use_prefetch, bool, 0);
MODULE_PARM_DESC(use_prefetch, "enable/disable use of PREFETCH");
#ifdef CONFIG_MTD_NAND_OMAP_PREFETCH_DMA
+const int use_interrupt;
static int use_dma = 1;
/* "modprobe ... use_dma=0" etc */
module_param(use_dma, bool, 0);
-MODULE_PARM_DESC(use_dma, "enable/disable use of DMA");
+MODULE_PARM_DESC(use_dma, "enable/disable use of DMA mode");
+#elif defined(CONFIG_MTD_NAND_OMAP_PREFETCH_IRQ)
+const int use_dma;
+static int use_interrupt = 1;
+
+/* "modprobe ... use_dma=0" etc */
+module_param(use_interrupt, bool, 0);
+MODULE_PARM_DESC(use_interrupt, "enable/disable use of IRQ mode");
#else
const int use_dma;
+const int use_interrupt;
#endif
#else
const int use_prefetch;
const int use_dma;
+const int use_interrupt;
#endif
struct omap_nand_info {
@@ -139,6 +150,8 @@ struct omap_nand_info {
void __iomem*nand_pref_fifo_add;
struct completion comp;
int dma_ch;
+ int gpmc_irq;
+ u_char *buf;
};
/**
@@ -503,6 +516,141 @@ static void omap_write_buf_dma_pref(struct mtd_info *mtd,
omap_nand_dma_transfer(mtd, (u_char *) buf, len, 0x1);
}
+/*
+ * omap_nand_irq - GMPC i
[PATCH 1/6] omap3: GPMC register definition at common location
GPMC register definition move to common place in gpmc.h.
Signed-off-by: Sukumar Ghorai
Signed-off-by: Vimal Singh
---
arch/arm/mach-omap2/gpmc.c | 38 +--
arch/arm/plat-omap/include/plat/gpmc.h | 36 +++--
drivers/mtd/nand/omap2.c | 14 ---
3 files changed, 40 insertions(+), 48 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5bc3ca0..9c77af0
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -28,40 +28,6 @@
#include
-/* GPMC register offsets */
-#define GPMC_REVISION 0x00
-#define GPMC_SYSCONFIG 0x10
-#define GPMC_SYSSTATUS 0x14
-#define GPMC_IRQSTATUS 0x18
-#define GPMC_IRQENABLE 0x1c
-#define GPMC_TIMEOUT_CONTROL 0x40
-#define GPMC_ERR_ADDRESS 0x44
-#define GPMC_ERR_TYPE 0x48
-#define GPMC_CONFIG0x50
-#define GPMC_STATUS0x54
-#define GPMC_PREFETCH_CONFIG1 0x1e0
-#define GPMC_PREFETCH_CONFIG2 0x1e4
-#define GPMC_PREFETCH_CONTROL 0x1ec
-#define GPMC_PREFETCH_STATUS 0x1f0
-#define GPMC_ECC_CONFIG0x1f4
-#define GPMC_ECC_CONTROL 0x1f8
-#define GPMC_ECC_SIZE_CONFIG 0x1fc
-
-#define GPMC_CS0 0x60
-#define GPMC_CS_SIZE 0x30
-
-#define GPMC_MEM_START 0x
-#define GPMC_MEM_END 0x3FFF
-#define BOOT_ROM_SPACE 0x10/* 1MB */
-
-#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
-#define GPMC_SECTION_SHIFT 28 /* 128 MB */
-
-#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
-#define CS_NUM_SHIFT 24
-#define ENABLE_PREFETCH(0x1 << 7)
-#define DMA_MPU_MODE 2
-
/* Structure to save gpmc cs context */
struct gpmc_cs_config {
u32 config1;
@@ -112,7 +78,7 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val)
{
void __iomem *reg_addr;
- reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+ reg_addr = gpmc_base + GPMC_CS0_BASE + (cs * GPMC_CS_SIZE) + idx;
__raw_writel(val, reg_addr);
}
@@ -120,7 +86,7 @@ u32 gpmc_cs_read_reg(int cs, int idx)
{
void __iomem *reg_addr;
- reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx;
+ reg_addr = gpmc_base + GPMC_CS0_BASE + (cs * GPMC_CS_SIZE) + idx;
return __raw_readl(reg_addr);
}
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h
b/arch/arm/plat-omap/include/plat/gpmc.h
index 145838a..347d212 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -25,10 +25,40 @@
#define GPMC_CS_NAND_ADDRESS 0x20
#define GPMC_CS_NAND_DATA 0x24
-#define GPMC_CONFIG0x50
-#define GPMC_STATUS0x54
+/* GPMC register offsets */
+#define GPMC_REVISION 0x00
+#define GPMC_SYSCONFIG 0x10
+#define GPMC_SYSSTATUS 0x14
+#define GPMC_IRQSTATUS 0x18
+#define GPMC_IRQENABLE 0x1c
+#define GPMC_TIMEOUT_CONTROL0x40
+#define GPMC_ERR_ADDRESS0x44
+#define GPMC_ERR_TYPE 0x48
+#define GPMC_CONFIG 0x50
+#define GPMC_STATUS 0x54
+#define GPMC_PREFETCH_CONFIG1 0x1e0
+#define GPMC_PREFETCH_CONFIG2 0x1e4
+#define GPMC_PREFETCH_CONTROL 0x1ec
+#define GPMC_PREFETCH_STATUS0x1f0
+#define GPMC_ECC_CONFIG 0x1f4
+#define GPMC_ECC_CONTROL0x1f8
+#define GPMC_ECC_SIZE_CONFIG0x1fc
+#define GPMC_ECC1_RESULT0x200
+
#define GPMC_CS0_BASE 0x60
-#define GPMC_CS_SIZE 0x30
+#define GPMC_CS_SIZE0x30
+
+#define GPMC_MEM_START 0x
+#define GPMC_MEM_END0x3FFF
+#define BOOT_ROM_SPACE 0x10/* 1MB */
+
+#define GPMC_CHUNK_SHIFT24 /* 16 MB */
+#define GPMC_SECTION_SHIFT 28 /* 128 MB */
+
+#define PREFETCH_FIFOTHRESHOLD (0x40 << 8)
+#define CS_NUM_SHIFT24
+#define ENABLE_PREFETCH (0x1 << 7)
+#define DMA_MPU_MODE2
#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31)
#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index ad07d39..09a89f9
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -22,12 +22,6 @@
#include
#include
-#define GPMC_IRQ_STATUS0x18
-#define GPMC_ECC_CONFIG0x1F4
-#define GPMC_ECC_CONTROL 0x1F8
-#define GPMC_ECC_SIZE_CONFIG 0x1FC
-#define GPMC_ECC1_RESULT 0x200
-
#defineDRIVER_NAME "omap2-nand"
#defineNAND_WP_OFF 0
@@ -36,6 +30,7 @@
#defineGPMC_BUF_FULL 0x0001
#defineGPMC_BUF_EMPTY 0x
+#ifdef CONFIG_MTD_NAND_OMAP_HWECC
#define NAND_Ecc_P1e (1 << 0)
#define NAND_Ecc_P2e (1 << 1)
#define NAND_Ecc_P4e (1 << 2)
@@ -102,6 +97,7 @@
#define P4e_s(a) (TF(a & NAND_Ecc_P4e)
[PATCH 0/6] nand prefetch-irq support and ecc layout chanage
The main motivations behind this patch series are - 1. support NAND I/O in irq mode. 2. support of different ECC schema. 3. also to make ecc layout as like in romcode ecc layout The following set of patches applies on top of the master branch. And is dependent on the following patches not yet applied onto this branch. https://patchwork.kernel.org/patch/92220/ https://patchwork.kernel.org/patch/92232/ https://patchwork.kernel.org/patch/92221/ https://patchwork.kernel.org/patch/92230/ https://patchwork.kernel.org/patch/92224/ https://patchwork.kernel.org/patch/9/ https://patchwork.kernel.org/patch/92223/ https://patchwork.kernel.org/patch/92229/ Sukumar Ghorai (6): omap: NAND: Making ecc layout as compatible with romcode ecc omap: NAND: ecc layout select from board file omap-3630 NAND: enable NAND io in prefetch-irq mode OMAP NAND: configurable fifo threshold to gain the throughput omap3: NAND Prefetch in IRQ mode support omap3: GPMC register definition at common location arch/arm/configs/omap_3630sdp_defconfig |1 + arch/arm/configs/omap_zoom3_defconfig |1 + arch/arm/mach-omap2/board-sdp-flash.c |2 + arch/arm/mach-omap2/board-zoom-flash.c |2 + arch/arm/mach-omap2/gpmc.c | 47 +- arch/arm/plat-omap/include/plat/gpmc.h | 41 - arch/arm/plat-omap/include/plat/nand.h |5 + drivers/mtd/nand/Kconfig| 14 ++- drivers/mtd/nand/omap2.c| 275 +++ 9 files changed, 309 insertions(+), 79 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] OMAP: DSS2: GFX FIFO UNDERFLOW issue fixed
> -Original Message-
> From: Tomi Valkeinen [mailto:tomi.valkei...@nokia.com]
> Sent: Friday, April 16, 2010 3:08 PM
> To: Hiremath, Vaibhav
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH] OMAP: DSS2: GFX FIFO UNDERFLOW issue fixed
>
> On Mon, 2010-03-22 at 14:09 +0100, ext hvaib...@ti.com wrote:
> > From: Vaibhav Hiremath
> >
> > In case of 720P with 90/270 degree rotation, the system reports
> > GFX_FIFO_UNDERFLOW error which usually happens if DSS DMA is not able to
> fill
> > the FIFO as per requirement.
> >
> > In TRM (section 11.2.6.1.3), where is has been clearly mentioned that,
> >
> > "To improve the performance on 90 degree rotation, split the data access
> on
> > write side and not read side."
> >
> > That means, read should always happen on 0 degree and write should go to
> > respective rotation view.
> >
>
> With this patch my db test app (from
> git://gitorious.org/linux-omap-dss2/omapfb-tests.git) shows a lot of
> tearing when rotation != 0. I tested this on 3430SDP using the LCD.
>
[Hiremath, Vaibhav] I had tested it with the sample application which draws
color bars to the frame-buffer, let me once again check with your (omapfb-test)
application.
Tomi,
I am going out of station so will be able to do this on Tuesday.
Thanks,
Vaibhav
> Tomi
>
>
> > Signed-off-by: Vaibhav Hiremath
> > ---
> > drivers/video/omap2/omapfb/omapfb-main.c | 85 +++--
>
> > 1 files changed, 56 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/video/omap2/omapfb/omapfb-main.c
> b/drivers/video/omap2/omapfb/omapfb-main.c
> > index 4a76917..fea6b08 100644
> > --- a/drivers/video/omap2/omapfb/omapfb-main.c
> > +++ b/drivers/video/omap2/omapfb/omapfb-main.c
> > @@ -184,6 +184,11 @@ static unsigned omapfb_get_vrfb_offset(const struct
> omapfb_info *ofbi, int rot)
> > static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi,
> int rot)
> > {
> > if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> > + if (rot == FB_ROTATE_CW)
> > + rot = FB_ROTATE_CCW;
> > + else if (rot == FB_ROTATE_CCW)
> > + rot = FB_ROTATE_CW;
> > +
> > return ofbi->region.vrfb.paddr[rot]
> > + omapfb_get_vrfb_offset(ofbi, rot);
> > } else {
> > @@ -191,20 +196,32 @@ static u32 omapfb_get_region_rot_paddr(const struct
> omapfb_info *ofbi, int rot)
> > }
> > }
> >
> > -static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi)
> > +static u32 omapfb_get_region_paddr(struct omapfb_info *ofbi, int rot)
> > {
> > - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
> > - return ofbi->region.vrfb.paddr[0];
> > - else
> > + if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> > + if (rot == FB_ROTATE_CW)
> > + rot = FB_ROTATE_CCW;
> > + else if (rot == FB_ROTATE_CCW)
> > + rot = FB_ROTATE_CW;
> > +
> > + return ofbi->region.vrfb.paddr[rot];
> > + } else {
> > return ofbi->region.paddr;
> > + }
> > }
> >
> > -static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info
> *ofbi)
> > +static void __iomem *omapfb_get_region_vaddr(struct omapfb_info *ofbi,
> int rot)
> > {
> > - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
> > - return ofbi->region.vrfb.vaddr[0];
> > - else
> > + if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> > + if (rot == FB_ROTATE_CW)
> > + rot = FB_ROTATE_CCW;
> > + else if (rot == FB_ROTATE_CCW)
> > + rot = FB_ROTATE_CW;
> > +
> > + return ofbi->region.vrfb.vaddr[rot];
> > + } else {
> > return ofbi->region.vaddr;
> > + }
> > }
> >
> > static struct omapfb_colormode omapfb_colormodes[] = {
> > @@ -503,7 +520,7 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
> > unsigned bytespp;
> > bool yuv_mode;
> > enum omap_color_mode mode;
> > - int r;
> > + int r, rotation = var->rotate;
> > bool reconf;
> >
> > if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB)
> > @@ -511,6 +528,11 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
> >
> > DBG("setup_vrfb_rotation\n");
> >
> > + if (rotation == FB_ROTATE_CW)
> > + rotation = FB_ROTATE_CCW;
> > + else if (rotation == FB_ROTATE_CCW)
> > + rotation = FB_ROTATE_CW;
> > +
> > r = fb_mode_to_dss_mode(var, &mode);
> > if (r)
> > return r;
> > @@ -534,32 +556,35 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
> > vrfb->yres != var->yres_virtual)
> > reconf = true;
> >
> > - if (vrfb->vaddr[0] && reconf) {
> > + if (vrfb->vaddr[rotation] && reconf) {
> > fbi->screen_base = NULL;
> > fix->smem_start = 0;
> > fix->smem_len = 0;
> > - iounmap(vrfb->vaddr[0]);
> > - vrfb->vaddr[0] = NULL;
> > + iounmap(vrfb->vaddr[rotation]);
>
RE: [PATCH] OMAP: LCD LS037V7DW01: By default select backlight driver in Kconfig
> -Original Message- > From: Hiremath, Vaibhav > Sent: Friday, April 16, 2010 4:06 PM > To: tomi.valkei...@nokia.com > Cc: linux-omap@vger.kernel.org; Hiremath, Vaibhav > Subject: [PATCH] OMAP: LCD LS037V7DW01: By default select backlight driver > in Kconfig > > From: Vaibhav Hiremath > > > Signed-off-by: Vaibhav Hiremath > --- > drivers/video/omap2/displays/Kconfig |2 ++ > 1 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/drivers/video/omap2/displays/Kconfig > b/drivers/video/omap2/displays/Kconfig > index dfb57ee..44a6d63 100644 > --- a/drivers/video/omap2/displays/Kconfig > +++ b/drivers/video/omap2/displays/Kconfig > @@ -10,6 +10,8 @@ config PANEL_GENERIC > config PANEL_SHARP_LS037V7DW01 > tristate "Sharp LS037V7DW01 LCD Panel" > depends on OMAP2_DSS > + select BACKLIGHT_LCD_SUPPORT > + select BACKLIGHT_CLASS_DEVICE > help >LCD Panel used in TI's SDP3430 and EVM boards > [Hiremath, Vaibhav] Tomi, Here is the patch which fixes the issue, I have tested it on OMAP3EVM. Thanks, Vaibhav > -- > 1.6.2.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 03/13] DSPBRIDGE: Moving functions from mem.c to drv.c
On Thu, Apr 08, 2010 at 06:47:13PM -0500, Gomez Castellanos, Ivan wrote:
> +/*
> + * mem_flush_cache
> + * Purpose:
> + * Flush cache
> + */
> +void mem_flush_cache(void *pMemBuf, u32 byte_size, s32 FlushType)
> +{
> + if (!pMemBuf)
> + return;
> +
> + switch (FlushType) {
> + /* invalidate only */
> + case PROC_INVALIDATE_MEM:
> + dmac_inv_range(pMemBuf, pMemBuf + byte_size);
> + outer_inv_range(__pa((u32) pMemBuf), __pa((u32) pMemBuf +
> + byte_size));
> + break;
> + /* writeback only */
> + case PROC_WRITEBACK_MEM:
> + dmac_clean_range(pMemBuf, pMemBuf + byte_size);
> + outer_clean_range(__pa((u32) pMemBuf), __pa((u32) pMemBuf +
> + byte_size));
> + break;
> + /* writeback and invalidate */
> + case PROC_WRITEBACK_INVALIDATE_MEM:
> + dmac_flush_range(pMemBuf, pMemBuf + byte_size);
> + outer_flush_range(__pa((u32) pMemBuf), __pa((u32) pMemBuf +
> + byte_size));
> + break;
> + }
In the commit 702b94bff3c50542a6e4ab9a4f4cef093262fe65 (2.6.34) the functions
dmac_inv_range and dmac_clean_range were removed.
I'm wondering how to fix this in order to rebase to 2.6.34.
Thanks
vmjl
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[PATCH] OMAP: LCD LS037V7DW01: By default select backlight driver in Kconfig
From: Vaibhav Hiremath Signed-off-by: Vaibhav Hiremath --- drivers/video/omap2/displays/Kconfig |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig index dfb57ee..44a6d63 100644 --- a/drivers/video/omap2/displays/Kconfig +++ b/drivers/video/omap2/displays/Kconfig @@ -10,6 +10,8 @@ config PANEL_GENERIC config PANEL_SHARP_LS037V7DW01 tristate "Sharp LS037V7DW01 LCD Panel" depends on OMAP2_DSS + select BACKLIGHT_LCD_SUPPORT + select BACKLIGHT_CLASS_DEVICE help LCD Panel used in TI's SDP3430 and EVM boards -- 1.6.2.4 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 2/2] OMAP3: PM: Adding OMAP3630 support in smartreflex driver
This patch adapts smartreflex driver to support OMAP3630 also.
Changes involve:
1. Separate hwmod structures for OMAP3630 distinguished from
3430 structures using omap_chip attribute.
2. Introducing new test nvalues for OMAP3630.
3. OMAP3630 specific changes for srconfig err_minlimit field,
vpx_config errorgain field and vpx_vlimitto vddmax and vddmin
fields.
4. Adding 3630 voltage tables in voltage.c
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/board-3630sdp.c|2 +
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 86 +++-
arch/arm/mach-omap2/smartreflex.c |2 +-
arch/arm/mach-omap2/voltage.c | 45 +-
arch/arm/mach-omap2/voltage.h | 22 ++-
arch/arm/plat-omap/include/plat/control.h |8 +++
6 files changed, 154 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3630sdp.c
b/arch/arm/mach-omap2/board-3630sdp.c
index 2fc1d0b..b06f59a 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -27,6 +27,7 @@
#include "sdram-hynix-h8mbx00u0mer-0em.h"
#include "pm.h"
#include "omap3-opp.h"
+#include "smartreflex-class3.h"
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
@@ -107,6 +108,7 @@ static void __init omap_sdp_init(void)
board_smc91x_init();
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
+ sr_class3_init();
}
MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 1f41310..994d65f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -225,6 +225,25 @@ static struct omap_hwmod_class
omap34xx_smartreflex_hwmod_class = {
.rev = 1,
};
+static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = {
+ .sidle_shift= 24,
+ .enwkup_shift = 26
+};
+
+static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = {
+ .sysc_offs = 0x38,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
+ SYSC_NO_CACHE),
+ .sysc_fields= &omap36xx_sr_sysc_fields,
+};
+
+static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = {
+ .name = "smartreflex",
+ .sysc = &omap36xx_sr_sysc,
+ .rev = 2,
+};
+
/* SR1 */
static struct omap_hwmod_ocp_if *omap34xx_sr1_slaves[] = {
&omap3_l4_core__sr1,
@@ -257,10 +276,41 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
.slaves = omap34xx_sr1_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_sr1_slaves),
.dev_attr = &omap34xx_sr1_dev_attr,
- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
+ CHIP_IS_OMAP3430ES3_0 |
+ CHIP_IS_OMAP3430ES3_1),
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
+static u32 omap36xx_sr1_efuse_offs[] = {
+ OMAP3630_CONTROL_FUSE_OPP50_VDD1, OMAP3630_CONTROL_FUSE_OPP100_VDD1,
+ OMAP3630_CONTROL_FUSE_OPP120_VDD1, OMAP3630_CONTROL_FUSE_OPPTM_VDD1,
+};
+
+static u32 omap36xx_sr1_test_nvalues[] = {
+ 0x898beb, 0x999b83, 0xaac5a8, 0xaab197,
+};
+
+static struct omap_smartreflex_dev_data omap36xx_sr1_dev_attr = {
+ .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
+ .sennenable_shift = OMAP343X_SR1_SENNENABLE_SHIFT,
+ .senpenable_shift = OMAP343X_SR1_SENPENABLE_SHIFT,
+ .efuse_nvalues_offs = omap36xx_sr1_efuse_offs,
+ .test_sennenable= 0x1,
+ .test_senpenable= 0x1,
+ .test_nvalues = omap36xx_sr1_test_nvalues,
+};
+
+static struct omap_hwmod omap36xx_sr1_hwmod = {
+ .name = "sr1_hwmod",
+ .class = &omap36xx_smartreflex_hwmod_class,
+ .main_clk = "sr1_fck",
+ .slaves = omap34xx_sr1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap34xx_sr1_slaves),
+ .dev_attr = &omap36xx_sr1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
+};
+
/* SR2 */
static struct omap_hwmod_ocp_if *omap34xx_sr2_slaves[] = {
&omap3_l4_core__sr2,
@@ -292,10 +342,40 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
.slaves = omap34xx_sr2_slaves,
.slaves_cnt = ARRAY_SIZE(omap34xx_sr2_slaves),
.dev_attr = &omap34xx_sr2_dev_attr,
- .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
+ CHIP_IS_OMAP3430ES3_0 |
+ CHIP_IS_OMAP3430ES3_1),
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
+static u32 omap36xx_sr2_efuse_offs[] = {
+ OMAP3630_CONTROL_FUSE_
[PATCHv3 1/2] OMAP3: PM: Smartreflex IP update changes for OMAP3630
OMAP3430 uses the 65nm version of the smartreflex IP where as
OMAP3630 and OMAP4430 uses the 45nm updated IP.
This patch adds support for the updated smartreflex IP used
in OMAP3630 and OMAP4 in the smartreflex driver.
Major changes between the two versions of IP involve:
1. Change in offset position for ERRCONFIG and SENERROR registers
2. Change in bit positions for VP bound interrupt enable and status
in ERRCONFIG register.
3. Change in bit positions and width of SENNENABLE and SENPENABLE
bits in SRCONFIG registers.
4. Introduction of separate irq registers for MCU bound interrupts.
5. Removal of clockactivity bits in ERRCONFIG and introduction of
idlemode and wakeupenable bits in ERRCONFIG.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 215 +++--
arch/arm/mach-omap2/smartreflex.h | 44 +++--
2 files changed, 194 insertions(+), 65 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 4dccfd1..b81f9f3 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -43,6 +43,7 @@ struct omap_sr {
int srid;
int is_sr_enable;
int is_autocomp_active;
+ int sr_ip_type;
u32 clk_length;
u32 err_weight;
u32 err_minlimit;
@@ -71,6 +72,7 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned
offset, u32 mask,
{
struct omap_device *odev = to_omap_device(sr->pdev);
u32 reg_val;
+ u32 errconfig_offs, errconfig_mask;
reg_val = omap_hwmod_readl(odev->hwmods[0], offset);
reg_val &= ~mask;
@@ -82,8 +84,15 @@ static inline void sr_modify_reg(struct omap_sr *sr,
unsigned offset, u32 mask,
* value. Now if there is an actual reguest to write to these bits
* they will be set in the nex step.
*/
- if (offset == ERRCONFIG)
- reg_val &= ~ERRCONFIG_STATUS_MASK;
+ if (sr->sr_ip_type == SR_TYPE_V1) {
+ errconfig_offs = ERRCONFIG_V1;
+ errconfig_mask = ERRCONFIG_STATUS_V1_MASK;
+ } else if (sr->sr_ip_type == SR_TYPE_V2) {
+ errconfig_offs = ERRCONFIG_V2;
+ errconfig_mask = ERRCONFIG_VPBOUNDINTST_V2;
+ }
+ if (offset == errconfig_offs)
+ reg_val &= ~errconfig_mask;
reg_val |= value;
@@ -114,13 +123,19 @@ static struct omap_sr *_sr_lookup(int srid)
static irqreturn_t sr_omap_isr(int irq, void *data)
{
struct omap_sr *sr_info = (struct omap_sr *)data;
- u32 status;
-
- /* Read the status bits */
- status = sr_read_reg(sr_info, ERRCONFIG);
-
- /* Clear them by writing back */
- sr_write_reg(sr_info, ERRCONFIG, status);
+ u32 status = 0;
+
+ if (sr_info->sr_ip_type == SR_TYPE_V1) {
+ /* Read the status bits */
+ status = sr_read_reg(sr_info, ERRCONFIG_V1);
+ /* Clear them by writing back */
+ sr_write_reg(sr_info, ERRCONFIG_V1, status);
+ } else if (sr_info->sr_ip_type == SR_TYPE_V2) {
+ /* Read the status bits */
+ sr_read_reg(sr_info, IRQSTATUS);
+ /* Clear them by writing back */
+ sr_write_reg(sr_info, IRQSTATUS, status);
+ }
/* Call the class driver notify function if registered*/
if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
@@ -243,6 +258,77 @@ static int sr_late_init(struct omap_sr *sr_info)
return ret;
}
+static void sr_v1_disable(struct omap_sr *sr)
+{
+ int timeout = 0;
+
+ /* Enable MCUDisableAcknowledge interrupt */
+ sr_modify_reg(sr, ERRCONFIG_V1,
+ ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
+
+ /* SRCONFIG - disable SR */
+ sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
+
+ /* Disable all other SR interrupts and clear the status */
+ sr_modify_reg(sr, ERRCONFIG_V1,
+ (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
+ ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
+ (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
+ ERRCONFIG_MCUBOUNDINTST |
+ ERRCONFIG_VPBOUNDINTST_V1));
+
+ /*
+* Wait for SR to be disabled.
+* wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
+*/
+ omap_test_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
+ ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
+ timeout);
+
+ if (timeout >= SR_DISABLE_TIMEOUT)
+ pr_warning("SR%d disable timedout\n", sr->srid);
+
+ /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
+ s
[PATCHv3 0/2] OMAP3: PM: OMAP3630 support for smartreflex driver
This patch series adds support for the updated 45nm smrtrelfex IP supported in OMAP3630 and OMAP4 in the smartreflex driver and adds support to enable smartreflex autocompensation for OMAP3630 using test nvalues. This patch series is based on the V3 version of Smartreflex and voltage revamp patch series. This patch series has been tested on OMAP3630 SDP board with CONFIG_OMAP_SMARTREFLEX_TESTING option enabled in the menuconfig. This patch series has been based on Kevin's PM tree origin/pm-wip-opp branch. Thara Gopinath (2): OMAP3: PM: Smartreflex IP update changes for OMAP3630 OMAP3: PM: Adding OMAP3630 support in smartreflex driver arch/arm/mach-omap2/board-3630sdp.c|2 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 86 +++- arch/arm/mach-omap2/smartreflex.c | 217 arch/arm/mach-omap2/smartreflex.h | 44 +- arch/arm/mach-omap2/voltage.c | 45 ++- arch/arm/mach-omap2/voltage.h | 22 +++- arch/arm/plat-omap/include/plat/control.h |8 + 7 files changed, 348 insertions(+), 76 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH-V2 1/2] OMAP: LCD LS037V7DW01: Add Backlight driver support
> -Original Message-
> From: Tomi Valkeinen [mailto:tomi.valkei...@nokia.com]
> Sent: Friday, April 16, 2010 3:12 PM
> To: Hiremath, Vaibhav
> Cc: linux-omap@vger.kernel.org; t...@atomide.com
> Subject: Re: [PATCH-V2 1/2] OMAP: LCD LS037V7DW01: Add Backlight driver
> support
>
> Oops, my emailer decided to send the email a bit too soon =).
>
> On Fri, 2010-04-16 at 11:39 +0200, Tomi Valkeinen wrote:
> > On Mon, 2010-04-12 at 13:50 +0200, ext hvaib...@ti.com wrote:
> > > From: Vaibhav Hiremath
> > >
> > > Tested on OMAP3EVM for OMAP3530 and AM/DM 3730.
> > >
> > > Signed-off-by: Vaibhav Hiremath
> >
> > This patch causes omap_3430sdp_defconfig not to compile:
> >
>
> drivers/built-in.o: In function `sharp_ls_panel_remove':
> /home/valkeine/work/linux/drivers/video/omap2/displays/panel-sharp-
> ls037v7dw01.c:129: undefined reference to `backlight_device_unregister'
> drivers/built-in.o: In function `sharp_ls_panel_probe':
> /home/valkeine/work/linux/drivers/video/omap2/displays/panel-sharp-
> ls037v7dw01.c:103: undefined reference to `backlight_device_register'
>
> This is caused by the defconfig not having backlight enabled. I'm not
> sure if the ls037v7dw01 driver should depend on the backlight config
> option, or if there should first be a defconfig change, enabling the
> backlight support.
[Hiremath, Vaibhav] Yeah man, I missed this patch completely.
We should be selecting BACKLIGHT when sharp LCD panel is selected. Submitting
patch now.
Thanks,
Vaibhav Hiremath
>
> Tomi
>
> >
> > > ---
> > > .../video/omap2/displays/panel-sharp-ls037v7dw01.c | 77
>
> > > 1 files changed, 77 insertions(+), 0 deletions(-)
> > >
> > > diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > > index 8d51a5e..d84feb0 100644
> > > --- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > > +++ b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > > @@ -20,10 +20,16 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > > +#include
> > > #include
> > >
> > > #include
> > >
> > > +struct sharp_data {
> > > + struct backlight_device *bl;
> > > +};
> > > +
> > > static struct omap_video_timings sharp_ls_timings = {
> > > .x_res = 480,
> > > .y_res = 640,
> > > @@ -39,18 +45,89 @@ static struct omap_video_timings sharp_ls_timings =
> {
> > > .vbp= 1,
> > > };
> > >
> > > +static int sharp_ls_bl_update_status(struct backlight_device *bl)
> > > +{
> > > + struct omap_dss_device *dssdev = dev_get_drvdata(&bl->dev);
> > > + int level;
> > > +
> > > + if (!dssdev->set_backlight)
> > > + return -EINVAL;
> > > +
> > > + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> > > + bl->props.power == FB_BLANK_UNBLANK)
> > > + level = bl->props.brightness;
> > > + else
> > > + level = 0;
> > > +
> > > + return dssdev->set_backlight(dssdev, level);
> > > +}
> > > +
> > > +static int sharp_ls_bl_get_brightness(struct backlight_device *bl)
> > > +{
> > > + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> > > + bl->props.power == FB_BLANK_UNBLANK)
> > > + return bl->props.brightness;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static const struct backlight_ops sharp_ls_bl_ops = {
> > > + .get_brightness = sharp_ls_bl_get_brightness,
> > > + .update_status = sharp_ls_bl_update_status,
> > > +};
> > > +
> > > +
> > > +
> > > static int sharp_ls_panel_probe(struct omap_dss_device *dssdev)
> > > {
> > > + struct backlight_properties props;
> > > + struct backlight_device *bl;
> > > + struct sharp_data *sd;
> > > + int r;
> > > +
> > > dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> > > OMAP_DSS_LCD_IHS;
> > > dssdev->panel.acb = 0x28;
> > > dssdev->panel.timings = sharp_ls_timings;
> > >
> > > + sd = kzalloc(sizeof(*sd), GFP_KERNEL);
> > > + if (!sd)
> > > + return -ENOMEM;
> > > +
> > > + dev_set_drvdata(&dssdev->dev, sd);
> > > +
> > > + memset(&props, 0, sizeof(struct backlight_properties));
> > > + props.max_brightness = dssdev->max_backlight_level;
> > > +
> > > + bl = backlight_device_register("sharp-ls", &dssdev->dev, dssdev,
> > > + &sharp_ls_bl_ops, &props);
> > > + if (IS_ERR(bl)) {
> > > + r = PTR_ERR(bl);
> > > + kfree(sd);
> > > + return r;
> > > + }
> > > + sd->bl = bl;
> > > +
> > > + bl->props.fb_blank = FB_BLANK_UNBLANK;
> > > + bl->props.power = FB_BLANK_UNBLANK;
> > > + bl->props.brightness = dssdev->max_backlight_level;
> > > + r = sharp_ls_bl_update_status(bl);
> > > + if (r < 0)
> > > + dev_err(&dssdev->dev, "failed to set lcd brightness\n");
> > > +
> > > return 0;
> > > }
> > >
> > > static void sharp_ls_panel_remove(struct omap_dss_device *dssdev)
> > > {
> > > + struct sharp_data *sd = dev_get_drvdata(&dssdev->dev);
> > > + struct backlight_device *bl = sd->bl;
> > > +
> > > + bl->props.power
Re: [PATCH] i2c: omap: fix OOPS in omap_i2c_unidle() during probe
On Wed, Mar 31, 2010 at 3:27 PM, Jarkko Nikula wrote: > On Wed, 31 Mar 2010 04:27:41 -0600 (MDT) > Paul Walmsley wrote: > >> > This patch moves register shift setting before any register accesses are >> > done. >> > >> > Signed-off-by: Mika Westerberg >> > Cc: Cory Maccarrone >> >> Tested-by: Paul Walmsley >> > BTW, Tony had the same fix buried in an another thread: > > http://marc.info/?l=linux-omap&m=126826012627677&w=2 > > You could add my tested by as well to which one goes in but the fix > should go for 2.6.34 as the mainline doesn't boot otherwise on OMAP. Uhm why does this patch (or Tony's version) doesn't reach mainline for so long? It's critical for all OMAPs except the very old ones. If it helps: Tested-by: Grazvydas Ignotas > > Tested-by: Jarkko Nikula > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to majord...@vger.kernel.org > More majordomo info at  http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH-V2 1/2] OMAP: LCD LS037V7DW01: Add Backlight driver support
Oops, my emailer decided to send the email a bit too soon =).
On Fri, 2010-04-16 at 11:39 +0200, Tomi Valkeinen wrote:
> On Mon, 2010-04-12 at 13:50 +0200, ext hvaib...@ti.com wrote:
> > From: Vaibhav Hiremath
> >
> > Tested on OMAP3EVM for OMAP3530 and AM/DM 3730.
> >
> > Signed-off-by: Vaibhav Hiremath
>
> This patch causes omap_3430sdp_defconfig not to compile:
>
drivers/built-in.o: In function `sharp_ls_panel_remove':
/home/valkeine/work/linux/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c:129:
undefined reference to `backlight_device_unregister'
drivers/built-in.o: In function `sharp_ls_panel_probe':
/home/valkeine/work/linux/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c:103:
undefined reference to `backlight_device_register'
This is caused by the defconfig not having backlight enabled. I'm not
sure if the ls037v7dw01 driver should depend on the backlight config
option, or if there should first be a defconfig change, enabling the
backlight support.
Tomi
>
> > ---
> > .../video/omap2/displays/panel-sharp-ls037v7dw01.c | 77
> >
> > 1 files changed, 77 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > index 8d51a5e..d84feb0 100644
> > --- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > +++ b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> > @@ -20,10 +20,16 @@
> > #include
> > #include
> > #include
> > +#include
> > +#include
> > #include
> >
> > #include
> >
> > +struct sharp_data {
> > + struct backlight_device *bl;
> > +};
> > +
> > static struct omap_video_timings sharp_ls_timings = {
> > .x_res = 480,
> > .y_res = 640,
> > @@ -39,18 +45,89 @@ static struct omap_video_timings sharp_ls_timings = {
> > .vbp= 1,
> > };
> >
> > +static int sharp_ls_bl_update_status(struct backlight_device *bl)
> > +{
> > + struct omap_dss_device *dssdev = dev_get_drvdata(&bl->dev);
> > + int level;
> > +
> > + if (!dssdev->set_backlight)
> > + return -EINVAL;
> > +
> > + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> > + bl->props.power == FB_BLANK_UNBLANK)
> > + level = bl->props.brightness;
> > + else
> > + level = 0;
> > +
> > + return dssdev->set_backlight(dssdev, level);
> > +}
> > +
> > +static int sharp_ls_bl_get_brightness(struct backlight_device *bl)
> > +{
> > + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> > + bl->props.power == FB_BLANK_UNBLANK)
> > + return bl->props.brightness;
> > +
> > + return 0;
> > +}
> > +
> > +static const struct backlight_ops sharp_ls_bl_ops = {
> > + .get_brightness = sharp_ls_bl_get_brightness,
> > + .update_status = sharp_ls_bl_update_status,
> > +};
> > +
> > +
> > +
> > static int sharp_ls_panel_probe(struct omap_dss_device *dssdev)
> > {
> > + struct backlight_properties props;
> > + struct backlight_device *bl;
> > + struct sharp_data *sd;
> > + int r;
> > +
> > dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> > OMAP_DSS_LCD_IHS;
> > dssdev->panel.acb = 0x28;
> > dssdev->panel.timings = sharp_ls_timings;
> >
> > + sd = kzalloc(sizeof(*sd), GFP_KERNEL);
> > + if (!sd)
> > + return -ENOMEM;
> > +
> > + dev_set_drvdata(&dssdev->dev, sd);
> > +
> > + memset(&props, 0, sizeof(struct backlight_properties));
> > + props.max_brightness = dssdev->max_backlight_level;
> > +
> > + bl = backlight_device_register("sharp-ls", &dssdev->dev, dssdev,
> > + &sharp_ls_bl_ops, &props);
> > + if (IS_ERR(bl)) {
> > + r = PTR_ERR(bl);
> > + kfree(sd);
> > + return r;
> > + }
> > + sd->bl = bl;
> > +
> > + bl->props.fb_blank = FB_BLANK_UNBLANK;
> > + bl->props.power = FB_BLANK_UNBLANK;
> > + bl->props.brightness = dssdev->max_backlight_level;
> > + r = sharp_ls_bl_update_status(bl);
> > + if (r < 0)
> > + dev_err(&dssdev->dev, "failed to set lcd brightness\n");
> > +
> > return 0;
> > }
> >
> > static void sharp_ls_panel_remove(struct omap_dss_device *dssdev)
> > {
> > + struct sharp_data *sd = dev_get_drvdata(&dssdev->dev);
> > + struct backlight_device *bl = sd->bl;
> > +
> > + bl->props.power = FB_BLANK_POWERDOWN;
> > + sharp_ls_bl_update_status(bl);
> > + backlight_device_unregister(bl);
> > +
> > + kfree(sd);
> > }
> >
> > static int sharp_ls_power_on(struct omap_dss_device *dssdev)
> > --
> > 1.6.2.4
> >
>
--
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Re: [PATCH-V2 1/2] OMAP: LCD LS037V7DW01: Add Backlight driver support
On Mon, 2010-04-12 at 13:50 +0200, ext hvaib...@ti.com wrote:
> From: Vaibhav Hiremath
>
> Tested on OMAP3EVM for OMAP3530 and AM/DM 3730.
>
> Signed-off-by: Vaibhav Hiremath
This patch causes omap_3430sdp_defconfig not to compile:
> ---
> .../video/omap2/displays/panel-sharp-ls037v7dw01.c | 77
>
> 1 files changed, 77 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> index 8d51a5e..d84feb0 100644
> --- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> +++ b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
> @@ -20,10 +20,16 @@
> #include
> #include
> #include
> +#include
> +#include
> #include
>
> #include
>
> +struct sharp_data {
> + struct backlight_device *bl;
> +};
> +
> static struct omap_video_timings sharp_ls_timings = {
> .x_res = 480,
> .y_res = 640,
> @@ -39,18 +45,89 @@ static struct omap_video_timings sharp_ls_timings = {
> .vbp= 1,
> };
>
> +static int sharp_ls_bl_update_status(struct backlight_device *bl)
> +{
> + struct omap_dss_device *dssdev = dev_get_drvdata(&bl->dev);
> + int level;
> +
> + if (!dssdev->set_backlight)
> + return -EINVAL;
> +
> + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> + bl->props.power == FB_BLANK_UNBLANK)
> + level = bl->props.brightness;
> + else
> + level = 0;
> +
> + return dssdev->set_backlight(dssdev, level);
> +}
> +
> +static int sharp_ls_bl_get_brightness(struct backlight_device *bl)
> +{
> + if (bl->props.fb_blank == FB_BLANK_UNBLANK &&
> + bl->props.power == FB_BLANK_UNBLANK)
> + return bl->props.brightness;
> +
> + return 0;
> +}
> +
> +static const struct backlight_ops sharp_ls_bl_ops = {
> + .get_brightness = sharp_ls_bl_get_brightness,
> + .update_status = sharp_ls_bl_update_status,
> +};
> +
> +
> +
> static int sharp_ls_panel_probe(struct omap_dss_device *dssdev)
> {
> + struct backlight_properties props;
> + struct backlight_device *bl;
> + struct sharp_data *sd;
> + int r;
> +
> dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
> OMAP_DSS_LCD_IHS;
> dssdev->panel.acb = 0x28;
> dssdev->panel.timings = sharp_ls_timings;
>
> + sd = kzalloc(sizeof(*sd), GFP_KERNEL);
> + if (!sd)
> + return -ENOMEM;
> +
> + dev_set_drvdata(&dssdev->dev, sd);
> +
> + memset(&props, 0, sizeof(struct backlight_properties));
> + props.max_brightness = dssdev->max_backlight_level;
> +
> + bl = backlight_device_register("sharp-ls", &dssdev->dev, dssdev,
> + &sharp_ls_bl_ops, &props);
> + if (IS_ERR(bl)) {
> + r = PTR_ERR(bl);
> + kfree(sd);
> + return r;
> + }
> + sd->bl = bl;
> +
> + bl->props.fb_blank = FB_BLANK_UNBLANK;
> + bl->props.power = FB_BLANK_UNBLANK;
> + bl->props.brightness = dssdev->max_backlight_level;
> + r = sharp_ls_bl_update_status(bl);
> + if (r < 0)
> + dev_err(&dssdev->dev, "failed to set lcd brightness\n");
> +
> return 0;
> }
>
> static void sharp_ls_panel_remove(struct omap_dss_device *dssdev)
> {
> + struct sharp_data *sd = dev_get_drvdata(&dssdev->dev);
> + struct backlight_device *bl = sd->bl;
> +
> + bl->props.power = FB_BLANK_POWERDOWN;
> + sharp_ls_bl_update_status(bl);
> + backlight_device_unregister(bl);
> +
> + kfree(sd);
> }
>
> static int sharp_ls_power_on(struct omap_dss_device *dssdev)
> --
> 1.6.2.4
>
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Re: [PATCH] OMAP: DSS2: GFX FIFO UNDERFLOW issue fixed
On Mon, 2010-03-22 at 14:09 +0100, ext hvaib...@ti.com wrote:
> From: Vaibhav Hiremath
>
> In case of 720P with 90/270 degree rotation, the system reports
> GFX_FIFO_UNDERFLOW error which usually happens if DSS DMA is not able to fill
> the FIFO as per requirement.
>
> In TRM (section 11.2.6.1.3), where is has been clearly mentioned that,
>
> "To improve the performance on 90 degree rotation, split the data access on
> write side and not read side."
>
> That means, read should always happen on 0 degree and write should go to
> respective rotation view.
>
With this patch my db test app (from
git://gitorious.org/linux-omap-dss2/omapfb-tests.git) shows a lot of
tearing when rotation != 0. I tested this on 3430SDP using the LCD.
Tomi
> Signed-off-by: Vaibhav Hiremath
> ---
> drivers/video/omap2/omapfb/omapfb-main.c | 85 +++--
> 1 files changed, 56 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/video/omap2/omapfb/omapfb-main.c
> b/drivers/video/omap2/omapfb/omapfb-main.c
> index 4a76917..fea6b08 100644
> --- a/drivers/video/omap2/omapfb/omapfb-main.c
> +++ b/drivers/video/omap2/omapfb/omapfb-main.c
> @@ -184,6 +184,11 @@ static unsigned omapfb_get_vrfb_offset(const struct
> omapfb_info *ofbi, int rot)
> static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int
> rot)
> {
> if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> + if (rot == FB_ROTATE_CW)
> + rot = FB_ROTATE_CCW;
> + else if (rot == FB_ROTATE_CCW)
> + rot = FB_ROTATE_CW;
> +
> return ofbi->region.vrfb.paddr[rot]
> + omapfb_get_vrfb_offset(ofbi, rot);
> } else {
> @@ -191,20 +196,32 @@ static u32 omapfb_get_region_rot_paddr(const struct
> omapfb_info *ofbi, int rot)
> }
> }
>
> -static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi)
> +static u32 omapfb_get_region_paddr(struct omapfb_info *ofbi, int rot)
> {
> - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
> - return ofbi->region.vrfb.paddr[0];
> - else
> + if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> + if (rot == FB_ROTATE_CW)
> + rot = FB_ROTATE_CCW;
> + else if (rot == FB_ROTATE_CCW)
> + rot = FB_ROTATE_CW;
> +
> + return ofbi->region.vrfb.paddr[rot];
> + } else {
> return ofbi->region.paddr;
> + }
> }
>
> -static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info *ofbi)
> +static void __iomem *omapfb_get_region_vaddr(struct omapfb_info *ofbi, int
> rot)
> {
> - if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB)
> - return ofbi->region.vrfb.vaddr[0];
> - else
> + if (ofbi->rotation_type == OMAP_DSS_ROT_VRFB) {
> + if (rot == FB_ROTATE_CW)
> + rot = FB_ROTATE_CCW;
> + else if (rot == FB_ROTATE_CCW)
> + rot = FB_ROTATE_CW;
> +
> + return ofbi->region.vrfb.vaddr[rot];
> + } else {
> return ofbi->region.vaddr;
> + }
> }
>
> static struct omapfb_colormode omapfb_colormodes[] = {
> @@ -503,7 +520,7 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
> unsigned bytespp;
> bool yuv_mode;
> enum omap_color_mode mode;
> - int r;
> + int r, rotation = var->rotate;
> bool reconf;
>
> if (!rg->size || ofbi->rotation_type != OMAP_DSS_ROT_VRFB)
> @@ -511,6 +528,11 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
>
> DBG("setup_vrfb_rotation\n");
>
> + if (rotation == FB_ROTATE_CW)
> + rotation = FB_ROTATE_CCW;
> + else if (rotation == FB_ROTATE_CCW)
> + rotation = FB_ROTATE_CW;
> +
> r = fb_mode_to_dss_mode(var, &mode);
> if (r)
> return r;
> @@ -534,32 +556,35 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
> vrfb->yres != var->yres_virtual)
> reconf = true;
>
> - if (vrfb->vaddr[0] && reconf) {
> + if (vrfb->vaddr[rotation] && reconf) {
> fbi->screen_base = NULL;
> fix->smem_start = 0;
> fix->smem_len = 0;
> - iounmap(vrfb->vaddr[0]);
> - vrfb->vaddr[0] = NULL;
> + iounmap(vrfb->vaddr[rotation]);
> + vrfb->vaddr[rotation] = NULL;
> DBG("setup_vrfb_rotation: reset fb\n");
> }
>
> - if (vrfb->vaddr[0])
> + if (vrfb->vaddr[rotation])
> return 0;
>
> - omap_vrfb_setup(&rg->vrfb, rg->paddr,
> - var->xres_virtual,
> - var->yres_virtual,
> - bytespp, yuv_mode);
> + if (rotation == FB_ROTATE_CW || rotation == FB_ROTATE_CCW)
> + omap_vrfb_setup(&rg->vrfb, rg->paddr,
> + var->yres_virtual, var->xres_virtual,
> + bytespp, yuv
Re: [PATCH v6] board-omap3-beagle: add DSS2 support
Op 16 apr 2010, om 13:05 heeft Thomas Weber het volgende geschreven:
> Hello Koen,
> On 04/16/10 08:38, Koen Kooi wrote:
>> No more comments on this one? Can it go into Tony's tree now?
>>
>> Op 15 apr 2010, om 10:52 heeft Koen Kooi het volgende geschreven:
>>
>>> This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out
>>> are supported.
>>>
>>> Signed-off-by: Koen Kooi
>>> ---
>>>
>>> Changes since v1:
>>> * removed beagle_panel_enable_tv() and beagle_panel_disable_tv()
>>> Changes since v2:
>>> * changed to REGULATOR_SUPPLY(_name, _dev_name) for dss regulators
>>> Changes since v3:
>>> * really remove beagle_panel_enable_tv() and beagle_panel_disable_tv()
>>> * moved comments to this section
>>> Changes since v4:
>>> * remove trailing whitespace
>>> Changes since v5:
>>> * fix semicolon typo
>>>
>>> arch/arm/mach-omap2/board-omap3beagle.c | 102
>>> ++
>>> 1 files changed, 75 insertions(+), 27 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
>>> b/arch/arm/mach-omap2/board-omap3beagle.c
>>> index 962d377..43d3e7d 100644
>>> --- a/arch/arm/mach-omap2/board-omap3beagle.c
>>> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
>>> @@ -39,6 +39,7 @@
>>>
>>> #include
>>> #include
>>> +#include
>>> #include
>>> #include
>>> #include
>>> @@ -106,6 +107,77 @@ static struct platform_device omap3beagle_nand_device
>>> = {
>>> .resource = &omap3beagle_nand_resource,
>>> };
>>>
>>> +/* DSS */
>>> +
>>> +static int beagle_enable_dvi(struct omap_dss_device *dssdev)
>>> +{
>>> + if (dssdev->reset_gpio != -1)
>>> + gpio_set_value(dssdev->reset_gpio, 1);
> There was already a comment about using gpio_is_valid(dssdev->reset_gpio)
Would this be acceptable:
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -111,7 +111,7 @@ static struct platform_device omap3beagle_nand_device = {
static int beagle_enable_dvi(struct omap_dss_device *dssdev)
{
- if (dssdev->reset_gpio != -1)
+ if (gpio_is_valid(dssdev->reset_gpio))
gpio_set_value(dssdev->reset_gpio, 1);
return 0;
@@ -119,7 +119,7 @@ static int beagle_enable_dvi(struct omap_dss_device *dssdev)
static void beagle_disable_dvi(struct omap_dss_device *dssdev)
{
- if (dssdev->reset_gpio != -1)
+ if (gpio_is_valid(dssdev->reset_gpio))
gpio_set_value(dssdev->reset_gpio, 0);
}
Or do I need to emit ENXIO on failure like mach-davinci/board-dm355-leopard.c
is doing?
regards,
Koen--
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Re: [PATCH v6] board-omap3-beagle: add DSS2 support
Hello Koen,
On 04/16/10 08:38, Koen Kooi wrote:
> No more comments on this one? Can it go into Tony's tree now?
>
> Op 15 apr 2010, om 10:52 heeft Koen Kooi het volgende geschreven:
>
>> This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out
>> are supported.
>>
>> Signed-off-by: Koen Kooi
>> ---
>>
>> Changes since v1:
>>* removed beagle_panel_enable_tv() and beagle_panel_disable_tv()
>> Changes since v2:
>>* changed to REGULATOR_SUPPLY(_name, _dev_name) for dss regulators
>> Changes since v3:
>>* really remove beagle_panel_enable_tv() and beagle_panel_disable_tv()
>>* moved comments to this section
>> Changes since v4:
>>* remove trailing whitespace
>> Changes since v5:
>>* fix semicolon typo
>>
>> arch/arm/mach-omap2/board-omap3beagle.c | 102 ++
>> 1 files changed, 75 insertions(+), 27 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
>> b/arch/arm/mach-omap2/board-omap3beagle.c
>> index 962d377..43d3e7d 100644
>> --- a/arch/arm/mach-omap2/board-omap3beagle.c
>> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
>> @@ -39,6 +39,7 @@
>>
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -106,6 +107,77 @@ static struct platform_device omap3beagle_nand_device =
>> {
>> .resource = &omap3beagle_nand_resource,
>> };
>>
>> +/* DSS */
>> +
>> +static int beagle_enable_dvi(struct omap_dss_device *dssdev)
>> +{
>> +if (dssdev->reset_gpio != -1)
>> +gpio_set_value(dssdev->reset_gpio, 1);
There was already a comment about using gpio_is_valid(dssdev->reset_gpio)
>> +
>> +return 0;
>> +}
>> +
>> +static void beagle_disable_dvi(struct omap_dss_device *dssdev)
>> +{
>> +if (dssdev->reset_gpio != -1)
>> +gpio_set_value(dssdev->reset_gpio, 0);
Here too.
Thomas
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[PATCHv3 06/22] OMAP3: PM: Correcting API names in samrtreflex driver.
This patch corrects typo in some of the API names in smartreflex driver. It
also renames enable_smartreflex, disable_smartreflex APIs to
omap_smartreflex_enable and omap_smartreflex_disable to be
more consistent with rest of the API's in the driver code.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/pm34xx.c |8
arch/arm/mach-omap2/smartreflex.c | 26 +-
arch/arm/mach-omap2/smartreflex.h | 12 ++--
3 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b51b461..9777ab2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -430,9 +430,9 @@ void omap_sram_idle(void)
* Only needed if we are going to enter retention or off.
*/
if (mpu_next_state <= PWRDM_POWER_RET)
- disable_smartreflex(SR1);
+ omap_smartreflex_disable(SR1);
if (core_next_state <= PWRDM_POWER_RET)
- disable_smartreflex(SR2);
+ omap_smartreflex_disable(SR2);
/* CORE */
if (core_next_state < PWRDM_POWER_ON) {
@@ -531,9 +531,9 @@ void omap_sram_idle(void)
* retention or off
*/
if (mpu_next_state <= PWRDM_POWER_RET)
- enable_smartreflex(SR1);
+ omap_smartreflex_enable(SR1);
if (core_next_state <= PWRDM_POWER_RET)
- enable_smartreflex(SR2);
+ omap_smartreflex_enable(SR2);
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 669f1bb..359f7ec 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -540,7 +540,7 @@ static void sr_disable(struct omap_sr *sr)
}
-void sr_start_vddautocomap(int srid, unsigned long volt)
+void sr_start_vddautocomp(int srid, unsigned long volt)
{
struct omap_sr *sr = _sr_lookup(srid);
@@ -562,9 +562,9 @@ void sr_start_vddautocomap(int srid, unsigned long volt)
sr_clk_disable(sr);
}
}
-EXPORT_SYMBOL(sr_start_vddautocomap);
+EXPORT_SYMBOL(sr_start_vddautocomp);
-int sr_stop_vddautocomap(int srid)
+int sr_stop_vddautocomp(int srid)
{
struct omap_sr *sr = _sr_lookup(srid);
@@ -585,9 +585,9 @@ int sr_stop_vddautocomap(int srid)
return false;
}
-EXPORT_SYMBOL(sr_stop_vddautocomap);
+EXPORT_SYMBOL(sr_stop_vddautocomp);
-void enable_smartreflex(int srid)
+void omap_smartreflex_enable(int srid)
{
unsigned long curr_volt = 0;
struct omap_sr *sr = _sr_lookup(srid);
@@ -621,7 +621,7 @@ void enable_smartreflex(int srid)
}
}
-void disable_smartreflex(int srid)
+void omap_smartreflex_disable(int srid)
{
u32 i = 0;
struct omap_sr *sr = _sr_lookup(srid);
@@ -696,7 +696,7 @@ int sr_voltagescale_vcbypass(u32 target_opp, u32
current_opp,
current_opp_no = get_opp_no(current_opp);
if (vdd == VDD1_OPP) {
- sr_status = sr_stop_vddautocomap(SR1);
+ sr_status = sr_stop_vddautocomp(SR1);
t2_smps_steps = abs(target_vsel - current_vsel);
prm_rmw_mod_reg_bits(OMAP3430_VC_CMD_ON_MASK,
@@ -706,7 +706,7 @@ int sr_voltagescale_vcbypass(u32 target_opp, u32
current_opp,
reg_addr = R_VDD1_SR_CONTROL;
} else if (vdd == VDD2_OPP) {
- sr_status = sr_stop_vddautocomap(SR2);
+ sr_status = sr_stop_vddautocomp(SR2);
t2_smps_steps = abs(target_vsel - current_vsel);
prm_rmw_mod_reg_bits(OMAP3430_VC_CMD_ON_MASK,
@@ -754,9 +754,9 @@ int sr_voltagescale_vcbypass(u32 target_opp, u32
current_opp,
volt = (target_vsel * 12500) + 60;
if (vdd == VDD1_OPP)
- sr_start_vddautocomap(SR1, volt);
+ sr_start_vddautocomp(SR1, volt);
else if (vdd == VDD2_OPP)
- sr_start_vddautocomap(SR2, volt);
+ sr_start_vddautocomp(SR2, volt);
}
return 0;
@@ -787,7 +787,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
return 0;
}
if (val == 0) {
- sr_stop_vddautocomap(sr_info->srid);
+ sr_stop_vddautocomp(sr_info->srid);
} else {
unsigned long curr_volt;
@@ -795,7 +795,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
curr_volt = get_curr_vdd1_voltage();
else
curr_volt = get_curr_vdd2_voltage();
- sr_start_vddautocomap(sr_info->srid, curr_volt);
+ sr_start_vddautocomp(sr_info->srid, curr_volt);
}
return 0;
}
@@ -840,7 +840,7 @@ static int __devexit omap_smartreflex_remove(struct
platform_device *pdev)
/* Disable Autocompensation if en
[PATCHv3 03/22] OMAP3: PM: Convert smartreflex driver into a platform driver using hwmods and omap-device layer
This patch converts the exisitng smartreflex library into a
platform driver with device , driver registrations using hardware mods.
As part of this Ntarget values are passed as platform data.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/smartreflex.c | 325 +
arch/arm/mach-omap2/smartreflex.h | 26 +++
arch/arm/mach-omap2/sr_device.c | 139
4 files changed, 278 insertions(+), 214 deletions(-)
create mode 100644 arch/arm/mach-omap2/sr_device.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ab47043..62accd2 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -48,7 +48,7 @@ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
-obj-$(CONFIG_OMAP_SMARTREFLEX) += smartreflex.o
+obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index dc8d6e1..b4e98e5 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -3,6 +3,9 @@
*
* OMAP34XX SmartReflex Voltage Control
*
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath
+ *
* Copyright (C) 2008 Nokia Corporation
* Kalle Jokiniemi
*
@@ -14,7 +17,6 @@
* published by the Free Software Foundation.
*/
-
#include
#include
#include
@@ -29,10 +31,11 @@
#include
#include
-#include
#include
#include
#include
+#include
+#include
#include "prm.h"
#include "smartreflex.h"
@@ -41,45 +44,44 @@
#define MAX_TRIES 100
struct omap_sr {
- int srid;
- int is_sr_reset;
- int is_autocomp_active;
- struct clk *clk;
- struct clk *vdd_opp_clk;
- u32 clk_length;
- u32 req_opp_no;
- u32 opp1_nvalue, opp2_nvalue, opp3_nvalue, opp4_nvalue;
- u32 opp5_nvalue;
- u32 senp_mod, senn_mod;
- void __iomem*srbase_addr;
+ int srid;
+ int is_sr_reset;
+ int is_autocomp_active;
+ struct clk *vdd_opp_clk;
+ u32 clk_length;
+ unsigned intirq;
+ struct platform_device *pdev;
struct list_headnode;
};
/* sr_list contains all the instances of smartreflex module */
static LIST_HEAD(sr_list);
-#define SR_REGADDR(offs) (sr->srbase_addr + offset)
-
static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
{
- __raw_writel(value, SR_REGADDR(offset));
+ struct omap_device *odev = to_omap_device(sr->pdev);
+
+ omap_hwmod_writel(value, odev->hwmods[0], offset);
}
static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
u32 value)
{
+ struct omap_device *odev = to_omap_device(sr->pdev);
u32 reg_val;
- reg_val = __raw_readl(SR_REGADDR(offset));
+ reg_val = omap_hwmod_readl(odev->hwmods[0], offset);
reg_val &= ~mask;
reg_val |= value;
- __raw_writel(reg_val, SR_REGADDR(offset));
+ omap_hwmod_writel(reg_val, odev->hwmods[0], offset);
}
static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
{
- return __raw_readl(SR_REGADDR(offset));
+ struct omap_device *odev = to_omap_device(sr->pdev);
+
+ return omap_hwmod_readl(odev->hwmods[0], offset);
}
static struct omap_sr *_sr_lookup(int srid)
@@ -98,71 +100,22 @@ static struct omap_sr *_sr_lookup(int srid)
static int sr_clk_enable(struct omap_sr *sr)
{
- if (clk_enable(sr->clk) != 0) {
- pr_err("Could not enable %s\n", sr->clk->name);
- return -1;
- }
+ struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
- /* set fclk- active , iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FON);
+ if (pdata->device_enable)
+ pdata->device_enable(sr->pdev);
return 0;
}
static void sr_clk_disable(struct omap_sr *sr)
{
- /* set fclk, iclk- idle */
- sr_modify_reg(sr, ERRCONFIG, SR_CLKACTIVITY_MASK,
- SR_CLKACTIVITY_IOFF_FOFF);
-
- clk_disable(sr->clk);
- sr->is_sr_reset = 1;
-}
-
-static struct omap_sr sr1 = {
- .srid = SR1,
- .is_sr_reset= 1,
- .is_autocomp_active = 0,
- .clk_length = 0,
- .srbase_
[PATCHv3 04/22] OMAP3: PM: Move smartreflex autocompensation enable disable hooks to PM debugfs.
This patch moves the hooks to enable disable smartreflex
autocompensation to pm debugfs from the /sys/power/.
To enable autocompensation for smartreflex SR do
echo 1 > /pm_debug/sr_autocomp
To disable autocompensation for smartreflex SR do
echo 0 > /pm_debug/sr_autocomp
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/pm-debug.c|4 +-
arch/arm/mach-omap2/smartreflex.c | 114 ++--
arch/arm/mach-omap2/smartreflex.h |2 +
3 files changed, 36 insertions(+), 84 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 8aafd71..ce46059 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -162,7 +162,7 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
static void pm_dbg_regset_store(u32 *ptr);
-struct dentry *pm_dbg_dir;
+struct dentry *pm_dbg_dir, *pm_dbg_main_dir;
static int pm_dbg_init_done;
@@ -613,7 +613,7 @@ static int __init pm_dbg_init(void)
S_IRUGO | S_IWUGO, d,
&voltage_off_while_idle,
&pm_dbg_option_fops);
-
+ pm_dbg_main_dir = d;
pm_dbg_init_done = 1;
return 0;
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index b4e98e5..2f89d79 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -24,11 +24,11 @@
#include
#include
#include
-#include
#include
#include
#include
#include
+#include
#include
#include
@@ -42,6 +42,7 @@
#include "prm-regbits-34xx.h"
#define MAX_TRIES 100
+#define SMARTREFLEX_NAME_LEN 16
struct omap_sr {
int srid;
@@ -796,103 +797,53 @@ int sr_voltagescale_vcbypass(u32 target_opp, u32
current_opp,
return 0;
}
-/* Sysfs interface to select SR VDD1 auto compensation */
-static ssize_t omap_sr_vdd1_autocomp_show(struct kobject *kobj,
- struct kobj_attribute *attr, char *buf)
+/* PM Debug Fs enteries to enable disable smartreflex.*/
+
+static int omap_sr_autocomp_show(void *data, u64 *val)
{
- struct omap_sr *sr_info = _sr_lookup(SR1);
+ struct omap_sr *sr_info = (struct omap_sr *) data;
if (!sr_info) {
- pr_warning("omap_sr struct corresponding to SR1 not found\n");
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ sr_info->srid);
return 0;
}
- return sprintf(buf, "%d\n", sr_info->is_autocomp_active);
+ *val = sr_info->is_autocomp_active;
+ return 0;
}
-static ssize_t omap_sr_vdd1_autocomp_store(struct kobject *kobj,
- struct kobj_attribute *attr,
- const char *buf, size_t n)
+static int omap_sr_autocomp_store(void *data, u64 val)
{
- unsigned short value;
-
- if (sscanf(buf, "%hu", &value) != 1 || (value > 1)) {
- pr_err("sr_vdd1_autocomp: Invalid value\n");
- return -EINVAL;
- }
-
- if (value == 0) {
- sr_stop_vddautocomap(SR1);
- } else {
- u32 current_vdd1opp_no = get_vdd1_opp();
- if (!current_vdd1opp_no) {
- pr_err("sr_vdd1_autocomp: Current VDD1 opp unknown\n");
- return -EINVAL;
- }
- sr_start_vddautocomap(SR1, current_vdd1opp_no);
- }
- return n;
-}
-
-static struct kobj_attribute sr_vdd1_autocomp = {
- .attr = {
- .name = __stringify(sr_vdd1_autocomp),
- .mode = 0644,
- },
- .show = omap_sr_vdd1_autocomp_show,
- .store = omap_sr_vdd1_autocomp_store,
-};
-
-/* Sysfs interface to select SR VDD2 auto compensation */
-static ssize_t omap_sr_vdd2_autocomp_show(struct kobject *kobj,
- struct kobj_attribute *attr, char *buf)
-{
- struct omap_sr *sr_info = _sr_lookup(SR2);
+ struct omap_sr *sr_info = (struct omap_sr *) data;
if (!sr_info) {
- pr_warning("omap_sr struct corresponding to SR2 not found\n");
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ sr_info->srid);
return 0;
}
- return sprintf(buf, "%d\n", sr_info->is_autocomp_active);
-}
-
-static ssize_t omap_sr_vdd2_autocomp_store(struct kobject *kobj,
- struct kobj_attribute *attr,
- const char *buf, size_t n)
-{
- unsigned short value;
-
- if (sscanf(buf, "%hu", &value) != 1 || (value > 1)) {
- pr_err("sr_vdd2_autocomp: Invalid value\n");
- return -EINVAL;
- }
-
- if (value == 0)
[PATCHv3 19/22] OMAP3: PM: Disabling Smartreflex across both frequency and voltage scaling during DVFS.
This patch disables smartreflex across both frequency and voltage
scaling instead of just across voltage scaling as before.
This is the hardware recommended practice.
This bug was first reported and solved on Nokia N900
code base by Nishanth Menon and Paul Walmsley.
This patch also does some changes in SRF to adapt to the new smartreflex
and voltage driver.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/resource34xx.c | 27 ++-
arch/arm/mach-omap2/resource34xx.h |1 -
2 files changed, 10 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index c6cce8b..853c563 100644
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -28,6 +28,7 @@
#include
#include "smartreflex.h"
+#include "voltage.h"
#include "resource34xx.h"
#include "pm.h"
#include "cm.h"
@@ -331,12 +332,6 @@ static int program_opp(int res, enum opp_t opp_type, int
target_level,
{
int i, ret = 0, raise;
unsigned long freq;
-#ifdef CONFIG_OMAP_SMARTREFLEX
- unsigned long t_opp, c_opp;
-
- t_opp = ID_VDD(res) | ID_OPP_NO(target_level);
- c_opp = ID_VDD(res) | ID_OPP_NO(current_level);
-#endif
/* See if have a freq associated, if not, invalid opp */
ret = opp_to_freq(&freq, opp_type, target_level);
@@ -348,15 +343,15 @@ static int program_opp(int res, enum opp_t opp_type, int
target_level,
else
raise = 0;
+ omap_smartreflex_disable(res - 1, 0);
+
for (i = 0; i < 2; i++) {
- if (i == raise)
+ if (i == raise) {
ret = program_opp_freq(res, target_level,
current_level);
-#ifdef CONFIG_OMAP_SMARTREFLEX
- else {
- u8 vc, vt;
+ } else {
struct omap_opp *oppx;
- unsigned long uvdc;
+ unsigned long uvdc_current, uvdc_target;
/*
* transitioning from good to good OPP
@@ -364,21 +359,19 @@ static int program_opp(int res, enum opp_t opp_type, int
target_level,
*/
oppx = opp_find_freq_exact(opp_type, freq, true);
BUG_ON(IS_ERR(oppx));
- uvdc = opp_get_voltage(oppx);
- vt = omap_twl_uv_to_vsel(uvdc);
+ uvdc_target = opp_get_voltage(oppx);
BUG_ON(opp_to_freq(&freq, opp_type, current_level));
oppx = opp_find_freq_exact(opp_type, freq, true);
BUG_ON(IS_ERR(oppx));
- uvdc = opp_get_voltage(oppx);
- vc = omap_twl_uv_to_vsel(uvdc);
+ uvdc_current = opp_get_voltage(oppx);
/* ok to scale.. */
- sr_voltagescale_vcbypass(t_opp, c_opp, vt, vc);
+ omap_voltage_scale(res - 1, uvdc_target, uvdc_current);
}
-#endif
}
+ omap_smartreflex_enable(res - 1);
return ret;
}
diff --git a/arch/arm/mach-omap2/resource34xx.h
b/arch/arm/mach-omap2/resource34xx.h
index 0b4e76e..b56d2df 100644
--- a/arch/arm/mach-omap2/resource34xx.h
+++ b/arch/arm/mach-omap2/resource34xx.h
@@ -30,7 +30,6 @@
#include
#include
-extern int sr_voltagescale_vcbypass(u32 t_opp, u32 c_opp, u8 t_vsel, u8
c_vsel);
extern void lock_scratchpad_sem(void);
extern void unlock_scratchpad_sem(void);
--
1.7.0.rc1.33.g07cf0f
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[PATCHv3 14/22] OMAP3: PM: Configurations for Smartreflex Class 2 and Smartreflex Class 3
There are two separate modules in SmartReflex-AVS :
MinMaxAvg module and Error module. Class3 uses the Error module only.
In Class2 you can choose between either module since it is software based.
The registers are mapped to the modules as followed:
MinMaxAvg module: AccumData, MinMaxAvgEnable, MinMaxAvgValid,
MinMaxAvgAccumValid, SenVal, SenMin, SenMax, SenAverage,
AverageWeight, MCUAccum, MCUValid, MCUBounds.
Error module: SenNGain, SenPGain, SenPRN, SenNRN, AvgError,
SenError, VPBounds, ErrWeight, ErrMaxLimit, ErrMinLimit.
Shared between both: SRClkLength, SREnable, SenEnable, SenNEnable,
SenPEnable, DelayCtrl, MCUDisableAck, ClkActivity.
This patch generates separate API's to configure the two modules
which can be used by the smartreflex class driver as per its
requirement. This patch allows allows for registering for smartreflex
interrupt handler and notification of interrupts in case requested by
the smartreflex class driver.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex-class3.c |7 +
arch/arm/mach-omap2/smartreflex.c| 253 +++---
arch/arm/mach-omap2/smartreflex.h| 14 ++
3 files changed, 219 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
b/arch/arm/mach-omap2/smartreflex-class3.c
index 66696be..53bfd05 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -39,10 +39,17 @@ static int sr_class3_disable(int id)
return true;
}
+static void sr_class3_configure(int id)
+{
+ sr_configure_errgen(id);
+}
+
/* SR class3 structure */
struct omap_smartreflex_class_data class3_data = {
.enable = sr_class3_enable,
.disable = sr_class3_disable,
+ .configure = sr_class3_configure,
+ .class_type = SR_CLASS3,
};
int __init sr_class3_init(void)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index c6942e9..d043951 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -41,6 +41,12 @@ struct omap_sr {
int is_sr_reset;
int is_autocomp_active;
u32 clk_length;
+ u32 err_weight;
+ u32 err_minlimit;
+ u32 err_maxlimit;
+ u32 accum_data;
+ u32 senn_avgweight;
+ u32 senp_avgweight;
unsigned intirq;
struct platform_device *pdev;
struct list_headnode;
@@ -111,6 +117,24 @@ static void sr_clk_disable(struct omap_sr *sr)
sr->is_sr_reset = 1;
}
+static irqreturn_t sr_omap_isr(int irq, void *data)
+{
+ struct omap_sr *sr_info = (struct omap_sr *)data;
+ u32 status;
+
+ /* Read the status bits */
+ status = sr_read_reg(sr_info, ERRCONFIG);
+
+ /* Clear them by writing back */
+ sr_write_reg(sr_info, ERRCONFIG, status);
+
+ /* Call the class driver notify function if registered*/
+ if (sr_class->class_type == SR_CLASS2 && sr_class->notify)
+ sr_class->notify(sr_info->srid, status);
+
+ return IRQ_HANDLED;
+}
+
static void sr_set_clk_length(struct omap_sr *sr)
{
struct clk *sys_ck;
@@ -142,64 +166,41 @@ static void sr_set_clk_length(struct omap_sr *sr)
}
}
-static void sr_configure(struct omap_sr *sr)
+static void sr_set_regfields(struct omap_sr *sr)
{
- u32 sr_config;
- u32 senp_en , senn_en;
- struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
-
- if (sr->clk_length == 0)
- sr_set_clk_length(sr);
-
- senp_en = pdata->senp_mod;
- senn_en = pdata->senn_mod;
- if (sr->srid == VDD1) {
- sr_config = SR1_SRCONFIG_ACCUMDATA |
- (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
- SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN |
- SRCONFIG_MINMAXAVG_EN |
- (senn_en << SRCONFIG_SENNENABLE_SHIFT) |
- (senp_en << SRCONFIG_SENPENABLE_SHIFT) |
- SRCONFIG_DELAYCTRL;
-
- sr_write_reg(sr, SRCONFIG, sr_config);
- sr_write_reg(sr, AVGWEIGHT, SR1_AVGWEIGHT_SENPAVGWEIGHT |
- SR1_AVGWEIGHT_SENNAVGWEIGHT);
-
- sr_modify_reg(sr, ERRCONFIG, (SR_ERRWEIGHT_MASK |
- SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
- (SR1_ERRWEIGHT | SR1_ERRMAXLIMIT | SR1_ERRMINLIMIT));
-
- } else if (sr->srid == VDD2) {
- sr_config = SR2_SRCONFIG_ACCUMDATA |
- (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
- SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN |
- SRCONFIG_MINMAXAVG_EN |
-
[PATCHv3 13/22] OMAP3: PM: Cleaning up of smartreflex header file.
This patch cleans up smartreflex.h removing all unnecessary and duplicate definitions. Signed-off-by: Thara Gopinath --- arch/arm/mach-omap2/smartreflex.h | 96 + 1 files changed, 55 insertions(+), 41 deletions(-) diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h index 50d534a..85cfbe3 100644 --- a/arch/arm/mach-omap2/smartreflex.h +++ b/arch/arm/mach-omap2/smartreflex.h @@ -18,54 +18,38 @@ extern struct dentry *pm_dbg_main_dir; -#define PHY_TO_OFF_PM_RECIEVER(p) (p - 0x5b) - /* SMART REFLEX REG ADDRESS OFFSET */ -#define SRCONFIG 0x00 -#define SRSTATUS 0x04 -#define SENVAL 0x08 -#define SENMIN 0x0C -#define SENMAX 0x10 -#define SENAVG 0x14 -#define AVGWEIGHT 0x18 +#define SRCONFIG 0x00 +#define SRSTATUS 0x04 +#define SENVAL 0x08 +#define SENMIN 0x0C +#define SENMAX 0x10 +#define SENAVG 0x14 +#define AVGWEIGHT 0x18 #define NVALUERECIPROCAL 0x1C -#define SENERROR 0x20 -#define ERRCONFIG 0x24 +#define SENERROR 0x20 +#define ERRCONFIG 0x24 -#define GAIN_MAXLIMIT 16 -#define R_MAXLIMIT 256 - -#define SR1_CLK_ENABLE BIT(6) -#define SR2_CLK_ENABLE BIT(7) +/* Bit/Shift Positions */ /* SRCONFIG */ -#define SR1_SRCONFIG_ACCUMDATA (0x1F4 << 22) -#define SR2_SRCONFIG_ACCUMDATA (0x1F4 << 22) - -#define SRCLKLENGTH_12MHZ_SYSCLK 0x3C -#define SRCLKLENGTH_13MHZ_SYSCLK 0x41 -#define SRCLKLENGTH_19MHZ_SYSCLK 0x60 -#define SRCLKLENGTH_26MHZ_SYSCLK 0x82 -#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0 - +#define SRCONFIG_ACCUMDATA_SHIFT 22 #define SRCONFIG_SRCLKLENGTH_SHIFT 12 #define SRCONFIG_SENNENABLE_SHIFT 5 #define SRCONFIG_SENPENABLE_SHIFT 3 +#define SRCONFIG_CLKCTRL_SHIFT 0 + +#define SRCONFIG_ACCUMDATA_MASK(0x3FF << 22) #define SRCONFIG_SRENABLE BIT(11) #define SRCONFIG_SENENABLE BIT(10) #define SRCONFIG_ERRGEN_EN BIT(9) #define SRCONFIG_MINMAXAVG_EN BIT(8) - #define SRCONFIG_DELAYCTRL BIT(2) -#define SRCONFIG_CLKCTRL (0x00 << 0) /* AVGWEIGHT */ -#define SR1_AVGWEIGHT_SENPAVGWEIGHT(0x03 << 2) -#define SR1_AVGWEIGHT_SENNAVGWEIGHT(0x03 << 0) - -#define SR2_AVGWEIGHT_SENPAVGWEIGHTBIT(2) -#define SR2_AVGWEIGHT_SENNAVGWEIGHTBIT(0) +#define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2 +#define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0 /* NVALUERECIPROCAL */ #define NVALUERECIPROCAL_SENPGAIN_SHIFT20 @@ -74,25 +58,55 @@ extern struct dentry *pm_dbg_main_dir; #define NVALUERECIPROCAL_RNSENN_SHIFT 0 /* ERRCONFIG */ -#define SR_CLKACTIVITY_MASK(0x03 << 20) +#define ERRCONFIG_ERRWEIGHT_SHIFT 16 +#define ERRCONFIG_ERRMAXLIMIT_SHIFT8 +#define ERRCONFIG_ERRMINLIMIT_SHIFT0 + #define SR_ERRWEIGHT_MASK (0x07 << 16) #define SR_ERRMAXLIMIT_MASK(0xFF << 8) #define SR_ERRMINLIMIT_MASK(0xFF << 0) #define ERRCONFIG_VPBOUNDINTEN BIT(31) #define ERRCONFIG_VPBOUNDINTST BIT(30) +#defineERRCONFIG_MCUACCUMINTEN BIT(29) +#define ERRCONFIG_MCUACCUMINTSTBIT(28) +#defineERRCONFIG_MCUVALIDINTEN BIT(27) +#define ERRCONFIG_MCUVALIDINTSTBIT(26) +#define ERRCONFIG_MCUBOUNDINTENBIT(25) +#defineERRCONFIG_MCUBOUNDINTST BIT(24) +#defineERRCONFIG_MCUDISACKINTENBIT(23) +#define ERRCONFIG_MCUDISACKINTST BIT(22) -#define SR1_ERRWEIGHT (0x07 << 16) -#define SR1_ERRMAXLIMIT(0x02 << 8) -#define SR1_ERRMINLIMIT(0xFA << 0) +/* Common Bit values */ -#define SR2_ERRWEIGHT (0x07 << 16) -#define SR2_ERRMAXLIMIT(0x02 << 8) -#define SR2_ERRMINLIMIT(0xF9 << 0) +#define SRCLKLENGTH_12MHZ_SYSCLK 0x3C +#define SRCLKLENGTH_13MHZ_SYSCLK 0x41 +#define SRCLKLENGTH_19MHZ_SYSCLK 0x60 +#define SRCLKLENGTH_26MHZ_SYSCLK 0x82 +#define SRCLKLENGTH_38MHZ_SYSCLK 0xC0 -/* Vmode control */ -#define R_DCDC_GLOBAL_CFG PHY_TO_OFF_PM_RECIEVER(0x61) +/* + * 3430 specific values. Maybe these should be passed from board file or + * pmic structures. + */ +#define OMAP3430_SR_ACCUMDATA 0x1F4 + +#define OMAP3430_SR1_SENPAVGWEIGHT 0x03 +#define OMAP3430_SR1_SENNAVGWEIGHT 0x03 + +#define OMAP3430_SR2_SENPAVGWEIGHT 0x01 +#define OMAP3430_SR2_SENNAVGWEIGHT 0x01 + +#define OMAP3430_SR_ERRWEIGHT 0x07 +#define OMAP3430_SR_ERRMAXLIMIT0x02 +#define OMAP3430_SR1_ERRMINLIMIT 0xFA +#define OMAP3430_SR2_ERRMINLIMIT 0xF9 +/* TODO:3630/OMAP4 values if it has to come from this file */ + +/* Info for enabling SR in T2/gaia. T
[PATCHv3 10/22] OMAP3: PM: Adding voltage table support in voltage driver.
This patch introduces the framework to create voltage table per
VDD basis in voltage driver. Each VDD will have one voltage table,
which in turn will contain one entry per voltage supported and
other data associated with the voltage like smartreflex N-target
values. This patch also generates voltage tables for VDD1 and VDD2 of
OMAP3430 and passes them as dev_attr to sr_device.c in order
to populate the smartreflex n-target values.
These voltage tables are extended in a later patch to contain more
voltage specific information like errminlimt and errorgain values.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |7 +-
arch/arm/mach-omap2/smartreflex.c | 27 +
arch/arm/mach-omap2/smartreflex.h | 13 +
arch/arm/mach-omap2/sr_device.c| 42 ++--
arch/arm/mach-omap2/voltage.c | 93 +++-
arch/arm/mach-omap2/voltage.h | 15 +
6 files changed, 118 insertions(+), 79 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 049e4e2..1f41310 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -23,6 +23,7 @@
#include "prm-regbits-34xx.h"
#include "smartreflex.h"
+#include "voltage.h"
/*
* OMAP3xxx hardware module integration data
@@ -240,14 +241,13 @@ static u32 omap34xx_sr1_test_nvalues[] = {
};
static struct omap_smartreflex_dev_data omap34xx_sr1_dev_attr = {
- .volts_supported= 5,
.efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
.sennenable_shift = OMAP343X_SR1_SENNENABLE_SHIFT,
.senpenable_shift = OMAP343X_SR1_SENPENABLE_SHIFT,
.efuse_nvalues_offs = omap34xx_sr1_efuse_offs,
.test_sennenable= 0x3,
.test_senpenable= 0x3,
- .test_nvalues = omap34xx_sr1_test_nvalues
+ .test_nvalues = omap34xx_sr1_test_nvalues,
};
static struct omap_hwmod omap34xx_sr1_hwmod = {
@@ -276,14 +276,13 @@ static u32 omap34xx_sr2_test_nvalues[] = {
};
static struct omap_smartreflex_dev_data omap34xx_sr2_dev_attr = {
- .volts_supported= 3,
.efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
.sennenable_shift = OMAP343X_SR2_SENNENABLE_SHIFT,
.senpenable_shift = OMAP343X_SR2_SENPENABLE_SHIFT,
.efuse_nvalues_offs = omap34xx_sr2_efuse_offs,
.test_sennenable= 0x3,
.test_senpenable= 0x3,
- .test_nvalues = omap34xx_sr2_test_nvalues
+ .test_nvalues = omap34xx_sr2_test_nvalues,
};
static struct omap_hwmod omap34xx_sr2_hwmod = {
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index a89f74f..d3222a5 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -31,6 +31,7 @@
#include
#include
+#include "voltage.h"
#include "smartreflex.h"
#define SMARTREFLEX_NAME_LEN 16
@@ -110,30 +111,6 @@ static void sr_clk_disable(struct omap_sr *sr)
sr->is_sr_reset = 1;
}
-static int sr_match_volt(struct omap_sr *sr, unsigned long volt,
- struct omap_volt_data *volt_data)
-{
- struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
- struct omap_device *odev = to_omap_device(sr->pdev);
- struct omap_smartreflex_dev_data *sr_dev_data =
- odev->hwmods[0]->dev_attr;
- int i;
-
- if (!pdata->sr_volt_data) {
- pr_notice("voltage table does not exist for SR %d\n", sr->srid);
- return false;
- }
- for (i = 0; i < sr_dev_data->volts_supported; i++) {
- if (pdata->sr_volt_data[i].voltage == volt) {
- *volt_data = pdata->sr_volt_data[i];
- return true;
- }
- }
- pr_notice("Unable to match the current voltage with \
- the voltage table for SR %d\n", sr->srid);
- return false;
-}
-
static void sr_set_clk_length(struct omap_sr *sr)
{
struct clk *sys_ck;
@@ -288,7 +265,7 @@ int sr_enable(int srid, unsigned long volt)
return false;
}
- if (!sr_match_volt(sr, volt, &volt_data))
+ if (omap_match_volt(sr->srid, volt, &volt_data))
return false;
nvalue_reciprocal = volt_data.sr_nvalue;
diff --git a/arch/arm/mach-omap2/smartreflex.h
b/arch/arm/mach-omap2/smartreflex.h
index 073f6d0..0f60a97 100644
--- a/arch/arm/mach-omap2/smartreflex.h
+++ b/arch/arm/mach-omap2/smartreflex.h
@@ -107,17 +107,6 @@ extern struct dentry *pm_dbg_main_dir;
#endif
/**
- * omap_volt_data - Omap voltage specific data.
- *
- * @voltage: The possible voltage value
- * @sr_nvalue : Smartreflex N target value at voltage
- */
-struct omap_volt_da
[PATCHv3 11/22] OMAP3: PM: Removing VP1, VP2, SR1 and SR2 defintions.
This patch removes VP1, VP2, SR1 and SR2 macros and replaces them with
VDD1 and VDD2 macros.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/pm34xx.c |8 +++---
arch/arm/mach-omap2/smartreflex-class3.c |4 +-
arch/arm/mach-omap2/smartreflex.c| 26 +++---
arch/arm/mach-omap2/smartreflex.h|4 ---
arch/arm/mach-omap2/voltage.c| 35 +++--
arch/arm/mach-omap2/voltage.h|6 ++--
6 files changed, 40 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 2f5c894..f3994c0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -415,9 +415,9 @@ void omap_sram_idle(void)
* Only needed if we are going to enter retention or off.
*/
if (mpu_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_disable(SR1);
+ omap_smartreflex_disable(VDD1);
if (core_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_disable(SR2);
+ omap_smartreflex_disable(VDD2);
/* CORE */
if (core_next_state < PWRDM_POWER_ON) {
@@ -516,9 +516,9 @@ void omap_sram_idle(void)
* retention or off
*/
if (mpu_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_enable(SR1);
+ omap_smartreflex_enable(VDD1);
if (core_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_enable(SR2);
+ omap_smartreflex_enable(VDD2);
/* PER */
if (per_next_state < PWRDM_POWER_ON) {
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
b/arch/arm/mach-omap2/smartreflex-class3.c
index 1b098ff..66696be 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -17,9 +17,9 @@ static int sr_class3_enable(int id)
{
unsigned long volt = 0;
- if (id == SR1)
+ if (id == VDD1)
volt = get_curr_vdd1_voltage();
- else if (id == SR2)
+ else if (id == VDD2)
volt = get_curr_vdd2_voltage();
if (!volt) {
pr_warning("Current voltage unknown.Cannot enable SR%d\n", id);
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index d3222a5..fffd5f7 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -153,7 +153,7 @@ static void sr_configure(struct omap_sr *sr)
senp_en = pdata->senp_mod;
senn_en = pdata->senn_mod;
- if (sr->srid == SR1) {
+ if (sr->srid == VDD1) {
sr_config = SR1_SRCONFIG_ACCUMDATA |
(sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN |
@@ -170,7 +170,7 @@ static void sr_configure(struct omap_sr *sr)
SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
(SR1_ERRWEIGHT | SR1_ERRMAXLIMIT | SR1_ERRMINLIMIT));
- } else if (sr->srid == SR2) {
+ } else if (sr->srid == VDD2) {
sr_config = SR2_SRCONFIG_ACCUMDATA |
(sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN |
@@ -196,7 +196,7 @@ static void sr_start_vddautocomp(int srid)
if (!sr) {
pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid);
+ srid + 1);
return;
}
@@ -224,7 +224,7 @@ static void sr_stop_vddautocomp(int srid)
if (!sr) {
pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid);
+ srid + 1);
return;
}
@@ -261,7 +261,7 @@ int sr_enable(int srid, unsigned long volt)
if (!sr) {
pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid);
+ srid + 1);
return false;
}
@@ -272,7 +272,7 @@ int sr_enable(int srid, unsigned long volt)
if (nvalue_reciprocal == 0) {
pr_notice("NVALUE = 0 at voltage %ld for Smartreflex %d\n",
- volt, sr->srid);
+ volt, sr->srid + 1);
return false;
}
@@ -301,7 +301,7 @@ void sr_disable(int srid)
if (!sr) {
pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid);
+ srid
[PATCHv3 22/22] OMAP3: PM: Fix crash when enabling SmartReflex on non-supported OMAPs.
This patch renames is_sr_reset to is_sr_enable and sets and unsets
this flag in appropriate places so that trying to enable smart reflex in a
non-supported OMAP chip does not lead to unnecessary crash.
Basically today if sr_enable fails, sr_disable will crash due to accessing
sr registers when sr clocks are not turned on.
By checking on is_sr_reset flag and setting and
unsetting this flag appropriately this crash is fixed in this
patch.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 93 +++--
1 files changed, 47 insertions(+), 46 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 6b7d9aa..4dccfd1 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -41,7 +41,7 @@
struct omap_sr {
int srid;
- int is_sr_reset;
+ int is_sr_enable;
int is_autocomp_active;
u32 clk_length;
u32 err_weight;
@@ -111,26 +111,6 @@ static struct omap_sr *_sr_lookup(int srid)
return sr_info;
}
-static int sr_clk_enable(struct omap_sr *sr)
-{
- struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
-
- if (pdata->device_enable)
- pdata->device_enable(sr->pdev);
-
- return 0;
-}
-
-static void sr_clk_disable(struct omap_sr *sr)
-{
- struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
-
- if (pdata->device_idle)
- pdata->device_idle(sr->pdev);
-
- sr->is_sr_reset = 1;
-}
-
static irqreturn_t sr_omap_isr(int irq, void *data)
{
struct omap_sr *sr_info = (struct omap_sr *)data;
@@ -211,11 +191,8 @@ static void sr_start_vddautocomp(struct omap_sr *sr)
}
sr->is_autocomp_active = 1;
- if (!sr_class->enable(sr->srid)) {
+ if (!sr_class->enable(sr->srid))
sr->is_autocomp_active = 0;
- if (sr->is_sr_reset == 1)
- sr_clk_disable(sr);
- }
}
static void sr_stop_vddautocomp(struct omap_sr *sr)
@@ -227,7 +204,6 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
if (sr->is_autocomp_active == 1) {
sr_class->disable(sr->srid, 1);
- sr_clk_disable(sr);
sr->is_autocomp_active = 0;
}
}
@@ -314,7 +290,6 @@ void sr_configure_errgen(int srid)
sr_modify_reg(sr, ERRCONFIG,
(ERRCONFIG_VPBOUNDINTEN),
(ERRCONFIG_VPBOUNDINTEN | ERRCONFIG_VPBOUNDINTST));
- sr->is_sr_reset = 0;
}
/**
@@ -366,7 +341,6 @@ void sr_configure_minmax(int srid)
(ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
- sr->is_sr_reset = 0;
}
/**
@@ -406,8 +380,25 @@ int sr_enable(int srid, unsigned long volt)
/* errminlimit is opp dependent and hence linked to voltage */
sr->err_minlimit = volt_data.sr_errminlimit;
- /* Enable the clocks and configure SR */
- sr_clk_enable(sr);
+ /* Enable the clocks */
+ if (!sr->is_sr_enable) {
+ struct omap_smartreflex_data *pdata =
+ sr->pdev->dev.platform_data;
+ if (pdata->device_enable) {
+ pdata->device_enable(sr->pdev);
+ } else {
+ pr_warning("Not able to turn on SR%d clocks during \
+ enable. So returning", sr->srid + 1);
+ return false;
+ }
+ sr->is_sr_enable = 1;
+ }
+
+ /* Check if SR is already enabled. If yes do nothing */
+ if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
+ return true;
+
+ /* Configure SR */
sr_class->configure(sr->srid);
sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
@@ -426,6 +417,7 @@ int sr_enable(int srid, unsigned long volt)
void sr_disable(int srid)
{
struct omap_sr *sr = _sr_lookup(srid);
+ struct omap_smartreflex_data *pdata;
int timeout = 0;
if (!sr) {
@@ -434,10 +426,14 @@ void sr_disable(int srid)
return;
}
- /* Check if SR is already disabled. If yes do nothing */
- if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
+ /* Check if SR clocks are already disabled. If yes do nothing */
+ if (!sr->is_sr_enable)
return;
+ /* Check if SR is already disabled. If yes just disable the clocks */
+ if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
+ goto disable_clocks;
+
/* Enable MCUDisableAcknowledge interrupt */
sr_modify_reg(sr, ERRCONFIG,
ERRCONFIG_MCU
[PATCHv3 21/22] OMAP3: PM: Enabling Smartreflex Class 3 driver by default in pm defconfig
This patch enables smartreflex class 3 driver in omap3_pm_defconfig. Signed-off-by: Thara Gopinath --- arch/arm/configs/omap3_pm_defconfig |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/configs/omap3_pm_defconfig b/arch/arm/configs/omap3_pm_defconfig index 6e86a06..300ac48 100644 --- a/arch/arm/configs/omap3_pm_defconfig +++ b/arch/arm/configs/omap3_pm_defconfig @@ -246,6 +246,7 @@ CONFIG_ARCH_OMAP4=y # OMAP Feature Selections # CONFIG_OMAP_SMARTREFLEX=y +CONFIG_OMAP_SMARTREFLEX_CLASS3=y # CONFIG_OMAP_SMARTREFLEX_TESTING is not set CONFIG_OMAP_RESET_CLOCKS=y CONFIG_OMAP_MUX=y -- 1.7.0.rc1.33.g07cf0f -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 17/22] OMAP3: PM: Implement latest h/w recommendations for SR and VP registers and SR VP enable disable sequence.
This patch introduces OMAP3 specific values for Smartreflex and
Voltage processor registers as per the latest TI recommendations.
This patch adds smartreflex errminlimit and voltage processor
errorgain into the voltage tables as they vary with different
voltages. This patch also improves the smartreflex and voltage
processor enable disable sequences as per the latest recommendations.
These recommendations were first formed based on experimentations
on N900 platform and were implemented in the N900 codebase
base first by Nishanth Menon and Paul Walmsley.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 54 +++
arch/arm/mach-omap2/smartreflex.h |4 +-
arch/arm/mach-omap2/voltage.c | 103 +---
arch/arm/mach-omap2/voltage.h | 25 ++---
4 files changed, 142 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index da7f534..eed7f9b 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -27,14 +27,17 @@
#include
#include
#include
+#include
#include
#include
+#include
#include "voltage.h"
#include "smartreflex.h"
#define SMARTREFLEX_NAME_LEN 16
+#define SR_DISABLE_TIMEOUT 200
struct omap_sr {
int srid;
@@ -190,11 +193,9 @@ static void sr_set_regfields(struct omap_sr *sr)
sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
sr->accum_data = OMAP3430_SR_ACCUMDATA;
if (sr->srid == VDD1) {
- sr->err_minlimit = OMAP3430_SR1_ERRMINLIMIT;
sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
} else {
- sr->err_minlimit = OMAP3430_SR2_ERRMINLIMIT;
sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
}
@@ -209,11 +210,6 @@ static void sr_start_vddautocomp(struct omap_sr *sr)
return;
}
- if (sr->is_sr_reset == 1) {
- sr_clk_enable(sr);
- sr_class->configure(sr->srid);
- }
-
sr->is_autocomp_active = 1;
if (!sr_class->enable(sr->srid)) {
sr->is_autocomp_active = 0;
@@ -407,6 +403,13 @@ int sr_enable(int srid, unsigned long volt)
return false;
}
+ /* errminlimit is opp dependent and hence linked to voltage */
+ sr->err_minlimit = volt_data.sr_errminlimit;
+
+ /* Enable the clocks and configure SR */
+ sr_clk_enable(sr);
+ sr_class->configure(sr->srid);
+
sr_write_reg(sr, NVALUERECIPROCAL, nvalue_reciprocal);
/* SRCONFIG - enable SR */
sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
@@ -423,6 +426,7 @@ int sr_enable(int srid, unsigned long volt)
void sr_disable(int srid)
{
struct omap_sr *sr = _sr_lookup(srid);
+ int timeout = 0;
if (!sr) {
pr_warning("omap_sr struct corresponding to SR%d not found\n",
@@ -430,10 +434,39 @@ void sr_disable(int srid)
return;
}
- sr->is_sr_reset = 1;
+ /* Check if SR is already disabled. If yes do nothing */
+ if (!(sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE))
+ return;
+
+ /* Enable MCUDisableAcknowledge interrupt */
+ sr_modify_reg(sr, ERRCONFIG,
+ ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
+
/* SRCONFIG - disable SR */
- sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, ~SRCONFIG_SRENABLE);
+ sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
+
+ /* Disable all other SR interrupts and clear the status */
+ sr_modify_reg(sr, ERRCONFIG,
+ (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
+ ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN),
+ (ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
+ ERRCONFIG_MCUBOUNDINTST | ERRCONFIG_VPBOUNDINTST));
+ /* Wait for SR to be disabled.
+* wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
+*/
+ omap_test_timeout((sr_read_reg(sr, ERRCONFIG) &
+ ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
+ timeout);
+
+ if (timeout >= SR_DISABLE_TIMEOUT)
+ pr_warning("SR%d disable timedout\n", srid);
+
+ /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt
+* Also enable VPBOUND interrrupt
+*/
+ sr_modify_reg(sr, ERRCONFIG, ERRCONFIG_MCUDISACKINTEN,
+ ERRCONFIG_MCUDISACKINTST);
}
/**
@@ -463,9 +496,6 @@ void omap_smartreflex_enable(int srid)
if (sr->is_autocomp_active == 1) {
[PATCHv3 09/22] OMAP3: PM: Creating separate files for handling OMAP3 voltage related operations.
This patch creates voltage.c and voltage.h files and
moves all voltage processor and voltage controller specific code
from smartreflex.c and other places in the OMAP3 codebase into
these two files.
This along with smartreflex class driver addition will make
smartreflex.c a generic driver to support both Class 2 and
Class 3 smartreflex implementaions.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/board-3430sdp.c |3 +-
arch/arm/mach-omap2/pm.h |7 -
arch/arm/mach-omap2/pm34xx.c | 87 +
arch/arm/mach-omap2/smartreflex-class3.c |4 +
arch/arm/mach-omap2/smartreflex.c| 378 +--
arch/arm/mach-omap2/smartreflex.h| 137 ---
arch/arm/mach-omap2/voltage.c| 626 ++
arch/arm/mach-omap2/voltage.h| 74
9 files changed, 712 insertions(+), 607 deletions(-)
create mode 100644 arch/arm/mach-omap2/voltage.c
create mode 100644 arch/arm/mach-omap2/voltage.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 0f8c406..184badd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -46,7 +46,8 @@ obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
-obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
+obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o \
+ voltage.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 6221a45..e80f8d4 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -49,6 +49,7 @@
#include "sdram-qimonda-hyb18m512160af-6.h"
#include "hsmmc.h"
#include "pm.h"
+#include "voltage.h"
#include "omap3-opp.h"
#include "smartreflex-class3.h"
@@ -347,7 +348,7 @@ static void __init omap_3430sdp_init_irq(void)
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
omap3_pm_init_opp_table();
omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
- omap3_pm_init_vc(&omap3_setuptime_table);
+ omap_voltage_init_vc(&omap3_setuptime_table);
omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
omap_init_irq();
omap_gpio_init();
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index b761be5..55bde0d 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -57,13 +57,6 @@ struct prm_setup_vc {
u16 vdd1_ret;
u16 vdd1_off;
};
-#ifdef CONFIG_PM
-extern void omap3_pm_init_vc(struct prm_setup_vc *setup_vc);
-#else
-static inline void omap3_pm_init_vc(struct prm_setup_vc *setup_vc)
-{
-}
-#endif
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 9777ab2..2f5c894 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -49,6 +49,7 @@
#include "prm-regbits-34xx.h"
#include "smartreflex.h"
+#include "voltage.h"
#include "prm.h"
#include "pm.h"
#include "sdrc.h"
@@ -96,22 +97,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static struct prm_setup_vc prm_setup = {
- .clksetup = 0xff,
- .voltsetup_time1 = 0xfff,
- .voltsetup_time2 = 0xfff,
- .voltoffset = 0xff,
- .voltsetup2 = 0xff,
- .vdd0_on = 0x30,/* 1.2v */
- .vdd0_onlp = 0x20, /* 1.0v */
- .vdd0_ret = 0x1e, /* 0.975v */
- .vdd0_off = 0x00, /* 0.6v */
- .vdd1_on = 0x2c,/* 1.15v */
- .vdd1_onlp = 0x20, /* 1.0v */
- .vdd1_ret = 0x1e, /* .975v */
- .vdd1_off = 0x00, /* 0.6v */
-};
-
static inline void omap3_per_save_context(void)
{
omap_gpio_save_context();
@@ -1077,26 +1062,6 @@ int omap3_pm_set_suspend_state(struct powerdomain
*pwrdm, int state)
return -EINVAL;
}
-void omap3_pm_init_vc(struct prm_setup_vc *setup_vc)
-{
- if (!setup_vc)
- return;
-
- prm_setup.clksetup = setup_vc->clksetup;
- prm_setup.voltsetup_time1 = setup_vc->voltsetup_time1;
- prm_setup.voltsetup_time2 = setup_vc->voltsetup_time2;
- prm_setup.voltoffset = setup_vc->voltoffset;
- prm_setup.voltsetup2 = setup_vc->voltsetup2;
- prm_setup.vdd0_on = setup_vc->vdd0_on;
- prm_setup.vdd0_onlp = setup_vc->vdd0_onlp;
- prm_setup.vdd0_ret = setup_vc->vdd0_ret;
[PATCHv3 20/22] OMAP3: PM: VP force update method of voltage scaling
This patch introduces VP force update method of voltage scaling
and enables it by default. The older method of vc bypass is now
configuratble through a menu config option. VP force update is the
hardware recommended method of voltage scaling.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/voltage.c | 175 +++--
arch/arm/mach-omap2/voltage.h |3 +
2 files changed, 172 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 05b0b78..554f137 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -35,6 +35,7 @@
#include "voltage.h"
#define VP_IDLE_TIMEOUT200
+#define VP_TRANXDONE_TIMEOUT 300
/**
* OMAP3 Voltage controller SR parameters. TODO: Pass this info as part of
@@ -80,6 +81,7 @@ struct vp_info {
u32 vp_vddmin;
u32 vp_vddmax;
u32 vp_timeout;
+ u32 vp_tranxdone_status;
};
static struct vp_info *vp_reg;
/*
@@ -166,6 +168,9 @@ static struct omap_volt_data omap34xx_vdd2_volt_data[] = {
{115, 0, 0xF9, 0x18},
};
+/* By default VPFORCEUPDATE is the chosen method of voltage scaling */
+static bool voltscale_vpforceupdate = true;
+
static inline u32 voltage_read_reg(u8 offset)
{
return prm_read_mod_reg(volt_mod, offset);
@@ -325,6 +330,8 @@ static void __init vp_data_configure(int vp_id)
OMAP3430_VDDMIN_SHIFT);
vp_reg[vp_id].vp_vddmax = (OMAP3_VP1_VLIMITTO_VDDMAX <<
OMAP3430_VDDMAX_SHIFT);
+ vp_reg[vp_id].vp_tranxdone_status =
+ OMAP3430_VP1_TRANXDONE_ST;
} else if (vp_id == VDD2) {
vp_reg[vp_id].volt_data = omap34xx_vdd2_volt_data;
vp_reg[vp_id].volt_data_count =
@@ -334,6 +341,8 @@ static void __init vp_data_configure(int vp_id)
OMAP3430_VDDMIN_SHIFT);
vp_reg[vp_id].vp_vddmax = (OMAP3_VP2_VLIMITTO_VDDMAX <<
OMAP3430_VDDMAX_SHIFT);
+ vp_reg[vp_id].vp_tranxdone_status =
+ OMAP3430_VP2_TRANXDONE_ST;
} else {
pr_warning("Voltage processor%d does not exisit\
in OMAP3 \n", vp_id);
@@ -476,6 +485,134 @@ static int vc_bypass_scale_voltage(u32 vdd, unsigned long
target_volt,
return true;
}
+/* VP force update method of voltage scaling */
+static int vp_forceupdate_scale_voltage(u32 vdd, unsigned long target_volt,
+ unsigned long current_volt)
+{
+ u32 smps_steps = 0, smps_delay = 0;
+ u32 vpconfig;
+ int timeout = 0;
+ u8 target_vsel, current_vsel;
+
+ if (!((vdd == VDD1) || (vdd == VDD2))) {
+ pr_warning("Wrong vdd id passed to vp forceupdate\n");
+ return false;
+ }
+
+ target_vsel = omap_twl_uv_to_vsel(target_volt);
+ current_vsel = omap_twl_uv_to_vsel(current_volt);
+ smps_steps = abs(target_vsel - current_vsel);
+
+ if (vdd == VDD1) {
+ u32 vc_cmdval0;
+
+ vc_cmdval0 = voltage_read_reg(vc_reg.cmdval0_reg);
+ vc_cmdval0 &= ~VC_CMD_ON_MASK;
+ vc_cmdval0 |= (target_vsel << VC_CMD_ON_SHIFT);
+ voltage_write_reg(vc_reg.cmdval0_reg, vc_cmdval0);
+ } else if (vdd == VDD2) {
+ u32 vc_cmdval1;
+
+ vc_cmdval1 = voltage_read_reg(vc_reg.cmdval1_reg);
+ vc_cmdval1 &= ~VC_CMD_ON_MASK;
+ vc_cmdval1 |= (target_vsel << VC_CMD_ON_SHIFT);
+ voltage_write_reg(vc_reg.cmdval1_reg, vc_cmdval1);
+ }
+
+ /*
+* Clear all pending TransactionDone interrupt/status. Typical latency
+* is <3us
+*/
+ while (timeout++ < VP_TRANXDONE_TIMEOUT) {
+ prm_write_mod_reg(vp_reg[vdd].vp_tranxdone_status,
+ OCP_MOD, PRM_IRQSTATUS_REG_OFFSET);
+ if (!(prm_read_mod_reg(OCP_MOD, PRM_IRQSTATUS_REG_OFFSET) &
+ vp_reg[vdd].vp_tranxdone_status))
+ break;
+ udelay(1);
+ }
+
+ if (timeout >= VP_TRANXDONE_TIMEOUT) {
+ pr_warning("VP%d TRANXDONE timeout exceeded. Voltage change \
+ aborted", vdd);
+ return false;
+ }
+
+ /* OMAP3430 has errorgain varying btw higher and lower opp's */
+ if (cpu_is_omap34xx()) {
+ struct omap_volt_data volt_data;
+
+ if (omap_match_volt(vdd, target_volt, &volt_data)) {
+ pr_warning("Unable to get voltage table for VDD%d \
+ during voltag
[PATCHv3 16/22] OMAP3: PM: Correcting accessing of ERRCONFIG register in smartreflex.c
Smartreflex error config register is special as it contains certain status bits which if written a 1 into means a clear of those bits. This patch takes special care during modify of this register that no status bits in this register are accidently set to 1. This issue was first reported by Nishanth Menon. Signed-off-by: Thara Gopinath --- arch/arm/mach-omap2/smartreflex.c | 11 +++ arch/arm/mach-omap2/smartreflex.h |6 ++ 2 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c index 56a8005..da7f534 100644 --- a/arch/arm/mach-omap2/smartreflex.c +++ b/arch/arm/mach-omap2/smartreflex.c @@ -71,6 +71,17 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, reg_val = omap_hwmod_readl(odev->hwmods[0], offset); reg_val &= ~mask; + /* +* Smartreflex error config register is special as it contains +* certain status bits which if written a 1 into means a clear +* of those bits. So in order to make sure no accidental write of +* 1 happens to those status bits, do a clear of them in the read +* value. Now if there is an actual reguest to write to these bits +* they will be set in the nex step. +*/ + if (offset == ERRCONFIG) + reg_val &= ~ERRCONFIG_STATUS_MASK; + reg_val |= value; omap_hwmod_writel(reg_val, odev->hwmods[0], offset); diff --git a/arch/arm/mach-omap2/smartreflex.h b/arch/arm/mach-omap2/smartreflex.h index 0cdee6e..823aea0 100644 --- a/arch/arm/mach-omap2/smartreflex.h +++ b/arch/arm/mach-omap2/smartreflex.h @@ -77,6 +77,12 @@ extern struct dentry *pm_dbg_main_dir; #defineERRCONFIG_MCUDISACKINTENBIT(23) #define ERRCONFIG_MCUDISACKINTST BIT(22) +#define ERRCONFIG_STATUS_MASK (ERRCONFIG_VPBOUNDINTST | \ + ERRCONFIG_MCUACCUMINTST | \ + ERRCONFIG_MCUVALIDINTST | \ + ERRCONFIG_MCUBOUNDINTST | \ + ERRCONFIG_MCUDISACKINTST) + /* Common Bit values */ #define SRCLKLENGTH_12MHZ_SYSCLK 0x3C -- 1.7.0.rc1.33.g07cf0f -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 18/22] OMAP3: PM: Optional reset of voltage during Smartreflex disable.
Currently whenever smartreflex is disabled the voltage for the
particular VDD is reset to the non-smartreflex compensated level.
This step is unnecessary during dvfs because anyways in the next couple
of steps before re-enabling smartreflex , the voltage level is changed.
This patch adds the flexibility in the smartreflex framework for the user
to specify whether or not a voltage reset is required after disabling
of smartrefelx. The smartreflex driver just passes on this info
to the smartreflex class driver, which ultimately takes the
decision to reset the voltage or not.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/pm34xx.c |4 ++--
arch/arm/mach-omap2/smartreflex-class3.c |5 +++--
arch/arm/mach-omap2/smartreflex.c| 10 +++---
arch/arm/mach-omap2/smartreflex.h|4 ++--
4 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index f3994c0..f6c1df3 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -415,9 +415,9 @@ void omap_sram_idle(void)
* Only needed if we are going to enter retention or off.
*/
if (mpu_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_disable(VDD1);
+ omap_smartreflex_disable(VDD1, 1);
if (core_next_state <= PWRDM_POWER_RET)
- omap_smartreflex_disable(VDD2);
+ omap_smartreflex_disable(VDD2, 1);
/* CORE */
if (core_next_state < PWRDM_POWER_ON) {
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
b/arch/arm/mach-omap2/smartreflex-class3.c
index 53bfd05..f1d6027 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -30,11 +30,12 @@ static int sr_class3_enable(int id)
return sr_enable(id, volt);
}
-static int sr_class3_disable(int id)
+static int sr_class3_disable(int id, int is_volt_reset)
{
omap_voltageprocessor_disable(id);
sr_disable(id);
- omap_reset_voltage(id);
+ if (is_volt_reset)
+ omap_reset_voltage(id);
return true;
}
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index eed7f9b..6b7d9aa 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -226,7 +226,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
}
if (sr->is_autocomp_active == 1) {
- sr_class->disable(sr->srid);
+ sr_class->disable(sr->srid, 1);
sr_clk_disable(sr);
sr->is_autocomp_active = 0;
}
@@ -506,12 +506,16 @@ void omap_smartreflex_enable(int srid)
* omap_smartreflex_disable : API to disable SR clocks and to call into the
* registered smartreflex class disable API.
* @srid - The id of the sr module to be disabled.
+ * @is_volt_reset - Whether the voltage needs to be reset after disabling
+ * smartreflex module or not. This parameter is directly
+ * passed on to the smartreflex class disable which takes the
+ * appropriate action.
*
* This API is to be called from the kernel in order to disable
* a particular smartreflex module. This API will in turn call
* into the registered smartreflex class disable API.
*/
-void omap_smartreflex_disable(int srid)
+void omap_smartreflex_disable(int srid, int is_volt_reset)
{
struct omap_sr *sr = _sr_lookup(srid);
@@ -528,7 +532,7 @@ void omap_smartreflex_disable(int srid)
if (sr->is_autocomp_active == 1) {
if (sr->is_sr_reset == 0) {
- sr_class->disable(srid);
+ sr_class->disable(srid, is_volt_reset);
/* Disable SR clk */
sr_clk_disable(sr);
}
diff --git a/arch/arm/mach-omap2/smartreflex.h
b/arch/arm/mach-omap2/smartreflex.h
index 9cc3204..476a3b6 100644
--- a/arch/arm/mach-omap2/smartreflex.h
+++ b/arch/arm/mach-omap2/smartreflex.h
@@ -180,7 +180,7 @@ struct omap_smartreflex_dev_data {
*/
struct omap_smartreflex_class_data {
int (*enable)(int sr_id);
- int (*disable)(int sr_id);
+ int (*disable)(int sr_id, int is_volt_reset);
void (*configure)(int sr_id);
int (*notify)(int sr_id, u32 status);
u8 notify_flags;
@@ -216,7 +216,7 @@ struct omap_smartreflex_data {
* do anything.
*/
void omap_smartreflex_enable(int srid);
-void omap_smartreflex_disable(int srid);
+void omap_smartreflex_disable(int srid, int is_volt_reset);
/*
* Smartreflex driver hooks to be called from Smartreflex class driver
--
1.7.0.rc1.33.g07cf0f
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[PATCHv3 05/22] OMAP3: PM: Remove OPP id dependency from smartreflex driver
This patch removes get_vdd1_opp and get_vdd2_opp API's and replaces
them with get_curr_vdd1_voltage and get_curr_vdd2_voltage API's.
N-target values are now linked to voltages and the link bewtween
voltage and n-target values is managed internally in smartreflex
driver and sr_devices.c.
get_curr_vdd1_voltage and get_curr_vdd2_voltage are added in
smartreflex driver in this patch. These API's will be moved to the
voltage driver in a later patch when voltage specific code is separated
out of smartreflex. The link between various voltages and n-target
values will also be separated out later.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 201 +++--
arch/arm/mach-omap2/smartreflex.h | 21 +++-
arch/arm/mach-omap2/sr_device.c | 39 ++-
3 files changed, 129 insertions(+), 132 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 2f89d79..669f1bb 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -48,7 +48,6 @@ struct omap_sr {
int srid;
int is_sr_reset;
int is_autocomp_active;
- struct clk *vdd_opp_clk;
u32 clk_length;
unsigned intirq;
struct platform_device *pdev;
@@ -119,64 +118,65 @@ static void sr_clk_disable(struct omap_sr *sr)
sr->is_sr_reset = 1;
}
-static u8 get_vdd1_opp(void)
+static unsigned long get_curr_vdd1_voltage(void)
{
struct omap_opp *opp;
unsigned long freq;
- struct omap_sr *sr_info = _sr_lookup(SR1);
+ struct clk *dpll1_clk;
- if (!sr_info) {
- pr_warning("omap_sr struct corresponding to SR1 not found\n");
- return 0;
- }
-
- if (sr_info->vdd_opp_clk == NULL || IS_ERR(sr_info->vdd_opp_clk))
+ dpll1_clk = clk_get(NULL, "dpll1_ck");
+ if (IS_ERR(dpll1_clk))
return 0;
- freq = sr_info->vdd_opp_clk->rate;
- opp = opp_find_freq_ceil(OPP_MPU, &freq);
+ freq = dpll1_clk->rate;;
+ opp = opp_find_freq_exact(OPP_MPU, freq, 1);
if (IS_ERR(opp))
return 0;
- /*
-* Use higher freq voltage even if an exact match is not available
-* we are probably masking a clock framework bug, so warn
-*/
- if (unlikely(freq != sr_info->vdd_opp_clk->rate))
- pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
- __func__, freq, sr_info->vdd_opp_clk->rate);
- return opp_get_opp_id(opp);
+ return opp_get_voltage(opp);
}
-static u8 get_vdd2_opp(void)
+static unsigned long get_curr_vdd2_voltage(void)
{
struct omap_opp *opp;
unsigned long freq;
- struct omap_sr *sr_info = _sr_lookup(SR2);
+ struct clk *l3_clk;
- if (!sr_info) {
- pr_warning("omap_sr struct corresponding to SR2 not found\n");
- return 0;
- }
-
- if (sr_info->vdd_opp_clk == NULL || IS_ERR(sr_info->vdd_opp_clk))
+ l3_clk = clk_get(NULL, "l3_ick");
+ if (IS_ERR(l3_clk))
return 0;
- freq = sr_info->vdd_opp_clk->rate;
- opp = opp_find_freq_ceil(OPP_L3, &freq);
+ freq = l3_clk->rate;
+ opp = opp_find_freq_exact(OPP_L3, freq, 1);
if (IS_ERR(opp))
return 0;
- /*
-* Use higher freq voltage even if an exact match is not available
-* we are probably masking a clock framework bug, so warn
-*/
- if (unlikely(freq != sr_info->vdd_opp_clk->rate))
- pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
- __func__, freq, sr_info->vdd_opp_clk->rate);
- return opp_get_opp_id(opp);
+ return opp_get_voltage(opp);
}
+static int sr_match_volt(struct omap_sr *sr, unsigned long volt,
+ struct omap_volt_data *volt_data)
+{
+ struct omap_smartreflex_data *pdata = sr->pdev->dev.platform_data;
+ struct omap_device *odev = to_omap_device(sr->pdev);
+ struct omap_smartreflex_dev_data *sr_dev_data =
+ odev->hwmods[0]->dev_attr;
+ int i;
+
+ if (!pdata->sr_volt_data) {
+ pr_notice("voltage table does not exist for SR %d\n", sr->srid);
+ return false;
+ }
+ for (i = 0; i < sr_dev_data->volts_supported; i++) {
+ if (pdata->sr_volt_data[i].voltage == volt) {
+ *volt_data = pdata->sr_volt_data[i];
+ return true;
+ }
+ }
+ pr_notice("Unable to match the current voltage with \
+ the voltage table for SR %d\n", sr->srid);
+ return false;
+}
static void sr_set_clk_length(struct omap_sr *sr)
{
@@ -211,21 +211,14 @@ static void sr_
[PATCHv3 12/22] OMAP3: PM: Minimizing the passing around of sr id in smartreflex.c
This patch ensures that sr id is passed as a parameter only to
public APIs in smartreflex.c and other APIs in smartreflex.c
uses the omap_sr strucutres.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 36 +---
1 files changed, 13 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index fffd5f7..c6942e9 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -190,16 +190,8 @@ static void sr_configure(struct omap_sr *sr)
sr->is_sr_reset = 0;
}
-static void sr_start_vddautocomp(int srid)
+static void sr_start_vddautocomp(struct omap_sr *sr)
{
- struct omap_sr *sr = _sr_lookup(srid);
-
- if (!sr) {
- pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid + 1);
- return;
- }
-
if (!sr_class || !(sr_class->enable)) {
pr_warning("smartreflex class driver not registered\n");
return;
@@ -211,30 +203,22 @@ static void sr_start_vddautocomp(int srid)
}
sr->is_autocomp_active = 1;
- if (!sr_class->enable(srid)) {
+ if (!sr_class->enable(sr->srid)) {
sr->is_autocomp_active = 0;
if (sr->is_sr_reset == 1)
sr_clk_disable(sr);
}
}
-static void sr_stop_vddautocomp(int srid)
+static void sr_stop_vddautocomp(struct omap_sr *sr)
{
- struct omap_sr *sr = _sr_lookup(srid);
-
- if (!sr) {
- pr_warning("omap_sr struct corresponding to SR%d not found\n",
- srid + 1);
- return;
- }
-
if (!sr_class || !(sr_class->disable)) {
pr_warning("smartreflex class driver not registered\n");
return;
}
if (sr->is_autocomp_active == 1) {
- sr_class->disable(srid);
+ sr_class->disable(sr->srid);
sr_clk_disable(sr);
sr->is_autocomp_active = 0;
}
@@ -426,9 +410,9 @@ static int omap_sr_autocomp_store(void *data, u64 val)
return 0;
}
if (val == 0)
- sr_stop_vddautocomp(sr_info->srid);
+ sr_stop_vddautocomp(sr_info);
else
- sr_start_vddautocomp(sr_info->srid);
+ sr_start_vddautocomp(sr_info);
return 0;
}
@@ -468,9 +452,15 @@ static int __devexit omap_smartreflex_remove(struct
platform_device *pdev)
{
struct omap_sr *sr_info = _sr_lookup(pdev->id + 1);
+ if (!sr_info) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ pdev->id + 1);
+ return 0;
+ }
+
/* Disable Autocompensation if enabled before removing the module */
if (sr_info->is_autocomp_active == 1)
- sr_stop_vddautocomp(sr_info->srid);
+ sr_stop_vddautocomp(sr_info);
list_del(&sr_info->node);
kfree(sr_info);
--
1.7.0.rc1.33.g07cf0f
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[PATCHv3 15/22] OMAP3: PM: Support for enabling smartreflex autocompensation by default.
This patch adds support to pdata enable smartreflex autocompenstion
during init based on enable_on_init flag passed as pdata.
This patch also adds enabling of autocompensation by
default (setting enable_on_init flag to true) in case of ES3.1
OMAP3430 chip. In the current implementation
this step is kept in smartreflex.c itself.Later an API can be added
so that the decision to enable autocompensation by default
can be passed from the corresponding board files.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c |5 +
arch/arm/mach-omap2/sr_device.c | 16 +++-
2 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index d043951..56a8005 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -239,6 +239,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
static int sr_late_init(struct omap_sr *sr_info)
{
char name[SMARTREFLEX_NAME_LEN];
+ struct omap_smartreflex_data *pdata = sr_info->pdev->dev.platform_data;
int ret = 0;
if (sr_class->class_type == SR_CLASS2 &&
@@ -252,6 +253,10 @@ static int sr_late_init(struct omap_sr *sr_info)
handler for SR%d. Smartreflex will \
not function as desired\n", sr_info->srid);
}
+
+ if (pdata->enable_on_init)
+ sr_start_vddautocomp(sr_info);
+
return ret;
}
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index c9b6533..7cb1fc7 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -117,7 +117,21 @@ static int __init omap_devinit_smartreflex(void)
if (WARN_ON(!sr_data))
return -ENOMEM;
- sr_data->enable_on_init = false;
+ /*
+* OMAP3430 ES3.1 chips by default come with Efuse burnt
+* with parameters required for full functionality of
+* smartreflex AVS feature like ntarget values , sennenable
+* and senpenable. So enable the SR AVS feature during boot up
+* itself if it is a OMAP3430 ES3.1 chip.
+*/
+ if (cpu_is_omap343x()) {
+ if (omap_rev() == OMAP3430_REV_ES3_1)
+ sr_data->enable_on_init = true;
+ else
+ sr_data->enable_on_init = false;
+ } else {
+ sr_data->enable_on_init = false;
+ }
sr_data->device_enable = omap_device_enable;
sr_data->device_shutdown = omap_device_shutdown;
sr_data->device_idle = omap_device_idle;
--
1.7.0.rc1.33.g07cf0f
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[PATCHv3 08/22] OMAP3: PM: Adding smartreflex class 3 driver.
This patch adds smartreflex class 3 driver. This driver hooks
up with the generic smartreflex driver smartreflex.c to abstract
out class specific implementations out of the generic driver.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-3430sdp.c |2 +
arch/arm/mach-omap2/smartreflex-class3.c | 48 ++
arch/arm/mach-omap2/smartreflex-class3.h | 18 +++
arch/arm/plat-omap/Kconfig | 11 ++-
5 files changed, 79 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c
create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 62accd2..0f8c406 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
+obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index cda9eae..6221a45 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -50,6 +50,7 @@
#include "hsmmc.h"
#include "pm.h"
#include "omap3-opp.h"
+#include "smartreflex-class3.h"
#define SDP3430_TS_GPIO_IRQ_SDPV1 3
#define SDP3430_TS_GPIO_IRQ_SDPV2 2
@@ -913,6 +914,7 @@ static void __init omap_3430sdp_init(void)
sdp3430_display_init();
enable_board_wakeup_source();
usb_ehci_init(&ehci_pdata);
+ sr_class3_init();
}
static void __init omap_3430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
b/arch/arm/mach-omap2/smartreflex-class3.c
new file mode 100644
index 000..1ac39bf
--- /dev/null
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -0,0 +1,48 @@
+/*
+ * Smart reflex Class 3 specific implementations
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "smartreflex.h"
+#include "smartreflex-class3.h"
+
+static int sr_class3_enable(int id)
+{
+ unsigned long volt = 0;
+
+ if (id == SR1)
+ volt = get_curr_vdd1_voltage();
+ else if (id == SR2)
+ volt = get_curr_vdd2_voltage();
+ if (!volt) {
+ pr_warning("Current voltage unknown.Cannot enable SR%d\n", id);
+ return false;
+ }
+
+ return sr_enable(id, volt);
+}
+
+static int sr_class3_disable(int id)
+{
+ sr_disable(id);
+
+ return true;
+}
+
+/* SR class3 structure */
+struct omap_smartreflex_class_data class3_data = {
+ .enable = sr_class3_enable,
+ .disable = sr_class3_disable,
+};
+
+int __init sr_class3_init(void)
+{
+ omap_sr_register_class(&class3_data);
+ return 0;
+}
diff --git a/arch/arm/mach-omap2/smartreflex-class3.h
b/arch/arm/mach-omap2/smartreflex-class3.h
new file mode 100644
index 000..6cd4d11
--- /dev/null
+++ b/arch/arm/mach-omap2/smartreflex-class3.h
@@ -0,0 +1,18 @@
+/*
+ * Smartreflex Class 3 Routines
+ *
+ * Author: Thara Gopinath
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Thara Gopinath
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifdef CONFIG_OMAP_SMARTREFLEX_CLASS3
+int sr_class3_init(void);
+#else
+static int sr_class3_init(void) {}
+#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 232fd9e..785b7e6 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -55,7 +55,7 @@ config OMAP_DEBUG_LEDS
config OMAP_SMARTREFLEX
bool "SmartReflex support"
- depends on ARCH_OMAP3 && TWL4030_CORE && PM
+ depends on ARCH_OMAP3 && PM
help
Say Y if you want to enable SmartReflex.
@@ -70,6 +70,15 @@ config OMAP_SMARTREFLEX
compensation for VDD1 and VDD2, user must write 1 to
/sys/power/sr_vddX_autocomp, where X is 1 or 2.
+config OMAP_SMARTREFLEX_CLASS3
+ bool "Class 3 mode of Smartreflex Implementation"
+ depends on OMAP_SMARTREFLEX && TWL4030_CORE
+ help
+ Say Y to enable Class 3 implementation of Smartreflex
+
+ Class 3 implementation of Smartreflex employs continuous hardware
+ voltage caliberation.
+
config OMAP_SMARTREFLEX_TESTING
bool "Smartre
[PATCHv3 01/22] OMAP3: PM: Adding hwmod data for Smartreflex
This patch adds the hwmod strucutres and other hwmod data for
OMAP3 Smartreflex IP's.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 135
arch/arm/mach-omap2/smartreflex.h | 33 +++
2 files changed, 168 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index ed60840..049e4e2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -17,10 +17,12 @@
#include
#include
#include
+#include
#include "omap_hwmod_common_data.h"
#include "prm-regbits-34xx.h"
+#include "smartreflex.h"
/*
* OMAP3xxx hardware module integration data
@@ -35,6 +37,8 @@ static struct omap_hwmod omap3xxx_mpu_hwmod;
static struct omap_hwmod omap3xxx_l3_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap34xx_sr1_hwmod;
+static struct omap_hwmod omap34xx_sr2_hwmod;
/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3__l4_core = {
@@ -88,9 +92,47 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* L4 CORE -> SR1 interface */
+static struct omap_hwmod_addr_space omap34xx_sr1_addr_space[] = {
+ {
+ .pa_start = OMAP34XX_SR1_BASE,
+ .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_sr1_hwmod,
+ .clk= "sr_l4_ick",
+ .addr = omap34xx_sr1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap34xx_sr1_addr_space),
+ .user = OCP_USER_MPU,
+};
+
+/* L4 CORE -> SR1 interface */
+static struct omap_hwmod_addr_space omap34xx_sr2_addr_space[] = {
+ {
+ .pa_start = OMAP34XX_SR2_BASE,
+ .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
+ .master = &omap3xxx_l4_core_hwmod,
+ .slave = &omap34xx_sr2_hwmod,
+ .clk= "sr_l4_ick",
+ .addr = omap34xx_sr2_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap34xx_sr2_addr_space),
+ .user = OCP_USER_MPU,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
&omap3xxx_l3__l4_core,
+ &omap3_l4_core__sr1,
+ &omap3_l4_core__sr2,
};
/* Master interfaces on the L4_CORE interconnect */
@@ -164,12 +206,105 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
};
+/* SR common */
+static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = {
+ .clkact_shift = 20,
+};
+
+static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = {
+ .sysc_offs = 0x24,
+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE),
+ .clockact = CLOCKACT_TEST_ICLK,
+ .sysc_fields= &omap34xx_sr_sysc_fields,
+};
+
+static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = {
+ .name = "smartreflex",
+ .sysc = &omap34xx_sr_sysc,
+ .rev = 1,
+};
+
+/* SR1 */
+static struct omap_hwmod_ocp_if *omap34xx_sr1_slaves[] = {
+ &omap3_l4_core__sr1,
+};
+
+static u32 omap34xx_sr1_efuse_offs[] = {
+ OMAP343X_CONTROL_FUSE_OPP1_VDD1, OMAP343X_CONTROL_FUSE_OPP2_VDD1,
+ OMAP343X_CONTROL_FUSE_OPP3_VDD1, OMAP343X_CONTROL_FUSE_OPP4_VDD1,
+ OMAP343X_CONTROL_FUSE_OPP5_VDD1,
+};
+
+static u32 omap34xx_sr1_test_nvalues[] = {
+ 0x9A90E6, 0xAABE9A, 0xBBF5C5, 0xBBB292, 0xBBF5C5,
+};
+
+static struct omap_smartreflex_dev_data omap34xx_sr1_dev_attr = {
+ .volts_supported= 5,
+ .efuse_sr_control = OMAP343X_CONTROL_FUSE_SR,
+ .sennenable_shift = OMAP343X_SR1_SENNENABLE_SHIFT,
+ .senpenable_shift = OMAP343X_SR1_SENPENABLE_SHIFT,
+ .efuse_nvalues_offs = omap34xx_sr1_efuse_offs,
+ .test_sennenable= 0x3,
+ .test_senpenable= 0x3,
+ .test_nvalues = omap34xx_sr1_test_nvalues
+};
+
+static struct omap_hwmod omap34xx_sr1_hwmod = {
+ .name = "sr1_hwmod",
+ .class = &omap34xx_smartreflex_hwmod_class,
+ .main_clk = "sr1_fck",
+ .slaves = omap34xx_sr1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap34xx_sr1_slaves),
+ .dev_attr = &omap34xx_sr1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .flags = HWMOD_SET_DEFAULT_CLOCKACT,
+};
+
+/* SR2 */
+static struct omap_hwmod_ocp_if *omap34xx_sr2_slaves[] =
[PATCHv3 02/22] OMAP3: PM: Create list to keep track of various smartreflex instances.
This patch removes the pointer sr1, sr2 in smartreflex.c and
instead creatse a list for keeping track of multiple smartreflex
instances.. This makes it scalable for next gen OMAPs where there
are more than two smartreflex modules.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 114
1 files changed, 76 insertions(+), 38 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 1c5ec37..dc8d6e1 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
#include
#include
@@ -51,9 +52,12 @@ struct omap_sr {
u32 opp5_nvalue;
u32 senp_mod, senn_mod;
void __iomem*srbase_addr;
- void __iomem*vpbase_addr;
+ struct list_headnode;
};
+/* sr_list contains all the instances of smartreflex module */
+static LIST_HEAD(sr_list);
+
#define SR_REGADDR(offs) (sr->srbase_addr + offset)
static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
@@ -78,6 +82,20 @@ static inline u32 sr_read_reg(struct omap_sr *sr, unsigned
offset)
return __raw_readl(SR_REGADDR(offset));
}
+static struct omap_sr *_sr_lookup(int srid)
+{
+ struct omap_sr *sr_info, *temp_sr_info;
+
+ sr_info = NULL;
+ list_for_each_entry(temp_sr_info, &sr_list, node) {
+ if (srid == temp_sr_info->srid) {
+ sr_info = temp_sr_info;
+ break;
+ }
+ }
+ return sr_info;
+}
+
static int sr_clk_enable(struct omap_sr *sr)
{
if (clk_enable(sr->clk) != 0) {
@@ -151,11 +169,17 @@ static u8 get_vdd1_opp(void)
{
struct omap_opp *opp;
unsigned long freq;
+ struct omap_sr *sr_info = _sr_lookup(SR1);
- if (sr1.vdd_opp_clk == NULL || IS_ERR(sr1.vdd_opp_clk))
+ if (!sr_info) {
+ pr_warning("omap_sr struct corresponding to SR1 not found\n");
+ return 0;
+ }
+
+ if (sr_info->vdd_opp_clk == NULL || IS_ERR(sr_info->vdd_opp_clk))
return 0;
- freq = sr1.vdd_opp_clk->rate;
+ freq = sr_info->vdd_opp_clk->rate;
opp = opp_find_freq_ceil(OPP_MPU, &freq);
if (IS_ERR(opp))
return 0;
@@ -163,9 +187,9 @@ static u8 get_vdd1_opp(void)
* Use higher freq voltage even if an exact match is not available
* we are probably masking a clock framework bug, so warn
*/
- if (unlikely(freq != sr1.vdd_opp_clk->rate))
+ if (unlikely(freq != sr_info->vdd_opp_clk->rate))
pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
- __func__, freq, sr1.vdd_opp_clk->rate);
+ __func__, freq, sr_info->vdd_opp_clk->rate);
return opp_get_opp_id(opp);
}
@@ -174,11 +198,17 @@ static u8 get_vdd2_opp(void)
{
struct omap_opp *opp;
unsigned long freq;
+ struct omap_sr *sr_info = _sr_lookup(SR2);
+
+ if (!sr_info) {
+ pr_warning("omap_sr struct corresponding to SR2 not found\n");
+ return 0;
+ }
- if (sr2.vdd_opp_clk == NULL || IS_ERR(sr2.vdd_opp_clk))
+ if (sr_info->vdd_opp_clk == NULL || IS_ERR(sr_info->vdd_opp_clk))
return 0;
- freq = sr2.vdd_opp_clk->rate;
+ freq = sr_info->vdd_opp_clk->rate;
opp = opp_find_freq_ceil(OPP_L3, &freq);
if (IS_ERR(opp))
return 0;
@@ -187,9 +217,9 @@ static u8 get_vdd2_opp(void)
* Use higher freq voltage even if an exact match is not available
* we are probably masking a clock framework bug, so warn
*/
- if (unlikely(freq != sr2.vdd_opp_clk->rate))
+ if (unlikely(freq != sr_info->vdd_opp_clk->rate))
pr_warning("%s: Available freq %ld != dpll freq %ld.\n",
- __func__, freq, sr2.vdd_opp_clk->rate);
+ __func__, freq, sr_info->vdd_opp_clk->rate);
return opp_get_opp_id(opp);
}
@@ -694,14 +724,13 @@ static void sr_disable(struct omap_sr *sr)
void sr_start_vddautocomap(int srid, u32 target_opp_no)
{
- struct omap_sr *sr = NULL;
+ struct omap_sr *sr = _sr_lookup(srid);
- if (srid == SR1)
- sr = &sr1;
- else if (srid == SR2)
- sr = &sr2;
- else
+ if (!sr) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ srid);
return;
+ }
if (sr->is_sr_reset == 1) {
sr_clk_enable(sr);
@@ -719,14 +748,13 @@ EXPORT_SYMBOL(sr_start_vddautocomap);
int sr_stop_vddautocomap(int srid)
{
- struct omap_sr *sr = NULL;
+ struct omap_sr *sr = _sr_lookup(srid);
- if (srid
[PATCHv3 07/22] OMAP3: PM: Smartreflex class related changes for smartreflex.c
OMAP3 smartreflex modules are capable of two different classes
of implementaion -
Class-2: Continuous Software Calibration
Class-3: Continuous Hardware Calibration.
OMAP3 along with T2/Gaia supports the Class 3 implementaion.
With a different PMIC it can support Class 2 implementaion also.
The idea behind this patch is that smartreflex.c should be able
to support both the classes of Smartreflex and the class specific
details for smartreflex should stay out of this file in a separate
class file.
This patch introduces smartreflex class specific hooks in
smartreflex.c. This patch only takes care of smartreflex enable
disable hooks which differ between Class 2 and Class 3. There
are some register setting changes between both the classes which
will be taken care of in a later patch.
This will form the base for adding class specific
drivers in later patches.
Signed-off-by: Thara Gopinath
---
arch/arm/mach-omap2/smartreflex.c | 259
arch/arm/mach-omap2/smartreflex.h | 44 ++-
2 files changed, 181 insertions(+), 122 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 359f7ec..e307c8c 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -56,6 +56,7 @@ struct omap_sr {
/* sr_list contains all the instances of smartreflex module */
static LIST_HEAD(sr_list);
+static struct omap_smartreflex_class_data *sr_class;
static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
{
@@ -430,12 +431,84 @@ static int sr_reset_voltage(int srid)
return 0;
}
-static int sr_enable(struct omap_sr *sr, unsigned long volt)
+static void sr_start_vddautocomp(int srid)
+{
+ struct omap_sr *sr = _sr_lookup(srid);
+
+ if (!sr) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ srid);
+ return;
+ }
+
+ if (!sr_class || !(sr_class->enable)) {
+ pr_warning("smartreflex class driver not registered\n");
+ return;
+ }
+
+ if (sr->is_sr_reset == 1) {
+ sr_clk_enable(sr);
+ sr_configure(sr);
+ }
+
+ sr->is_autocomp_active = 1;
+ if (!sr_class->enable(srid)) {
+ sr->is_autocomp_active = 0;
+ if (sr->is_sr_reset == 1)
+ sr_clk_disable(sr);
+ }
+}
+
+static void sr_stop_vddautocomp(int srid)
+{
+ struct omap_sr *sr = _sr_lookup(srid);
+
+ if (!sr) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ srid);
+ return;
+ }
+
+ if (!sr_class || !(sr_class->disable)) {
+ pr_warning("smartreflex class driver not registered\n");
+ return;
+ }
+
+ if (sr->is_autocomp_active == 1) {
+ sr_class->disable(srid);
+ sr_clk_disable(sr);
+ sr->is_autocomp_active = 0;
+ /* Reset the volatage for current OPP */
+ sr_reset_voltage(srid);
+ }
+}
+
+/* Public Functions */
+
+/**
+ * sr_enable : Enables the smartreflex module.
+ * @srid - The id of the sr module to be enabled.
+ * @volt - The voltage at which the Voltage domain associated with
+ * the smartreflex module is operating at. This is required only to program
+ * the correct Ntarget value.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * enable a smartreflex module. Returns true on success.Returns false if the
+ * target opp id passed is wrong or if ntarget value is wrong.
+ */
+int sr_enable(int srid, unsigned long volt)
{
u32 nvalue_reciprocal, v;
struct omap_volt_data volt_data;
+ struct omap_sr *sr = _sr_lookup(srid);
char vsel;
+ if (!sr) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ srid);
+ return false;
+ }
+
if (!sr_match_volt(sr, volt, &volt_data))
return false;
@@ -498,10 +571,24 @@ static int sr_enable(struct omap_sr *sr, unsigned long
volt)
return true;
}
-static void sr_disable(struct omap_sr *sr)
+/**
+ * sr_disable : Disables the smartreflex module.
+ * @srid - The id of the sr module to be disabled.
+ *
+ * This API is to be called from the smartreflex class driver to
+ * disable a smartreflex module.
+ */
+void sr_disable(int srid)
{
+ struct omap_sr *sr = _sr_lookup(srid);
u32 i = 0;
+ if (!sr) {
+ pr_warning("omap_sr struct corresponding to SR%d not found\n",
+ srid);
+ return;
+ }
+
sr->is_sr_reset = 1;
/* SRCONFIG - disable SR */
@@ -539,8 +6
[PATCHv3 00/22] OMAP3: PM: Smartreflex and voltage revamp
The main motivations behind this patch series are the following 1. Making smartreflex a platform driver with omap-device layer. 2. Separating voltage specific code from smartreflex.c and other locations and consolidating them into voltage.c and voltage.h. 3. Smartreflex module can have Class 1 Class 2 or Class 3 implementations depending on the PMIC in use. Making smartreflex.c capable of handling both the Class 2 and 3 implementaions and separating out class specific code into a separate class driver. 4. Remove dependencies on opp id in the smartreflex and voltage drivers 5. Implementating latest TI recommended register settings for Smartreflex and Voltage processor module as well as recommended sequences for enabling and disabling of Smartreflex and Voltage processor modules. 6. Implementing VP force update method of voltage scaling which is again TI hardware recommended. What this patch series does not address are 1. Separating PMIC specific portions from smartreflex and voltage code. 2. OMAP3630 and OMP4 smartreflex support. This patch series is based on Kevin's PM tree origin/pm-wip-opp branch and is dependent on the following patches not yet applied onto this branch. http://patchwork.kernel.org/patch/81504/ http://patchwork.kernel.org/patch/81606/ This patch series has been tested on OMAP3430 SDP with basic power management tests including the dvfs scripts. Thara Gopinath (22): OMAP3: PM: Adding hwmod data for Smartreflex OMAP3: PM: Create list to keep track of various smartreflex instances. OMAP3: PM: Convert smartreflex driver into a platform driver using hwmods and omap-device layer OMAP3: PM: Move smartreflex autocompensation enable disable hooks to PM debugfs. OMAP3: PM: Remove OPP id dependency from smartreflex driver OMAP3: PM: Correcting API names in samrtreflex driver. OMAP3: PM: Smartreflex class related changes for smartreflex.c OMAP3: PM: Adding smartreflex class 3 driver. OMAP3: PM: Creating separate files for handling OMAP3 voltage related operations. OMAP3: PM: Adding voltage table support in voltage driver. OMAP3: PM: Removing VP1, VP2, SR1 and SR2 defintions. OMAP3: PM: Minimizing the passing around of sr id in smartreflex.c OMAP3: PM: Cleaning up of smartreflex header file. OMAP3: PM: Configurations for Smartreflex Class 2 and Smartreflex Class 3 OMAP3: PM: Support for enabling smartreflex autocompensation by default. OMAP3: PM: Correcting accessing of ERRCONFIG register in smartreflex.c OMAP3: PM: Implement latest h/w recommendations for SR and VP registers and SR VP enable disable sequence. OMAP3: PM: Optional reset of voltage during Smartreflex disable. OMAP3: PM: Disabling Smartreflex across both frequency and voltage scaling during DVFS. OMAP3: PM: VP force update method of voltage scaling OMAP3: PM: Enabling Smartreflex Class 3 driver by default in pm defconfig OMAP3: PM: Fix crash when enabling SmartReflex on non-supported OMAPs. arch/arm/configs/omap3_pm_defconfig|1 + arch/arm/mach-omap2/Makefile |6 +- arch/arm/mach-omap2/board-3430sdp.c|5 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 134 +++ arch/arm/mach-omap2/pm-debug.c |4 +- arch/arm/mach-omap2/pm.h |7 - arch/arm/mach-omap2/pm34xx.c | 95 +-- arch/arm/mach-omap2/resource34xx.c | 27 +- arch/arm/mach-omap2/resource34xx.h |1 - arch/arm/mach-omap2/smartreflex-class3.c | 60 ++ arch/arm/mach-omap2/smartreflex-class3.h | 18 + arch/arm/mach-omap2/smartreflex.c | 1302 ++-- arch/arm/mach-omap2/smartreflex.h | 350 arch/arm/mach-omap2/sr_device.c| 152 arch/arm/mach-omap2/voltage.c | 940 arch/arm/mach-omap2/voltage.h | 99 +++ arch/arm/plat-omap/Kconfig | 11 +- 17 files changed, 2088 insertions(+), 1124 deletions(-) create mode 100644 arch/arm/mach-omap2/smartreflex-class3.c create mode 100644 arch/arm/mach-omap2/smartreflex-class3.h create mode 100644 arch/arm/mach-omap2/sr_device.c create mode 100644 arch/arm/mach-omap2/voltage.c create mode 100644 arch/arm/mach-omap2/voltage.h -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: OMAP 3430SDP i2c boot crash
On Fri, Apr 16, 2010 at 11:21:27AM +0300, Tomi Valkeinen wrote: > Hi, > > I haven't been able to boot my OMAP 3430SDP board with mainstream kernel > for a while, with the omap_3430sdp_defconfig. Anyone else having > problems? I don't get anything on the console after "Uncompressing > Linux... done, booting the kernel.", and Trace32 shows the log below. This is fixed with following patches (pick one): http://marc.info/?l=linux-omap&m=126826012627677&w=2 https://patchwork.kernel.org/patch/87590/ MW -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6] board-omap3-beagle: add DSS2 support
No more comments on this one? Can it go into Tony's tree now?
Op 15 apr 2010, om 10:52 heeft Koen Kooi het volgende geschreven:
> This patch adds DSS2 support to the beagleboard boardfile. DVI and TV-out are
> supported.
>
> Signed-off-by: Koen Kooi
> ---
>
> Changes since v1:
>* removed beagle_panel_enable_tv() and beagle_panel_disable_tv()
> Changes since v2:
>* changed to REGULATOR_SUPPLY(_name, _dev_name) for dss regulators
> Changes since v3:
>* really remove beagle_panel_enable_tv() and beagle_panel_disable_tv()
>* moved comments to this section
> Changes since v4:
>* remove trailing whitespace
> Changes since v5:
>* fix semicolon typo
>
> arch/arm/mach-omap2/board-omap3beagle.c | 102 ++
> 1 files changed, 75 insertions(+), 27 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
> b/arch/arm/mach-omap2/board-omap3beagle.c
> index 962d377..43d3e7d 100644
> --- a/arch/arm/mach-omap2/board-omap3beagle.c
> +++ b/arch/arm/mach-omap2/board-omap3beagle.c
> @@ -39,6 +39,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -106,6 +107,77 @@ static struct platform_device omap3beagle_nand_device = {
> .resource = &omap3beagle_nand_resource,
> };
>
> +/* DSS */
> +
> +static int beagle_enable_dvi(struct omap_dss_device *dssdev)
> +{
> + if (dssdev->reset_gpio != -1)
> + gpio_set_value(dssdev->reset_gpio, 1);
> +
> + return 0;
> +}
> +
> +static void beagle_disable_dvi(struct omap_dss_device *dssdev)
> +{
> + if (dssdev->reset_gpio != -1)
> + gpio_set_value(dssdev->reset_gpio, 0);
> +}
> +
> +static struct omap_dss_device beagle_dvi_device = {
> + .type = OMAP_DISPLAY_TYPE_DPI,
> + .name = "dvi",
> + .driver_name = "generic_panel",
> + .phy.dpi.data_lines = 24,
> + .reset_gpio = 170,
> + .platform_enable = beagle_enable_dvi,
> + .platform_disable = beagle_disable_dvi,
> +};
> +
> +static struct omap_dss_device beagle_tv_device = {
> + .name = "tv",
> + .driver_name = "venc",
> + .type = OMAP_DISPLAY_TYPE_VENC,
> + .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
> +};
> +
> +static struct omap_dss_device *beagle_dss_devices[] = {
> + &beagle_dvi_device,
> + &beagle_tv_device,
> +};
> +
> +static struct omap_dss_board_info beagle_dss_data = {
> + .num_devices = ARRAY_SIZE(beagle_dss_devices),
> + .devices = beagle_dss_devices,
> + .default_device = &beagle_dvi_device,
> +};
> +
> +static struct platform_device beagle_dss_device = {
> + .name = "omapdss",
> + .id= -1,
> + .dev= {
> + .platform_data = &beagle_dss_data,
> + },
> +};
> +
> +static struct regulator_consumer_supply beagle_vdac_supply =
> + REGULATOR_SUPPLY("vdda_dac", "omapdss");
> +
> +static struct regulator_consumer_supply beagle_vdvi_supply =
> + REGULATOR_SUPPLY("vdds_dsi", "omapdss");
> +
> +static void __init beagle_display_init(void)
> +{
> + int r;
> +
> + r = gpio_request(beagle_dvi_device.reset_gpio, "DVI reset");
> + if (r < 0) {
> + printk(KERN_ERR "Unable to get DVI reset GPIO\n");
> + return;
> + }
> +
> + gpio_direction_output(beagle_dvi_device.reset_gpio, 0);
> +}
> +
> #include "sdram-micron-mt46h32m32lf-6.h"
>
> static struct omap2_hsmmc_info mmc[] = {
> @@ -117,15 +189,6 @@ static struct omap2_hsmmc_info mmc[] = {
> {} /* Terminator */
> };
>
> -static struct platform_device omap3_beagle_lcd_device = {
> - .name = "omap3beagle_lcd",
> - .id = -1,
> -};
> -
> -static struct omap_lcd_config omap3_beagle_lcd_config __initdata = {
> - .ctrl_name = "internal",
> -};
> -
> static struct regulator_consumer_supply beagle_vmmc1_supply = {
> .supply = "vmmc",
> };
> @@ -181,16 +244,6 @@ static struct twl4030_gpio_platform_data
> beagle_gpio_data = {
> .setup = beagle_twl_gpio_setup,
> };
>
> -static struct regulator_consumer_supply beagle_vdac_supply = {
> - .supply = "vdac",
> - .dev= &omap3_beagle_lcd_device.dev,
> -};
> -
> -static struct regulator_consumer_supply beagle_vdvi_supply = {
> - .supply = "vdvi",
> - .dev= &omap3_beagle_lcd_device.dev,
> -};
> -
> /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA)
> */
> static struct regulator_init_data beagle_vmmc1 = {
> .constraints = {
> @@ -349,14 +402,8 @@ static struct platform_device keys_gpio = {
> },
> };
>
> -static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
> - { OMAP_TAG_LCD, &omap3_beagle_lcd_config },
> -};
> -
> static void __init omap3_beagle_init_irq(void)
> {
> - omap_board_config = omap3_beagle_config;
> - omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
> omap2_init_common_hw(mt46h
RE: [RFC] [PATCH] Devkit8000: Use generic panel driver instead of new driver for every panel
> -Original Message-
> From: Kan-Ru Chen [mailto:ka...@0xlab.org]
> Sent: Friday, April 16, 2010 1:42 PM
> To: Tomi Valkeinen
> Cc: Kan-Ru Chen; linux-omap@vger.kernel.org; Hiremath, Vaibhav; linux-
> fb...@vger.kernel.org; Thomas Weber
> Subject: [RFC] [PATCH] Devkit8000: Use generic panel driver instead of new
> driver for every panel
>
> Instead of use special driver for every new panel, we can use the
> generic driver and modedb database to specify the timing
> information. Now supports 4.3, 5.6 and 7 inch panel.
[Hiremath, Vaibhav] Yes we are using modedb with generic panel, infact with our
all internal releases we are supporting 480P and 720P DVI output using generic
driver.
>
> Signed-off-by: Kan-Ru Chen
> ---
>
> Hi!
>
> Some time ago there was a discussion about implementing a common
> driver for dummy LCDs. I tried the generic-panel and found it can
> cover most panels, by adding new entries to modedb.
>
> I've discussed with Thomas and he think this approach might be
> cleaner. I'd like to know others opinions.
>
> arch/arm/mach-omap2/board-devkit8000.c |3 ++-
> drivers/video/modedb.c | 12
> drivers/video/omap2/displays/panel-generic.c |3 ++-
> 3 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-
> omap2/board-devkit8000.c
> index 5bfc13b..4f52dfd 100644
> --- a/arch/arm/mach-omap2/board-devkit8000.c
> +++ b/arch/arm/mach-omap2/board-devkit8000.c
> @@ -172,8 +172,9 @@ static struct regulator_consumer_supply
> devkit8000_vsim_supply = {
>
> static struct omap_dss_device devkit8000_lcd_device = {
> .name = "lcd",
> - .driver_name= "innolux_at_panel",
> + .driver_name= "generic_panel",
> .type = OMAP_DISPLAY_TYPE_DPI,
> + .panel.config =
> OMAP_DSS_LCD_TFT|OMAP_DSS_LCD_IVS|OMAP_DSS_LCD_IHS,
> .phy.dpi.data_lines = 24,
> .platform_enable= devkit8000_panel_enable_lcd,
> .platform_disable = devkit8000_panel_disable_lcd,
> diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
> index b895aae..89bb3e5 100644
> --- a/drivers/video/modedb.c
> +++ b/drivers/video/modedb.c
> @@ -273,6 +273,18 @@ static const struct fb_videomode modedb[] = {
> /* 800x520i @ 50 Hz, 15.625 kHz hsync (PAL RGB) */
> NULL, 50, 800, 520, 58823, 144, 64, 72, 28, 80, 5,
> 0, FB_VMODE_INTERLACED
> +}, {
> + /* 480x272 @ 60 Hz, Devkit8000 4.3 inch LCD */
> + NULL, 60, 480, 272, 111000, 2, 2, 2, 2, 41, 10,
> + 0, FB_VMODE_NONINTERLACED
> +}, {
> + /* 640x480 @ 60 Hz, Devkit8000 5.6 inch LCD */
> + NULL, 60, 640, 480, 39682, 16, 143, 32, 12, 1, 1,
> + 0, FB_VMODE_NONINTERLACED
> +}, {
> + /* 800x480 @ 60 Hz, Devkit8000 7 inch LCD */
> + NULL, 60, 800, 480, 24855, 210, 45, 132, 22, 1, 1,
> + 0, FB_VMODE_NONINTERLACED
> },
[Hiremath, Vaibhav] I would suggest not to specify board name here instead you
can specify LCD name here.
Thanks,
Vaibhav
> };
>
> diff --git a/drivers/video/omap2/displays/panel-generic.c
> b/drivers/video/omap2/displays/panel-generic.c
> index 300eff5..b0a5599 100644
> --- a/drivers/video/omap2/displays/panel-generic.c
> +++ b/drivers/video/omap2/displays/panel-generic.c
> @@ -66,7 +66,8 @@ static void generic_panel_power_off(struct omap_dss_device
> *dssdev)
>
> static int generic_panel_probe(struct omap_dss_device *dssdev)
> {
> - dssdev->panel.config = OMAP_DSS_LCD_TFT;
> + if (dssdev->panel.config == 0)
> + dssdev->panel.config = OMAP_DSS_LCD_TFT;
> dssdev->panel.timings = generic_panel_timings;
>
> return 0;
> --
> 1.7.0.4
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OMAP 3430SDP i2c boot crash
Hi, I haven't been able to boot my OMAP 3430SDP board with mainstream kernel for a while, with the omap_3430sdp_defconfig. Anyone else having problems? I don't get anything on the console after "Uncompressing Linux... done, booting the kernel.", and Trace32 shows the log below. Tomi ___address|0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF SD::C0424B00 |hsusb2_clk 0x1700 -> 0x0003.<7>mux: Setting signal etk_d12.hsusb2_dir 0x1700 -> 0x010b.<7>mux: Setting signal etk_d13.hsusb2_nxt SD::C0424B80 | 0x1700 -> 0x010b.<7>mux: Setting signal etk_d14.hsusb2_data0 0x1700 -> 0x010b.<7>mux: Setting signal etk_d15.hsusb2_data1 0x170 SD::C0424C00 |0 -> 0x010b.<7>mux: Setting signal mcspi1_cs3.hsusb2_data2 0x1708 -> 0x010b.<7>mux: Setting signal mcspi2_cs1.hsusb2_data3 0x170 SD::C0424C80 |8 -> 0x010b.<7>mux: Setting signal mcspi2_simo.hsusb2_data4 0x1700 -> 0x010b.<7>mux: Setting signal mcspi2_somi.hsusb2_data5 0x1 SD::C0424D00 |700 -> 0x010b.<7>mux: Setting signal mcspi2_cs0.hsusb2_data6 0x1708 -> 0x010b.<7>mux: Setting signal mcspi2_clk.hsusb2_data7 0x1 SD::C0424D80 |700 -> 0x010b.<6>OMAP DMA hardware revision 4.0.<4>bio: create slab at 0.<5>SCSI subsystem initialized.<6>usbcore: regis SD::C0424E00 |tered new interface driver usbfs.<6>usbcore: registered new interface driver hub.<6>usbcore: registered new device driver usb.<1 SD::C0424E80 |>Unhandled fault: alignment exception (0x801) at 0xfa070009.<0>Internal error: : 801 [#1].<0>last sysfs file: .<4>Modules linked SD::C0424F00 | in:.<4>CPU: 0Not tainted (2.6.34-rc4-00014-g7591eef #937).<4>PC is at omap_i2c_unidle+0x4c/0x140.<4>LR is at omap2_dflt_cl SD::C0424F80 |k_enable+0xd8/0xe8.<4>pc : []lr : [] psr: 6013.<4>sp : c7c19e60 ip : 0009 fp : c7c19e74.<4> SD::C0425000 |r10: r9 : r8 : c03fa908.<4>r7 : c03fac48 r6 : c03fa900 r5 : c7ca0e00 r4 : c7ca0e00.<4>r3 : 0009 r2 : SD::C0425080 | fa07 r1 : r0 : .<4>Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel.<4>Control: 10c53 SD::C0425100 |87f Table: 80004019 DAC: 0017.<0>Process swapper (pid: 1, stack limit = 0xc7c182e8).<0>Stack: (0xc7c19e60 to 0xc7c1a000).< SD::C0425180 |0>9e60: c03f521c c7ca0e00 c7c19eac c7c19e78 c02f7e9c c024b8a8 c0416110.<0>9e80: c7c19e9c c7c19e90 c00fe430 c03fa908 c03 SD::C0425200 |fa908 c041bac0 c7ca3cc0 c0416110.<0>9ea0: c7c19ebc c7c19eb0 c01e8d60 c02f7cf8 c7c19edc c7c19ec0 c01e7d38 c01e8d4c.<0>9ec0: c03fa SD::C0425280 |908 c03fa93c c041bac0 c7ca3cc0 c7c19efc c7c19ee0 c01e7e58 c01e7c7c.<0>9ee0: c01e7df0 c041bac0 c7ca3cc0 c7c19f24 c7c19f0 SD::C0425300 |0 c01e7514 c01e7dfc.<0>9f00: c7c04af8 c7c445f0 c0194238 c0026ba4 c041bac0 c041bac0 c7c19f34 c7c19f28.<0>9f20: c01e7b84 c01e74d0 SD::C0425380 |c7c19f64 c7c19f38 c01e6df4 c01e7b70 c03c051a .<0>9f40: c0026ba4 c041bac0 c7c19f8c c7 SD::C0425400 |c19f68.<0>9f60: c01e8194 c01e6d58 c0026ba4 c0020018 .<0>9f80: c7c19f9c c7c19f90 c01e9204 c01e SD::C0425480 |80f0 c7c19fac c7c19fa0 c002002c c01e91c4.<0>9fa0: c7c19fdc c7c19fb0 c0031374 c0020024 c7c19fdc c7c19fc8.<0>9fc SD::C0425500 |0: c0026ba4 c7c19ff4 c7c19fe0 c00085f4 c003131c.<0>9fe0: c7c19ff8 c0060304 SD::C0425580 | c0008568 28050809 01004804.<4>Backtrace: .<4>[] (omap_i2c_unidle+0x0/0x140) from [] (omap_i2c_probe+0x1b0/0 SD::C0425600 |x3a4).<4> r5:c7ca0e00 r4:c03f521c.<4>[] (omap_i2c_probe+0x0/0x3a4) from [] (platform_drv_probe+0x20/0x24).<4 SD::C0425680 |> r8:c0416110 r7:c7ca3cc0 r6:c041bac0 r5:c03fa908 r4:c03fa908.<4>[] (platform_drv_probe+0x0/0x24) from [] (d SD::C0425700 |river_probe_device+0xc8/0x180).<4>[] (driver_probe_device+0x0/0x180) from [] (__driver_attach+0x68/0x8c).<4> SD::C0425780 | r7:c7ca3cc0 r6:c041bac0 r5:c03fa93c r4:c03fa908.<4>[] (__driver_attach+0x0/0x8c) from [] (bus_for_each_dev+ SD::C0425800 |0x50/0x84).<4> r7:c7ca3cc0 r6:c041bac0 r5:c01e7df0 r4:.<4>[] (bus_for_each_dev+0x0/0x84) from [] (dr SD::C0425880 |iver_attach+0x20/0x28).<4> r6:c041bac0 r5:c041bac0 r4:c0026ba4.<4>[] (driver_attach+0x0/0x28) from [] (bus_a SD::C0425900 |dd_driver+0xa8/0x230).<4>[] (bus_add_driver+0x0/0x230) from [] (driver_register+0xb0/0x138).<4>[] SD::C0425980 |(driver_register+0x0/0x138) from [] (platform_driver_register+0x4c/0x60).<4> r9: r8: r7: r6:c0 SD::C0425A00 |020018 r5:.<4>r4:c0026ba4.<4>[] (platform_driver_register+0x0/0x60) from [] (omap_i2c_init_driver+0x SD::C0425A80 |14/0x1c).<4>[] (omap_i2c_init_driver+0x0/0x1c) from [] (do_one_initcall+0x64/0x1bc).<4>[] (do_one_ SD::C0425B00 |initcall+0x0/0x1bc) from []
[RFC] [PATCH] Devkit8000: Use generic panel driver instead of new driver for every panel
Instead of use special driver for every new panel, we can use the
generic driver and modedb database to specify the timing
information. Now supports 4.3, 5.6 and 7 inch panel.
Signed-off-by: Kan-Ru Chen
---
Hi!
Some time ago there was a discussion about implementing a common
driver for dummy LCDs. I tried the generic-panel and found it can
cover most panels, by adding new entries to modedb.
I've discussed with Thomas and he think this approach might be
cleaner. I'd like to know others opinions.
arch/arm/mach-omap2/board-devkit8000.c |3 ++-
drivers/video/modedb.c | 12
drivers/video/omap2/displays/panel-generic.c |3 ++-
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index 5bfc13b..4f52dfd 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -172,8 +172,9 @@ static struct regulator_consumer_supply
devkit8000_vsim_supply = {
static struct omap_dss_device devkit8000_lcd_device = {
.name = "lcd",
- .driver_name= "innolux_at_panel",
+ .driver_name= "generic_panel",
.type = OMAP_DISPLAY_TYPE_DPI,
+ .panel.config =
OMAP_DSS_LCD_TFT|OMAP_DSS_LCD_IVS|OMAP_DSS_LCD_IHS,
.phy.dpi.data_lines = 24,
.platform_enable= devkit8000_panel_enable_lcd,
.platform_disable = devkit8000_panel_disable_lcd,
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c
index b895aae..89bb3e5 100644
--- a/drivers/video/modedb.c
+++ b/drivers/video/modedb.c
@@ -273,6 +273,18 @@ static const struct fb_videomode modedb[] = {
/* 800x520i @ 50 Hz, 15.625 kHz hsync (PAL RGB) */
NULL, 50, 800, 520, 58823, 144, 64, 72, 28, 80, 5,
0, FB_VMODE_INTERLACED
+}, {
+ /* 480x272 @ 60 Hz, Devkit8000 4.3 inch LCD */
+ NULL, 60, 480, 272, 111000, 2, 2, 2, 2, 41, 10,
+ 0, FB_VMODE_NONINTERLACED
+}, {
+ /* 640x480 @ 60 Hz, Devkit8000 5.6 inch LCD */
+ NULL, 60, 640, 480, 39682, 16, 143, 32, 12, 1, 1,
+ 0, FB_VMODE_NONINTERLACED
+}, {
+ /* 800x480 @ 60 Hz, Devkit8000 7 inch LCD */
+ NULL, 60, 800, 480, 24855, 210, 45, 132, 22, 1, 1,
+ 0, FB_VMODE_NONINTERLACED
},
};
diff --git a/drivers/video/omap2/displays/panel-generic.c
b/drivers/video/omap2/displays/panel-generic.c
index 300eff5..b0a5599 100644
--- a/drivers/video/omap2/displays/panel-generic.c
+++ b/drivers/video/omap2/displays/panel-generic.c
@@ -66,7 +66,8 @@ static void generic_panel_power_off(struct omap_dss_device
*dssdev)
static int generic_panel_probe(struct omap_dss_device *dssdev)
{
- dssdev->panel.config = OMAP_DSS_LCD_TFT;
+ if (dssdev->panel.config == 0)
+ dssdev->panel.config = OMAP_DSS_LCD_TFT;
dssdev->panel.timings = generic_panel_timings;
return 0;
--
1.7.0.4
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Re: [PATCH] OMAP: DSS2: TPO-TD03MTEA1: fix Kconfig dependency
On Thu, 2010-04-15 at 16:59 +0200, ext Grazvydas Ignotas wrote: > This panel depends on SPI, not I2C. > > Signed-off-by: Grazvydas Ignotas > --- Thanks, applied into my tree. Tomi > drivers/video/omap2/displays/Kconfig |2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/video/omap2/displays/Kconfig > b/drivers/video/omap2/displays/Kconfig > index dfb57ee..a2faf8a 100644 > --- a/drivers/video/omap2/displays/Kconfig > +++ b/drivers/video/omap2/displays/Kconfig > @@ -33,7 +33,7 @@ config PANEL_TOPPOLY_TDO35S > > config PANEL_TPO_TD043MTEA1 > tristate "TPO TD043MTEA1 LCD Panel" > -depends on OMAP2_DSS && I2C > +depends on OMAP2_DSS && SPI > help >LCD Panel used in OMAP3 Pandora > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
