The GIC register accesses today make use of readl()/writel()
which prove to be very expensive when used along with mandatory
barriers. This mandatory barriers also introduces an un-necessary
and expensive l2x0_sync() operation. On Cortex-A9 MP cores, GIC
IO accesses from CPU are direct and doesn't
The CSIb block is used in rx-51 to handle camera ccp2 IO. Adding
support to omap3isp driver for managing the power supply for the
CSIb IO complex via regulator framework. Also create the
apropriate regulator definitions in the rx-51 board file.
I propose to push this set through the linux-media,
The current omap3isp driver is missing regulator handling
for CSIb complex in omap34xx based devices. This patch
adds a mechanism for this to the omap3isp driver.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
---
drivers/media/video/omap3isp/ispccp2.c | 24 +++-
The RX-51 uses the CSIb IO complex for camera operation. The
board file is missing definition for the regulator supplying
the CSIb complex, so this is added for better power
management.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c |
Marc,
On 4/21/2011 12:38 AM, Marc Zyngier wrote:
Use the normal interrupt scheme for the local timers by using
a remapped PPI interrupt.
Tested on a Pandaboard.
Cc: Tony Lindgrent...@atomide.com
Cc: Santosh Shilimkarsantosh.shilim...@ti.com
Signed-off-by: Marc Zyngiermarc.zyng...@arm.com
---
* Kalle Jokiniemi kalle.jokini...@nokia.com [110429 00:09]:
The RX-51 uses the CSIb IO complex for camera operation. The
board file is missing definition for the regulator supplying
the CSIb complex, so this is added for better power
management.
Signed-off-by: Kalle Jokiniemi
On Thu, Apr 28, 2011 at 12:10:09PM -0400, Oleg Drokin wrote:
Hello!
On Apr 28, 2011, at 2:14 AM, Mike Rapoport wrote:
+static struct omap_musb_board_data musb_board_data = {
+.interface_type = MUSB_INTERFACE_ULPI,
+#ifdef CONFIG_USB_MUSB_OTG
+.mode
From: Jean Pihet j-pi...@ti.com
Rework the cpuidle code:
- optimize the cpuidle C-states data registration and storage,
- change the interaction with the debugfs 'enable_off_mode' knob
and the use of the C-states 'valid' internal field,
- remove dead code,
- improve code readability.
Tested on
From: Jean Pihet j-pi...@ti.com
- sleep_latency and wake_latency are not used, replace them by
exit_latency which is used by cpuidle. exit_latency simply is
the sum of sleep_latency and wake_latency,
- replace threshold by target_residency,
- changed the OMAP3 specific cpuidle code
From: Jean Pihet j-pi...@ti.com
The achievable power modes of the power domains in cpuidle
depends on the system wide 'enable_off_mode' knob in debugfs.
Upon changing enable_off_mode, do not change the C-states
'valid' field but instead dynamically restrict the power modes
when entering idle.
From: Jean Pihet j-pi...@ti.com
The current implementation defines an internal structure and a
C-states array. Using those structures is redundant to the
structs used by the cpuidle framework.
This patch provides a clean-up of the internal struct, removes the
internal C-states array, stores the
From: Jean Pihet j-pi...@ti.com
The cpuidle states settings can be overriden by some board-
specific settings, by calling omap3_pm_init_cpuidle.
Remove the 3430SDP specific states settings registration
since the figures are identical to the default ones (in cpuidle34xx.c).
Signed-off-by: Jean
From: Jean Pihet j-pi...@ti.com
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 52 +---
1 files changed, 19 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
Hi Kalle,
On Friday 29 April 2011 09:11:59 Kalle Jokiniemi wrote:
The current omap3isp driver is missing regulator handling
for CSIb complex in omap34xx based devices. This patch
adds a mechanism for this to the omap3isp driver.
Signed-off-by: Kalle Jokiniemi kalle.jokini...@nokia.com
Hi Tony,
On Wednesday 27 April 2011 16:03:02 Laurent Pinchart wrote:
The iommu shares an interrupt line with the OMAP3 ISP. The iommu
interrupt handler must check the fault status and return IRQ_HANDLED
when no fault occured.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
Hi Linus,
Please pull omap fixes from:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git
omap-fixes-for-linus
Most of the diffstat is fixing clock related flags, the kind
of stuff that will be eventually coming from device tree as
discussed earlier. Anyways necessariy
Tarun,
On 4/25/2011 3:11 PM, DebBarma, Tarun Kanti wrote:
In driver probe use sys_timer_reserved to identify which all timers
have already been used for clocksource and clockevent. Mark all those
timers as reserved so that no one else can use them.
Signed-off-by: Tarun Kanti
On 4/16/2011 9:20 PM, Tarun Kanti DebBarma wrote:
Add routines to converts dmtimers to platform devices. The device data
is obtained from hwmod database of respective platform and is registered
to device model after successful binding to driver.
In addition, capability attribute of each of the
Tarun,
On 4/16/2011 9:21 PM, Tarun Kanti DebBarma wrote:
Make plat-omap/dmtimer.c a normal driver. It is moved to drivers/misc
as timer-omap.c and the corresponding header file has been moved to
include/linux as timer-omap.h. Files which included plat/dmtimer.h
are changed to include
On 4/29/2011 2:56 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
The cpuidle states settings can be overriden by some board-
specific settings, by calling omap3_pm_init_cpuidle.
Remove the 3430SDP specific states settings registration
since the figures are identical to the
Jean,
On 4/29/2011 2:56 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
The current implementation defines an internal structure and a
C-states array. Using those structures is redundant to the
structs used by the cpuidle framework.
This patch provides a clean-up of the
On 4/29/2011 2:56 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
The achievable power modes of the power domains in cpuidle
depends on the system wide 'enable_off_mode' knob in debugfs.
Upon changing enable_off_mode, do not change the C-states
'valid' field but instead
From: Srinath srin...@mistralsolutions.com
This patch fixes the EHCI PHY reset issue found on CraneBoard.
Signed-off-by: Srinath srin...@mistralsolutions.com
---
arch/arm/mach-omap2/board-am3517crane.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
From: Srinath srin...@mistralsolutions.com
Added Display (DVI and TV) support for CraneBoard.
Signed-off-by: Srinath srin...@mistralsolutions.com
---
arch/arm/mach-omap2/board-am3517crane.c | 78 +++
1 files changed, 78 insertions(+), 0 deletions(-)
diff --git
Hello.
On 29-04-2011 15:41, srin...@mistralsolutions.com wrote:
From: Srinath srin...@mistralsolutions.com
This patch fixes the EHCI PHY reset issue found on CraneBoard.
Signed-off-by: Srinath srin...@mistralsolutions.com
AFAIK full name required in signoff.
WBR, Sergei
--
To
Acquire console lock before enabling and writing to console-uart
to avoid any recursive prints from console write.
for ex:
-- printk
-- uart_console_write
-- get_sync
-- printk from omap_device enable
-- uart_console write
Also during
Converting uart driver to adapt to pm runtime api's.
Code re-org + cleanup.
Moving some functionality from serial.c to omap-serial.c
Changes involves:
1.) Cleaning up certain uart calls from sram_idle func.
2.) Removed all types of uart clock handling code from serial.c
3.)
In preparation to UART runtime conversion. Remove certain uart specific calls
from sram_idle path in pm24xx/34xx files.
These func calls will no more be used with upcoming uart runtime design.
1.) Removing console lock holding :- Now can be handled with omap-serial file
itself.
2.)
Add default mux data for all uarts if mux info is not passed from
board file to avoid breaking any board support.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/serial.c | 127 +-
1 files changed, 126 insertions(+), 1
From: Jon Hunter jon-hun...@ti.com
When using DMA there are two timeouts defined. The first timeout,
rx_timeout, is really a polling rate in which software polls the
DMA status to see if the DMA has finished. This is necessary for
the RX side because we do not know how much data we will receive.
For omap2 cpu_idle thread will not be available
and uart_clock cutting happens only in suspend path.
Prior to this patch the uart_clock was cut using prepare/resume
calls since these funcs are no more available with runtime
changes use no_async_wake flag to keep clock active during bootup
Add api to enable io_pad wakeup based on mux dynamic pad and
wake_up enable flag initialized during hwmod_mux.
Use the wakeup flag and pad_remux flag and enable wakeup capability
for the pad having these flags enabled.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
Cleanup serial.c file in preparation to addition of runtime api's in omap-serial
file. Remove all clock handling mechanism as this will be taken care with
pm runtime api's in omap-serial.c file itself.
1.) Remove omap-device enable and disable. We can can use get_sync/put_sync
api's
2.) Remove
From: Deepak K deepa...@ti.com
The following UART parameters are defined within the UART driver:
1). Whether the UART uses DMA (dma_enabled), by default set to 0
2). The size of dma buffer (set to 4096 bytes)
3). The time after which the dma should stop if no more data is received.
4). The auto
The pad values here are same as the default pad values updated in serial.c file.
Avoid structure duplication and use default pads.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c | 100 +--
1 files changed, 1
Use resume idle call from prcm_irq to enable uart_port from low power states.
Add api to check pad wakeup status which will we used from uart_resume func.
to enable back uart port if a wakeup event occurred.
UART_Resume func. can be removed once we have irq_chaining functionality
available.
Adapts omap-serial driver to use pm_runtime api's.
1.) Populate reg values to uart port which can be used for context restore.
2.) Moving context_restore func to driver from serial.c
3.) Adding port_enable/disable func to enable/disable given uart port.
enable port using get_sync and disable
Move the erratum handling mechanism from serial.c to driver file
and utilise the same func. in driver file.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
drivers/tty/serial/omap-serial.c | 58 ++---
1 files changed, 53 insertions(+), 5 deletions(-)
diff
Hello.
On 29-04-2011 15:41, srin...@mistralsolutions.com wrote:
From: Srinath srin...@mistralsolutions.com
Added Display (DVI and TV) support for CraneBoard.
Signed-off-by: Srinath srin...@mistralsolutions.com
[...]
diff --git a/arch/arm/mach-omap2/board-am3517crane.c
The vaux2 (VCSI) regulator is left on by the bootloader
in rx-51. Since there the product has shipped and there
won't be any bootloader updates to fix this issue, we
need to define all the regulators and declare full
constraints for the regulator FW. This will allow the
regulator FW to disable
Adding regulator definitions to correctly shut down unneeded
regulators. Needed, but previously undefined regulators were
marked always_on.
Tested on top of MeeGo N900 DE daily release (.37 kernel) and
with linux-omap. Patch based on linux-omap HEAD.
Kalle Jokiniemi (1):
OMAP3: rx-51: Add full
Hi,
-Original Message-
From: ext Laurent Pinchart [mailto:laurent.pinch...@ideasonboard.com]
Sent: 29. huhtikuuta 2011 12:49
To: Jokiniemi Kalle (Nokia-SD/Tampere)
Cc: t...@atomide.com; mche...@infradead.org; linux-
o...@vger.kernel.org; linux-me...@vger.kernel.org
Subject:
On Thu, 2011-04-28 at 20:30 +0300, Artem Bityutskiy wrote:
On Wed, 2011-04-27 at 17:39 +0530, Saxena, Parth wrote:
This patch solves the above issue for omap by initialising
badblockbits. We are working further on this to find a generic fix
to the problem in nand_base.c.
But it looks
If cable is not connected to peripheral only board when initializing the
gadget driver, then runtime pm calls are out-of-sync and the musb cannot
idle with omap2430.c. This was noted on Nokia N900 where musb prevented the
CPU to be able to enter deeper retention idle state.
This was working in
On Fri, 29 Apr 2011 18:09:46 +0530
Govindraj.R govindraj.r...@ti.com wrote:
Cleanup serial.c file in preparation to addition of runtime api's in
omap-serial
file. Remove all clock handling mechanism as this will be taken care with
pm runtime api's in omap-serial.c file itself.
1.) Remove
On Tue, 2011-04-19 at 14:45 +0200, Michael Büsch wrote:
On Tue, 2011-04-19 at 15:41 +0300, Tomi Valkeinen wrote:
On Tue, 2011-04-19 at 14:34 +0200, Michael Büsch wrote:
On Tue, 2011-04-19 at 15:30 +0300, Tony Lindgren wrote:
But this again reminded me of the mess of having two display
Hi Santosh,
On Fri, Apr 29, 2011 at 1:29 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On 4/29/2011 2:56 PM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
The achievable power modes of the power domains in cpuidle
depends on the system wide 'enable_off_mode' knob
On Fri, 29 Apr 2011 15:47:44 +0300
Kalle Jokiniemi kalle.jokini...@nokia.com wrote:
+static struct regulator_init_data rx51_vintana1 = {
+ .constraints = {
+ .name = VINTANA1,
+ .min_uV = 150,
+ .max_uV
On Fri, 29 Apr 2011 16:33:39 +0300
Tomi Valkeinen tomi.valkei...@ti.com wrote:
However, it's quite difficult to port all of the blizzard.c code, as the
new DSS2 doesn't support some of the weird things there. Also, I don't
have N800 schematics and Blizzard documentation, so properly porting
-Original Message-
From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
Sent: Thursday, April 28, 2011 11:01 PM
To: Saxena, Parth; Brian Norris
Cc: linux-...@lists.infradead.org; Basheer, Mansoor Ahamed; linux-
o...@vger.kernel.org
Subject: Re: [RFC] mtd: nand: Fix bad block
On Fri, Apr 29, 2011 at 4:01 PM, Bryan DE FARIA
bdefa...@adeneo-embedded.com wrote:
When the module is removed, a reinsertion will fail with a -16 error.
Signed-off-by: Bryan DE FARIA bdefa...@adeneo-embedded.com
---
drivers/mtd/nand/omap2.c | 1 +
1 files changed, 1 insertions(+), 0
On Fri, Apr 29, 2011 at 4:01 PM, Bryan DE FARIA
bdefa...@adeneo-embedded.com wrote:
When reading a subpage with a non dividable by 4 ecc number of byte, the
prefetch function gets first the extra bytes, then reads the bytes lefting.
Extra bytes are not returned in the buffer (they are
On Fri, 2011-04-29 at 19:52 +0530, Saxena, Parth wrote:
-Original Message-
From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
Sent: Thursday, April 28, 2011 11:01 PM
To: Saxena, Parth; Brian Norris
Cc: linux-...@lists.infradead.org; Basheer, Mansoor Ahamed; linux-
On 4/29/2011 10:44 AM, Artem Bityutskiy wrote:
On Fri, 2011-04-29 at 19:52 +0530, Saxena, Parth wrote:
-Original Message-
From: Artem Bityutskiy [mailto:dedeki...@gmail.com]
Sent: Thursday, April 28, 2011 11:01 PM
To: Saxena, Parth; Brian Norris
Cc: linux-...@lists.infradead.org;
On Fri, 2011-04-29 at 11:03 -0700, Brian Norris wrote:
As promised (but too late?):
Acked-by: Brian Norris computersforpe...@gmail.com
No, not late, I rebase my l2 tree with no shame :-) But once the patch
hits the real mtd tree, then we never change it. So, I've added you tag,
thanks.
--
From: Oleg Drokin gr...@linuxhacker.ru
Attempt to kfree(info-mtd) is a bad idea since it's
a different substructure in the middle of a properly
allocated struct omap_nand_info.
I guess nobody tripped it before since nobody really
removes NAND flash and nobody unloads the module either.
On Wed, Mar 23, 2011 at 1:49 PM, Omar Ramirez Luna omar.rami...@ti.com wrote:
Cleanup and fixes for tidspbridge's PM routines.
The most significant ones are:
- Protection of critical sections when disabling clocks which
could cause issues during PM transitions.
- Fix of resume path from RET
On Fri, 2011-04-29 at 16:33 +0300, Tomi Valkeinen wrote:
So, my question is: what are the uses of N800's display with the
mainline kernel? Are we happy with just having basic display
functionality, or do people need all the features in the older blizzard
driver?
Well, not sure.
The OpenWRT
On Fri, 2011-04-29 at 23:04 +0200, Michael Büsch wrote:
On Fri, 2011-04-29 at 16:33 +0300, Tomi Valkeinen wrote:
So, my question is: what are the uses of N800's display with the
mainline kernel? Are we happy with just having basic display
functionality, or do people need all the features
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