[PATCH 0/3] OMAP: DSS2: DISPC register definition clean up
With more overlays and overlay managers on OMAP4, and more coming in future OMAPs, the current way of defining the DISPC overlay and manager register offsets through macros isn't scalable. Introduce a new dispc.h header which contains Macros for common DISPC registers and inline functions for overlay and manager specific registers. Remove usage of struct dispc_reg and use u16 instead. Note: Can be tried on: https://gitorious.org/~boddob/linux-omap-dss2/archit-dss2-clone/commits/master Tested on: 4430sdp and 3430sdp. Archit Taneja (3): OMAP: DSS2: Clean up DISPC overlay register definitions OMAP: DSS2: Clean up DISPC overlay manager register definitions OMAP: DSS2: Remove usage of struct dispc_reg drivers/video/omap2/dss/dispc.c | 1086 +- drivers/video/omap2/dss/dispc.h | 544 2 files changed, 1030 insertions(+), 600 deletions(-) create mode 100644 drivers/video/omap2/dss/dispc.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] OMAP: DSS2: Clean up DISPC overlay register definitions
Move all DISPC register definitions to a new header dispc.h. There are
separate register offset definitions for GFX, VID1 and VID2 pipeline share
register definitions by using an argument. The introduction of VID3 pipeline
on OMAP4 will not let us use the above method since VID3 pipe register offsets
don't map with VID1 and VID2 offsets.
Represent overlay registers as DISPC_OVL_(plane), where the plane argument
tells the overlay. Register offsets are calculated as:
DISPC_OVL_(plane) = DISPC_OVL_BASE(plane) + DISPC__OFFSET(plane)
Idea suggested by Tomi Valkeinen.
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/dispc.c | 884 +--
drivers/video/omap2/dss/dispc.h | 386 +
2 files changed, 771 insertions(+), 499 deletions(-)
create mode 100644 drivers/video/omap2/dss/dispc.h
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 92a1172..127cc32 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -41,95 +41,11 @@
#include dss.h
#include dss_features.h
+#include dispc.h
/* DISPC */
#define DISPC_SZ_REGS SZ_4K
-struct dispc_reg { u16 idx; };
-
-#define DISPC_REG(idx) ((const struct dispc_reg) { idx })
-
-/*
- * DISPC common registers and
- * DISPC channel registers , ch = 0 for LCD, ch = 1 for
- * DIGIT, and ch = 2 for LCD2
- */
-#define DISPC_REVISION DISPC_REG(0x)
-#define DISPC_SYSCONFIGDISPC_REG(0x0010)
-#define DISPC_SYSSTATUSDISPC_REG(0x0014)
-#define DISPC_IRQSTATUSDISPC_REG(0x0018)
-#define DISPC_IRQENABLEDISPC_REG(0x001C)
-#define DISPC_CONTROL DISPC_REG(0x0040)
-#define DISPC_CONTROL2 DISPC_REG(0x0238)
-#define DISPC_CONFIG DISPC_REG(0x0044)
-#define DISPC_CONFIG2 DISPC_REG(0x0620)
-#define DISPC_CAPABLE DISPC_REG(0x0048)
-#define DISPC_DEFAULT_COLOR(ch)DISPC_REG(ch == 0 ? 0x004C : \
- (ch == 1 ? 0x0050 : 0x03AC))
-#define DISPC_TRANS_COLOR(ch) DISPC_REG(ch == 0 ? 0x0054 : \
- (ch == 1 ? 0x0058 : 0x03B0))
-#define DISPC_LINE_STATUS DISPC_REG(0x005C)
-#define DISPC_LINE_NUMBER DISPC_REG(0x0060)
-#define DISPC_TIMING_H(ch) DISPC_REG(ch != 2 ? 0x0064 : 0x0400)
-#define DISPC_TIMING_V(ch) DISPC_REG(ch != 2 ? 0x0068 : 0x0404)
-#define DISPC_POL_FREQ(ch) DISPC_REG(ch != 2 ? 0x006C : 0x0408)
-#define DISPC_DIVISORo(ch) DISPC_REG(ch != 2 ? 0x0070 : 0x040C)
-#define DISPC_GLOBAL_ALPHA DISPC_REG(0x0074)
-#define DISPC_SIZE_DIG DISPC_REG(0x0078)
-#define DISPC_SIZE_LCD(ch) DISPC_REG(ch != 2 ? 0x007C : 0x03CC)
-
-/* DISPC GFX plane */
-#define DISPC_GFX_BA0 DISPC_REG(0x0080)
-#define DISPC_GFX_BA1 DISPC_REG(0x0084)
-#define DISPC_GFX_POSITION DISPC_REG(0x0088)
-#define DISPC_GFX_SIZE DISPC_REG(0x008C)
-#define DISPC_GFX_ATTRIBUTES DISPC_REG(0x00A0)
-#define DISPC_GFX_FIFO_THRESHOLD DISPC_REG(0x00A4)
-#define DISPC_GFX_FIFO_SIZE_STATUS DISPC_REG(0x00A8)
-#define DISPC_GFX_ROW_INC DISPC_REG(0x00AC)
-#define DISPC_GFX_PIXEL_INCDISPC_REG(0x00B0)
-#define DISPC_GFX_WINDOW_SKIP DISPC_REG(0x00B4)
-#define DISPC_GFX_TABLE_BA DISPC_REG(0x00B8)
-
-#define DISPC_DATA_CYCLE1(ch) DISPC_REG(ch != 2 ? 0x01D4 : 0x03C0)
-#define DISPC_DATA_CYCLE2(ch) DISPC_REG(ch != 2 ? 0x01D8 : 0x03C4)
-#define DISPC_DATA_CYCLE3(ch) DISPC_REG(ch != 2 ? 0x01DC : 0x03C8)
-#define DISPC_CPR_COEF_R(ch) DISPC_REG(ch != 2 ? 0x0220 : 0x03BC)
-#define DISPC_CPR_COEF_G(ch) DISPC_REG(ch != 2 ? 0x0224 : 0x03B8)
-#define DISPC_CPR_COEF_B(ch) DISPC_REG(ch != 2 ? 0x0228 : 0x03B4)
-
-#define DISPC_GFX_PRELOAD DISPC_REG(0x022C)
-
-/* DISPC Video plane, n = 0 for VID1 and n = 1 for VID2 */
-#define DISPC_VID_REG(n, idx) DISPC_REG(0x00BC + (n)*0x90 + idx)
-
-#define DISPC_VID_BA0(n) DISPC_VID_REG(n, 0x)
-#define DISPC_VID_BA1(n) DISPC_VID_REG(n, 0x0004)
-#define DISPC_VID_POSITION(n) DISPC_VID_REG(n, 0x0008)
-#define DISPC_VID_SIZE(n) DISPC_VID_REG(n, 0x000C)
-#define DISPC_VID_ATTRIBUTES(n)DISPC_VID_REG(n, 0x0010)
-#define DISPC_VID_FIFO_THRESHOLD(n)DISPC_VID_REG(n, 0x0014)
-#define DISPC_VID_FIFO_SIZE_STATUS(n) DISPC_VID_REG(n, 0x0018)
-#define DISPC_VID_ROW_INC(n) DISPC_VID_REG(n, 0x001C)
-#define DISPC_VID_PIXEL_INC(n) DISPC_VID_REG(n, 0x0020)
-#define DISPC_VID_FIR(n) DISPC_VID_REG(n, 0x0024)
-#define DISPC_VID_PICTURE_SIZE(n)
[PATCH 2/3] OMAP: DSS2: Clean up DISPC overlay manager register definitions
Represent manager/channel specific DISPC registers as inline functions returning
the required dispc_reg struct. This is done since the current method is not
scalable as the number of overlay managers increase in number.
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/dispc.c | 178
drivers/video/omap2/dss/dispc.h | 212 ++-
2 files changed, 276 insertions(+), 114 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 127cc32..d00d2f1 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -136,27 +136,27 @@ void dispc_save_context(void)
SR(IRQENABLE);
SR(CONTROL);
SR(CONFIG);
- SR(DEFAULT_COLOR(0));
- SR(DEFAULT_COLOR(1));
- SR(TRANS_COLOR(0));
- SR(TRANS_COLOR(1));
+ SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD));
+ SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT));
+ SR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD));
+ SR(TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT));
SR(LINE_NUMBER);
- SR(TIMING_H(0));
- SR(TIMING_V(0));
- SR(POL_FREQ(0));
- SR(DIVISORo(0));
+ SR(TIMING_H(OMAP_DSS_CHANNEL_LCD));
+ SR(TIMING_V(OMAP_DSS_CHANNEL_LCD));
+ SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD));
+ SR(DIVISORo(OMAP_DSS_CHANNEL_LCD));
SR(GLOBAL_ALPHA);
- SR(SIZE_DIG);
- SR(SIZE_LCD(0));
+ SR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT));
+ SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_MGR_LCD2)) {
SR(CONTROL2);
- SR(DEFAULT_COLOR(2));
- SR(TRANS_COLOR(2));
- SR(SIZE_LCD(2));
- SR(TIMING_H(2));
- SR(TIMING_V(2));
- SR(POL_FREQ(2));
- SR(DIVISORo(2));
+ SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2));
+ SR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2));
+ SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD2));
+ SR(TIMING_H(OMAP_DSS_CHANNEL_LCD2));
+ SR(TIMING_V(OMAP_DSS_CHANNEL_LCD2));
+ SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD2));
+ SR(DIVISORo(OMAP_DSS_CHANNEL_LCD2));
SR(CONFIG2);
}
@@ -171,21 +171,21 @@ void dispc_save_context(void)
SR(OVL_WINDOW_SKIP(OMAP_DSS_GFX));
SR(OVL_TABLE_BA(OMAP_DSS_GFX));
- SR(DATA_CYCLE1(0));
- SR(DATA_CYCLE2(0));
- SR(DATA_CYCLE3(0));
+ SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD));
+ SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD));
+ SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD));
- SR(CPR_COEF_R(0));
- SR(CPR_COEF_G(0));
- SR(CPR_COEF_B(0));
+ SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD));
+ SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD));
+ SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_MGR_LCD2)) {
- SR(CPR_COEF_B(2));
- SR(CPR_COEF_G(2));
- SR(CPR_COEF_R(2));
+ SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2));
+ SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2));
+ SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2));
- SR(DATA_CYCLE1(2));
- SR(DATA_CYCLE2(2));
- SR(DATA_CYCLE3(2));
+ SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2));
+ SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2));
+ SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2));
}
SR(OVL_PRELOAD(OMAP_DSS_GFX));
@@ -298,26 +298,26 @@ void dispc_restore_context(void)
/*RR(IRQENABLE);*/
/*RR(CONTROL);*/
RR(CONFIG);
- RR(DEFAULT_COLOR(0));
- RR(DEFAULT_COLOR(1));
- RR(TRANS_COLOR(0));
- RR(TRANS_COLOR(1));
+ RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD));
+ RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT));
+ RR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD));
+ RR(TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT));
RR(LINE_NUMBER);
- RR(TIMING_H(0));
- RR(TIMING_V(0));
- RR(POL_FREQ(0));
- RR(DIVISORo(0));
+ RR(TIMING_H(OMAP_DSS_CHANNEL_LCD));
+ RR(TIMING_V(OMAP_DSS_CHANNEL_LCD));
+ RR(POL_FREQ(OMAP_DSS_CHANNEL_LCD));
+ RR(DIVISORo(OMAP_DSS_CHANNEL_LCD));
RR(GLOBAL_ALPHA);
- RR(SIZE_DIG);
- RR(SIZE_LCD(0));
+ RR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT));
+ RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_MGR_LCD2)) {
- RR(DEFAULT_COLOR(2));
- RR(TRANS_COLOR(2));
- RR(SIZE_LCD(2));
- RR(TIMING_H(2));
- RR(TIMING_V(2));
- RR(POL_FREQ(2));
- RR(DIVISORo(2));
+ RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2));
+ RR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2));
+ RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD2));
+ RR(TIMING_H(OMAP_DSS_CHANNEL_LCD2));
+ RR(TIMING_V(OMAP_DSS_CHANNEL_LCD2));
+
[PATCH 3/3] OMAP: DSS2: Remove usage of struct dispc_reg
struct dispc_reg was originally used while migrating from old omapfb to
catch cases where the arguments to dispc_read_reg/dispc_write_reg were in
wrong order, since old omapfb had the arguments in reverse order.
Remove this struct and use u16 instead
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/video/omap2/dss/dispc.c | 12 ++--
drivers/video/omap2/dss/dispc.h | 156 +++
2 files changed, 82 insertions(+), 86 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index d00d2f1..5d58b5c 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -112,20 +112,20 @@ static struct {
static void _omap_dispc_set_irqs(void);
-static inline void dispc_write_reg(const struct dispc_reg idx, u32 val)
+static inline void dispc_write_reg(const u16 idx, u32 val)
{
- __raw_writel(val, dispc.base + idx.idx);
+ __raw_writel(val, dispc.base + idx);
}
-static inline u32 dispc_read_reg(const struct dispc_reg idx)
+static inline u32 dispc_read_reg(const u16 idx)
{
- return __raw_readl(dispc.base + idx.idx);
+ return __raw_readl(dispc.base + idx);
}
#define SR(reg) \
- dispc.ctx[(DISPC_##reg).idx / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
+ dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
#define RR(reg) \
- dispc_write_reg(DISPC_##reg, dispc.ctx[(DISPC_##reg).idx / sizeof(u32)])
+ dispc_write_reg(DISPC_##reg, dispc.ctx[DISPC_##reg / sizeof(u32)])
void dispc_save_context(void)
{
diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h
index 05e5662..d45f010 100644
--- a/drivers/video/omap2/dss/dispc.h
+++ b/drivers/video/omap2/dss/dispc.h
@@ -21,247 +21,243 @@
#ifndef __OMAP2_DISPC_REG_H
#define __OMAP2_DISPC_REG_H
-struct dispc_reg { u16 idx; };
-
-#define DISPC_REG(idx) ((const struct dispc_reg) { idx })
-
/* DISPC common registers */
-#define DISPC_REVISION DISPC_REG(0x)
-#define DISPC_SYSCONFIGDISPC_REG(0x0010)
-#define DISPC_SYSSTATUSDISPC_REG(0x0014)
-#define DISPC_IRQSTATUSDISPC_REG(0x0018)
-#define DISPC_IRQENABLEDISPC_REG(0x001C)
-#define DISPC_CONTROL DISPC_REG(0x0040)
-#define DISPC_CONFIG DISPC_REG(0x0044)
-#define DISPC_CAPABLE DISPC_REG(0x0048)
-#define DISPC_LINE_STATUS DISPC_REG(0x005C)
-#define DISPC_LINE_NUMBER DISPC_REG(0x0060)
-#define DISPC_GLOBAL_ALPHA DISPC_REG(0x0074)
-#define DISPC_CONTROL2 DISPC_REG(0x0238)
-#define DISPC_CONFIG2 DISPC_REG(0x0620)
-#define DISPC_DIVISOR DISPC_REG(0x0804)
+#define DISPC_REVISION 0x
+#define DISPC_SYSCONFIG0x0010
+#define DISPC_SYSSTATUS0x0014
+#define DISPC_IRQSTATUS0x0018
+#define DISPC_IRQENABLE0x001C
+#define DISPC_CONTROL 0x0040
+#define DISPC_CONFIG 0x0044
+#define DISPC_CAPABLE 0x0048
+#define DISPC_LINE_STATUS 0x005C
+#define DISPC_LINE_NUMBER 0x0060
+#define DISPC_GLOBAL_ALPHA 0x0074
+#define DISPC_CONTROL2 0x0238
+#define DISPC_CONFIG2 0x0620
+#define DISPC_DIVISOR 0x0804
/* DISPC overlay registers */
-#define DISPC_OVL_BA0(n) DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \
DISPC_BA0_OFFSET(n))
-#define DISPC_OVL_BA1(n) DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_BA1(n) (DISPC_OVL_BASE(n) + \
DISPC_BA1_OFFSET(n))
-#define DISPC_OVL_POSITION(n) DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_POSITION(n) (DISPC_OVL_BASE(n) + \
DISPC_POS_OFFSET(n))
-#define DISPC_OVL_SIZE(n) DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_SIZE(n) (DISPC_OVL_BASE(n) + \
DISPC_SIZE_OFFSET(n))
-#define DISPC_OVL_ATTRIBUTES(n)DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_ATTRIBUTES(n)(DISPC_OVL_BASE(n) + \
DISPC_ATTR_OFFSET(n))
-#define DISPC_OVL_FIFO_THRESHOLD(n)DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_FIFO_THRESHOLD(n)(DISPC_OVL_BASE(n) + \
DISPC_FIFO_THRESH_OFFSET(n))
-#define DISPC_OVL_FIFO_SIZE_STATUS(n) DISPC_REG(DISPC_OVL_BASE(n) + \
+#define DISPC_OVL_FIFO_SIZE_STATUS(n) (DISPC_OVL_BASE(n) + \
DISPC_FIFO_SIZE_STATUS_OFFSET(n))
-#define DISPC_OVL_ROW_INC(n)
Re: [PATCH 1/8] OMAP PM: create a PM layer plugin for per-device constraints
* Tony Lindgren t...@atomide.com [110505 08:56]: So the problem is patches 1 8 in this series. The rest is just fine as it's the necessary omap hardware specific implementation. Sorry, patches 1 7 I mean. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/22] OMAP: sDMA: descriptor autoloading feature
Hi, * Adrian Hunter adrian.hun...@nokia.com [110505 14:48]: From: Venkatraman S svenk...@ti.com Add sDMA driver support for descriptor autoloading feature. Descriptor autoloading is OMAP sDMA v5 hardware capability that can be exploited for scatter gather scenarios, currently available in OMAP3630 and OMAP4430. I think we should not add this feature until after we've converted omap DMA to use the common dmaengine for the basic features. Adding this will make it harder for us to do the converions. Can you please separate out the DMA descriptor autoloading patches? Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] omap: fix build when MTD_NAND_OMAP2 and TOUCHSCREEN_ADS7846 are disabled
* Oleg Drokin gr...@linuxhacker.ru [110504 08:59]: Hello! On May 4, 2011, at 9:27 AM, Mike Rapoport wrote: Commits 5e6a64b36ce346b7a2d481ef9fa315290eb28e5e (omap: move detection of NAND CS to common-board-devices) and 96974a249b0cf3537f49115a59be67e2c54f315c (omap: consolidate touch screen initialization among different boards) break compilation when CONFIG_MTD_NAND_OMAP2 and CONFIG_TOUCHSCREEN_ADS7846 are not selected. Removing ifdefs and stubs from common-board-devices.h fixes the problem. Works for me. We should not build in code unnecessarily unless the boards has ads7847. Many boards don't have it. So how about do the ifdef optimization for ads7846_spi_board_info and omap_ads7846_init in common-board-devices.c? That keeps the header clean and the we have all the code in one place in a way where it's optimized out if not selected. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] omap : nand : fix subpage ecc issue with prefetch
On Fri, May 6, 2011 at 12:18 AM, Artem Bityutskiy dedeki...@gmail.com wrote: On Mon, 2011-05-02 at 16:40 +0530, Kishore Kadiyala wrote: For prefetch engine, read and write got broken in commit '2c01946c'. We never hit a scenario of not getting 'gpmc_prefetch_enable' call success. When reading/writing a subpage with a non divisible by 4 ecc number of bytes, the mis-aligned bytes gets handled first before enabling the Prefetch engine, then it reads/writes rest of the bytes. Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com Signed-off-by: Vimal Singh vimal.neww...@gmail.com Reported-by: Bryan DE FARIA bdefa...@adeneo-embedded.com This needs a better commit message with more explanation and analysis of the problem and how it was fixed.This commit message is not very understandable. And then it needs also: How about a commit log like this: When reading/writing a subpage (When HW ECC is not available/enable) for number of bytes not aligned to 4, the mis-aligned bytes gets handled first (by cpu copy mathod) before enabling the Prefetch engin to/from 'p' (start of buffer 'buf'). Then it reads/writes rest of the bytes with the help of Prefetch engine, if available, or again by cpu copy mathod. Currnetly, reading/writing of rest of bytes, is not done correctly. Its trying to read/write again to/from begining of buffer 'buf', overwriting the mis-aligned bytes. For prefetch engine read and write it got broken in commit '2c01946c'. And we never hit the scenario of not getting 'gpmc_prefetch_enable' call sucess. So, problem did not get caught up. This patch fixes the issue. Cc: sta...@kernel.org [2.6.36+] Right? And then we could send it upstream. Yes, sure. I think kishore can take care of adding this in 'cc' while posting next time. -- Regards, Vimal Singh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Common clock and dvfs
On Fri, May 6, 2011 at 6:08 AM, Cousson, Benoit b-cous...@ti.com wrote: [] Devices will indeed never care about voltage directly, but that will happen indirectly because of: - voltage domains dependency: Changing the MPU or IVA voltage domain might force the CORE voltage to increase its voltage due to HW limitation. We cannot have the CPU at 1GHz while the interconnect is at the lowest OPP. - voltage domain increase due to one device frequency increase might force the other voltage domain devices to increase their frequency. - Thermal management might be a good example as well, but in general changing the main contributors frequency (MPU, GPU) should be enough. In both cases, the indirect voltage change will trigger potentially frequency change. vdd1 -- vdd2 | | ++ ++ | | | | devA devB devC devD With such partitioning, an increase of devA OPP, will increase vdd1 that will trigger an increase of vdd2 that will then broadcast to devices that belong to it. devC and devD might or not increase their frequency to reduce the energy consumption. Any devices like processors that can run fast and idle must run at the max frequency allowed by the current voltage. As long as the voltage change in vdd1, which changes vdd2 (vdd1 and 2 are consumers of the same regulator, right?), can update OPP entries related (enable/disable entries), devfreq can handle this. If the clocks and devices (A~D) related are using devfreq, disabling, enabling, and adding OPPs will instantly affect devfreq and adjust clock frequency based on the enabled OPP entries only. Thus, if a module is increasing the voltage, it just needs to disable some low-voltage OPP entries although some set_min/max APIs mentioned by Colin will be more useful. -- MyungJoo Ham (함명주), Ph.D. Mobile Software Platform Lab, Digital Media and Communications (DMC) Business Samsung Electronics cell: 82-10-6714-2858 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 08/22] mmc: omap_hsmmc: correct debug report error status mnemonics
On Thu, May 5, 2011 at 5:21 PM, Adrian Hunter adrian.hun...@nokia.com wrote:
CERR and BADA were in the wrong place and there are only
32 not 35.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 19 +++
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index bd52849..a1a1101 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -982,14 +982,14 @@ static void omap_hsmmc_dma_cleanup(struct
omap_hsmmc_host *host, int errno)
* Readable error output
*/
#ifdef CONFIG_MMC_DEBUG
-static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status)
+static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32
status)
{
/* --- means reserved bit without definition at documentation */
static const char *omap_hsmmc_status_bits[] = {
- CC, TC, BGE, ---, BWR, BRR, ---, ---, CIRQ,
- OBI, ---, ---, ---, ---, ---, ERRI, CTO,
CCRC,
- CEB, CIE, DTO, DCRC, DEB, ---, ACE, ---,
- ---, ---, ---, CERR, CERR, BADA, ---, ---,
---
+ CC , TC , BGE, ---, BWR , BRR , --- , --- ,
+ CIRQ, OBI , ---, ---, --- , --- , --- , ERRI,
+ CTO , CCRC, CEB, CIE, DTO , DCRC, DEB , --- ,
+ ACE , --- , ---, ---, CERR, BADA, --- , ---
};
char res[256];
char *buf = res;
@@ -1006,6 +1006,11 @@ static void omap_hsmmc_report_irq(struct
omap_hsmmc_host *host, u32 status)
dev_dbg(mmc_dev(host-mmc), %s\n, res);
}
+#else
+static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host,
+ u32 status)
+{
+}
#endif /* CONFIG_MMC_DEBUG */
/*
@@ -1064,9 +1069,7 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host
*host, int status)
dev_dbg(mmc_dev(host-mmc), IRQ Status is %x\n, status);
if (status ERR) {
-#ifdef CONFIG_MMC_DEBUG
- omap_hsmmc_report_irq(host, status);
-#endif
+ omap_hsmmc_dbg_report_irq(host, status);
if ((status CMD_TIMEOUT) ||
(status CMD_CRC)) {
if (host-cmd) {
--
1.7.0.4
I checked against the TRM and you are right.
FWIW,
Reviewed-by: Venkatraman S svenk...@ti.com
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[RFC/PATCH] OMAP PM: remove OMAP_PM_NONE config option
The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet j-pi...@ti.com --- arch/arm/plat-omap/Kconfig|3 --- arch/arm/plat-omap/include/plat/omap-pm.h |8 2 files changed, 0 insertions(+), 11 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index cd5f993..16e3293 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -209,9 +209,6 @@ choice depends on ARCH_OMAP default OMAP_PM_NOOP -config OMAP_PM_NONE - bool No PM layer - config OMAP_PM_NOOP bool No-op/debug PM layer diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index c0a7520..0840df8 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h @@ -40,11 +40,7 @@ * framework starts. The _if_ is to avoid name collisions with the * PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_early_init() 0 -#else int __init omap_pm_if_early_init(void); -#endif /** * omap_pm_if_init - OMAP PM init code called after clock fw init @@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); * The main initialization code. OPP tables are passed in here. The * _if_ is to avoid name collisions with the PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_init() 0 -#else int __init omap_pm_if_init(void); -#endif /** * omap_pm_if_exit - OMAP PM exit code -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC/PATCH] OMAP PM: remove OMAP_PM_NONE config option
Please note that this code is based on khilman's for_2.6.40/pm-cleanup branch. Jean On Fri, May 6, 2011 at 11:11 AM, Jean Pihet jean.pi...@newoldbits.com wrote: The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet j-pi...@ti.com --- arch/arm/plat-omap/Kconfig | 3 --- arch/arm/plat-omap/include/plat/omap-pm.h | 8 2 files changed, 0 insertions(+), 11 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index cd5f993..16e3293 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -209,9 +209,6 @@ choice depends on ARCH_OMAP default OMAP_PM_NOOP -config OMAP_PM_NONE - bool No PM layer - config OMAP_PM_NOOP bool No-op/debug PM layer diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h index c0a7520..0840df8 100644 --- a/arch/arm/plat-omap/include/plat/omap-pm.h +++ b/arch/arm/plat-omap/include/plat/omap-pm.h @@ -40,11 +40,7 @@ * framework starts. The _if_ is to avoid name collisions with the * PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_early_init() 0 -#else int __init omap_pm_if_early_init(void); -#endif /** * omap_pm_if_init - OMAP PM init code called after clock fw init @@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); * The main initialization code. OPP tables are passed in here. The * _if_ is to avoid name collisions with the PM idle-loop code. */ -#ifdef CONFIG_OMAP_PM_NONE -#define omap_pm_if_init() 0 -#else int __init omap_pm_if_init(void); -#endif /** * omap_pm_if_exit - OMAP PM exit code -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 10/16] OMAP: board-rm680: set MMC nomux flag
Let the bootloader do all the pad configuration.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap2/board-rm680.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rm680.c
b/arch/arm/mach-omap2/board-rm680.c
index 42d10b1..c4e821f 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -116,6 +116,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED,
.gpio_cd= -EINVAL,
.gpio_wp= -EINVAL,
+ .nomux = true,
},
{ /* Terminator */ }
};
--
1.7.0.4
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[PATCH V2 11/16] mmc: omap_hsmmc: ensure pbias configuration is always done
Go through the driver's set_power() functions rather than
calling regulator_enable/disable() directly because otherwise
pbias configuration for MMC1 is not done.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 4f6e552..8aa9440 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -445,15 +445,14 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host
*host)
* framework is fixed, we need a workaround like this
* (which is safe for MMC, but not in general).
*/
- if (regulator_is_enabled(host-vcc) 0) {
- regulator_enable(host-vcc);
- regulator_disable(host-vcc);
- }
- if (host-vcc_aux) {
- if (regulator_is_enabled(reg) 0) {
- regulator_enable(reg);
- regulator_disable(reg);
- }
+ if (regulator_is_enabled(host-vcc) 0 ||
+ (host-vcc_aux regulator_is_enabled(host-vcc_aux))) {
+ int vdd = ffs(mmc_slot(host).ocr_mask) - 1;
+
+ mmc_slot(host).set_power(host-dev, host-slot_id,
+1, vdd);
+ mmc_slot(host).set_power(host-dev, host-slot_id,
+0, 0);
}
}
--
1.7.0.4
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[PATCH V2 04/16] mmc: omap_hsmmc: reduce a bit the error handlers in probe()
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 17 ++---
1 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index c8aab47..3121293 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -2119,18 +2119,11 @@ static int __init omap_hsmmc_probe(struct
platform_device *pdev)
/* we start off in DISABLED state */
host-dpm_state = DISABLED;
- if (clk_enable(host-iclk) != 0) {
- clk_put(host-iclk);
- clk_put(host-fclk);
- goto err1;
- }
+ if (clk_enable(host-iclk) != 0)
+ goto err2;
- if (mmc_host_enable(host-mmc) != 0) {
- clk_disable(host-iclk);
- clk_put(host-iclk);
- clk_put(host-fclk);
- goto err1;
- }
+ if (mmc_host_enable(host-mmc) != 0)
+ goto err3;
if (cpu_is_omap2430()) {
host-dbclk = clk_get(pdev-dev, mmchsdb_fck);
@@ -2275,7 +2268,9 @@ err_irq_cd_init:
free_irq(host-irq, host);
err_irq:
mmc_host_disable(host-mmc);
+err3:
clk_disable(host-iclk);
+err2:
clk_put(host-fclk);
clk_put(host-iclk);
if (host-got_dbclk) {
--
1.7.0.4
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[PATCH V2 12/16] mmc: omap_hsmmc: fix oops in omap_hsmmc_dma_cb
In the case of an I/O error, the DMA will have been
cleaned up in the MMC interrupt and the request
structure pointer will be null.
In that case, it is essential to check if the DMA
DMA is over before dereferencing host-mrq-data.
Oops as follows:
3[ 2293.695281] wl1271: ERROR sdio read failed (-110)
1[ 2293.695739] Unable to handle kernel NULL pointer dereference at virtual
address 0004
1[ 2293.703094] pgd = b0004000
1[ 2293.705780] [0004] *pgd=
0[ 2293.709381] Internal error: Oops: 17 [#1] PREEMPT
0[ 2293.714080] last sysfs file:
/sys/devices/platform/omapdss/manager0/cpr_enable
4[ 2293.721313] Modules linked in: ext2 dm_crypt xt_NFLOG xt_rateest
xt_RATEEST xt_condition iptable_filter ip_tables dm_mod xt_IDLETIMER
nfnetlink_log nfnetlink as3645a ad58xx smiapp smiapp_power omap3_isp iovmm
omap3_iommu iommu2 iommu wl12xx_spi bnep omaplfb bridgedriver g_file_storage
cmt_speech ssi_protocol phonet hsi_char wl12xx_sdio wl12xx pvrsrvkm omap_ssi
mailbox_mach vibra_spi radio_wl1273 mailbox bcm4751_gps lis3lv02d_i2c ak8975
lis3lv02d leds_lp5521 apds990x pn544 rtc_twl4030 twl4030_keypad
twl4030_pwrbutton cmt twl5031_aci hci_h4p
4[ 2293.769287] CPU: 0Not tainted (2.6.32.36-dfl61-20111603 #1)
4[ 2293.775329] PC is at omap_hsmmc_dma_cb+0x18/0x140
4[ 2293.780029] LR is at omap2_dma_irq_handler+0x244/0x28c
4[ 2293.785156] pc : [b024e180]lr : [b0049ed0]psr: a1d3
4[ 2293.785186] sp : edfb3c48 ip : edfb3bf8 fp : edfb3d3c
4[ 2293.796661] r10: fa05632c r9 : fa056000 r8 : ee4889c0
4[ 2293.801910] r7 : 0020 r6 : 0001 r5 : edfb2000 r4 : ee53e1c0
4[ 2293.808441] r3 : r2 : edfb3c48 r1 : 0020 r0 : 0007
4[ 2293.814971] Flags: NzCv IRQs off FIQs off Mode SVC_32 ISA ARM
Segment kernel
4[ 2293.822479] Control: 10c5387d Table: bc9f4019 DAC: 0017
0[ 2293.828247] Process phy0 (pid: 313, stack limit = 0xedfb22e8)
0[ 2293.833984] Stack: (0xedfb3c48 to 0xedfb4000)
...
4[ 2294.084320] [b024e180] (omap_hsmmc_dma_cb+0x18/0x140) from [b0049ed0]
(omap2_dma_irq_handler+0x244/0x28c)
4[ 2294.094268] [b0049ed0] (omap2_dma_irq_handler+0x244/0x28c) from
[b0093d44] (handle_IRQ_event+0x34/0xf0)
4[ 2294.104034] [b0093d44] (handle_IRQ_event+0x34/0xf0) from [b0095bec]
(handle_level_irq+0xcc/0x170)
4[ 2294.113250] [b0095bec] (handle_level_irq+0xcc/0x170) from [b002c068]
(asm_do_IRQ+0x68/0x84)
4[ 2294.121978] [b002c068] (asm_do_IRQ+0x68/0x84) from [b002ca84]
(__irq_svc+0x44/0xa8)
4[ 2294.129974] Exception stack(0xedfb3cc0 to 0xedfb3d08)
4[ 2294.135040] 3cc0: 0021d5cd 3d20cc2d 0002 edf7dd40 edfb2000
edf7dee8 edf7ddd8
4[ 2294.143249] 3ce0: 0001 ee516080 edfb3d3c b04880b8 edfb3d08
b0059e5c b0344184
4[ 2294.151428] 3d00: 0053
4[ 2294.154968] [b002ca84] (__irq_svc+0x44/0xa8) from [b0344184]
(schedule+0x248/0x3a8)
4[ 2294.162963] [b0344184] (schedule+0x248/0x3a8) from [b03448ac]
(schedule_timeout+0x1c/0x224)
4[ 2294.171691] [b03448ac] (schedule_timeout+0x1c/0x224) from [b0344738]
(wait_for_common+0xe8/0x1a8)
4[ 2294.180938] [b0344738] (wait_for_common+0xe8/0x1a8) from [b02459f8]
(mmc_wait_for_req+0x110/0x120)
4[ 2294.190277] [b02459f8] (mmc_wait_for_req+0x110/0x120) from [b0249bac]
(mmc_io_rw_extended+0x178/0x1e0)
4[ 2294.199951] [b0249bac] (mmc_io_rw_extended+0x178/0x1e0) from
[b024ab54] (sdio_io_rw_ext_helper+0x164/0x190)
4[ 2294.210052] [b024ab54] (sdio_io_rw_ext_helper+0x164/0x190) from
[b024aba0] (sdio_writesb+0x20/0x24)
4[ 2294.219512] [b024aba0] (sdio_writesb+0x20/0x24) from [af0d50e0]
(wl1271_sdio_raw_write+0x64/0xa4 [wl12xx_sdio])
4[ 2294.230041] [af0d50e0] (wl1271_sdio_raw_write+0x64/0xa4 [wl12xx_sdio])
from [af0bd4bc] (wl1271_tx_work_locked+0x548/0x5fc [wl12xx])
4[ 2294.242218] [af0bd4bc] (wl1271_tx_work_locked+0x548/0x5fc [wl12xx])
from [af0ba944] (wl1271_irq_work+0x230/0x314 [wl12xx])
4[ 2294.253631] [af0ba944] (wl1271_irq_work+0x230/0x314 [wl12xx]) from
[b00725ac] (worker_thread+0x174/0x224)
4[ 2294.263519] [b00725ac] (worker_thread+0x174/0x224) from [b0075bac]
(kthread+0x7c/0x84)
4[ 2294.271820] [b0075bac] (kthread+0x7c/0x84) from [b002d950]
(kernel_thread_exit+0x0/0x8)
0[ 2294.280181] Code: e5923008 e1a0200d e3c25d7f e3c5503f (e5936004)
4[ 2294.286529] ---[ end trace e8fb05c679bd87ff ]---
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 8aa9440..ee57b9b 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1364,7 +1364,7 @@ static void omap_hsmmc_config_dma_params(struct
omap_hsmmc_host *host,
static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data)
{
struct omap_hsmmc_host *host = cb_data;
- struct mmc_data *data = host-mrq-data;
+ struct mmc_data *data;
int dma_ch, req_in_progress;
if (!(ch_status OMAP_DMA_BLOCK_IRQ)) {
@@ -1379,6 +1379,7 @@ static void
[PATCH V2 07/16] mmc: omap_hsmmc: fix few bugs when set the clock divisor
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
There are two pieces of code which similar, but not the same. Each of them
contains a bug.
The SYSCTL register should be read before write in the
omap_hsmmc_context_restore() to remain the state of the reserved bits.
Before set the clock divisor and DTO bits the value from the SYSCTL register
should be masked properly. We were lucky to have no problems with DTO bits. So,
make sure we have clear DTO bits properly in the omap_hsmmc_set_ios().
Additionally get rid of msleep(1). The actual time rare higher than 30us on
OMAP 3630.
The result pieces of code are split to omap_hsmmc_set_clock() function.
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 59 +++-
1 files changed, 28 insertions(+), 31 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 915d08b..dd0d9d5 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -607,6 +607,32 @@ static u16 calc_divisor(struct mmc_ios *ios)
return dsor;
}
+static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
+{
+ struct mmc_ios *ios = host-mmc-ios;
+ unsigned long regval;
+ unsigned long timeout;
+
+ dev_dbg(mmc_dev(host-mmc), Set clock to %uHz\n, ios-clock);
+
+ omap_hsmmc_stop_clock(host);
+
+ regval = OMAP_HSMMC_READ(host-base, SYSCTL);
+ regval = regval ~(CLKD_MASK | DTO_MASK);
+ regval = regval | (calc_divisor(ios) 6) | (DTO 16);
+ OMAP_HSMMC_WRITE(host-base, SYSCTL, regval);
+ OMAP_HSMMC_WRITE(host-base, SYSCTL,
+ OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
+
+ /* Wait till the ICS bit is set */
+ timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
+ while ((OMAP_HSMMC_READ(host-base, SYSCTL) ICS) != ICS
+time_before(jiffies, timeout))
+ cpu_relax();
+
+ omap_hsmmc_start_clock(host);
+}
+
#ifdef CONFIG_PM
/*
@@ -697,19 +723,7 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
break;
}
- omap_hsmmc_stop_clock(host);
-
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- (calc_divisor(ios) 6) | (DTO 16));
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
-
- timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
- while ((OMAP_HSMMC_READ(host-base, SYSCTL) ICS) != ICS
-time_before(jiffies, timeout))
- ;
-
- omap_hsmmc_start_clock(host);
+ omap_hsmmc_set_clock(host);
con = OMAP_HSMMC_READ(host-base, CON);
if (ios-bus_mode == MMC_BUSMODE_OPENDRAIN)
@@ -1540,8 +1554,6 @@ static void omap_hsmmc_request(struct mmc_host *mmc,
struct mmc_request *req)
static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct omap_hsmmc_host *host = mmc_priv(mmc);
- unsigned long regval;
- unsigned long timeout;
u32 con;
int do_send_init_stream = 0;
@@ -1603,22 +1615,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
}
}
- omap_hsmmc_stop_clock(host);
-
- regval = OMAP_HSMMC_READ(host-base, SYSCTL);
- regval = regval ~(CLKD_MASK);
- regval = regval | (calc_divisor(ios) 6) | (DTO 16);
- OMAP_HSMMC_WRITE(host-base, SYSCTL, regval);
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
-
- /* Wait till the ICS bit is set */
- timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
- while ((OMAP_HSMMC_READ(host-base, SYSCTL) ICS) != ICS
-time_before(jiffies, timeout))
- msleep(1);
-
- omap_hsmmc_start_clock(host);
+ omap_hsmmc_set_clock(host);
if (do_send_init_stream)
send_init_stream(host);
--
1.7.0.4
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[PATCH V2 05/16] mmc: omap_hsmmc: split duplicate code to calc_divisor() function
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
There are two places where the same calculations are done. Let's split them to
separate function.
In addition the new function is simplified by usage DIV_ROUND_UP kernel macro.
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 45
1 files changed, 18 insertions(+), 27 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 3121293..af2dbd3 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -584,6 +584,20 @@ static void omap_hsmmc_disable_irq(struct omap_hsmmc_host
*host)
OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
}
+/* Calculate divisor for the given clock frequency */
+static u16 calc_divisor(struct mmc_ios *ios)
+{
+ u16 dsor = 0;
+
+ if (ios-clock) {
+ dsor = DIV_ROUND_UP(OMAP_MMC_MASTER_CLOCK, ios-clock);
+ if (dsor 250)
+ dsor = 250;
+ }
+
+ return dsor;
+}
+
#ifdef CONFIG_PM
/*
@@ -596,7 +610,6 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
struct omap_mmc_platform_data *pdata = host-pdata;
int context_loss = 0;
u32 hctl, capa, con;
- u16 dsor = 0;
unsigned long timeout;
if (pdata-get_context_loss_count) {
@@ -675,21 +688,10 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
break;
}
- if (ios-clock) {
- dsor = OMAP_MMC_MASTER_CLOCK / ios-clock;
- if (dsor 1)
- dsor = 1;
-
- if (OMAP_MMC_MASTER_CLOCK / dsor ios-clock)
- dsor++;
-
- if (dsor 250)
- dsor = 250;
- }
-
OMAP_HSMMC_WRITE(host-base, SYSCTL,
OMAP_HSMMC_READ(host-base, SYSCTL) ~CEN);
- OMAP_HSMMC_WRITE(host-base, SYSCTL, (dsor 6) | (DTO 16));
+ OMAP_HSMMC_WRITE(host-base, SYSCTL,
+ (calc_divisor(ios) 6) | (DTO 16));
OMAP_HSMMC_WRITE(host-base, SYSCTL,
OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
@@ -1530,7 +1532,6 @@ static void omap_hsmmc_request(struct mmc_host *mmc,
struct mmc_request *req)
static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct omap_hsmmc_host *host = mmc_priv(mmc);
- u16 dsor = 0;
unsigned long regval;
unsigned long timeout;
u32 con;
@@ -1594,21 +1595,11 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
}
}
- if (ios-clock) {
- dsor = OMAP_MMC_MASTER_CLOCK / ios-clock;
- if (dsor 1)
- dsor = 1;
-
- if (OMAP_MMC_MASTER_CLOCK / dsor ios-clock)
- dsor++;
-
- if (dsor 250)
- dsor = 250;
- }
omap_hsmmc_stop_clock(host);
+
regval = OMAP_HSMMC_READ(host-base, SYSCTL);
regval = regval ~(CLKD_MASK);
- regval = regval | (dsor 6) | (DTO 16);
+ regval = regval | (calc_divisor(ios) 6) | (DTO 16);
OMAP_HSMMC_WRITE(host-base, SYSCTL, regval);
OMAP_HSMMC_WRITE(host-base, SYSCTL,
OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
--
1.7.0.4
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[PATCH V2 06/16] mmc: omap_hsmmc: introduce start_clock and re-use stop_clock
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
There is similar piece of code in two functions which enables clock. Split this
code to omap_hsmmc_start_clock(). Re-use omap_hsmmc_stop_clock() in
omap_hsmmc_context_restore() as well.
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index af2dbd3..915d08b 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -548,6 +548,15 @@ static void omap_hsmmc_gpio_free(struct
omap_mmc_platform_data *pdata)
}
/*
+ * Start clock to the card
+ */
+static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host)
+{
+ OMAP_HSMMC_WRITE(host-base, SYSCTL,
+ OMAP_HSMMC_READ(host-base, SYSCTL) | CEN);
+}
+
+/*
* Stop clock to the card
*/
static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
@@ -688,8 +697,8 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
break;
}
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- OMAP_HSMMC_READ(host-base, SYSCTL) ~CEN);
+ omap_hsmmc_stop_clock(host);
+
OMAP_HSMMC_WRITE(host-base, SYSCTL,
(calc_divisor(ios) 6) | (DTO 16));
OMAP_HSMMC_WRITE(host-base, SYSCTL,
@@ -700,8 +709,7 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
time_before(jiffies, timeout))
;
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- OMAP_HSMMC_READ(host-base, SYSCTL) | CEN);
+ omap_hsmmc_start_clock(host);
con = OMAP_HSMMC_READ(host-base, CON);
if (ios-bus_mode == MMC_BUSMODE_OPENDRAIN)
@@ -1610,8 +1618,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
time_before(jiffies, timeout))
msleep(1);
- OMAP_HSMMC_WRITE(host-base, SYSCTL,
- OMAP_HSMMC_READ(host-base, SYSCTL) | CEN);
+ omap_hsmmc_start_clock(host);
if (do_send_init_stream)
send_init_stream(host);
--
1.7.0.4
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[PATCH V2 00/16] omap_hsmmc patches
Hi
Here is V2 of some patches for omap_hsmmc.
Changes in V2:
OMAP: sDMA: descriptor autoloading feature
- removed the feature entirely as per Tony Lindgren
mmc: omap_hsmmc: fix few bugs when set the clock divisor
- added cpu_relax() as per Grazvydas Ignotas
mmc: omap_hsmmc: fix missing mmc_release_host() in no_off case
- removed {} as per Sergei Shtylyov
OMAP: hsmmc: implement clock switcher
- changed to = threshold as per Grazvydas Ignotas
Adrian Hunter (6):
mmc: omap_hsmmc: correct debug report error status mnemonics
OMAP: board-rm680: set MMC nomux flag
mmc: omap_hsmmc: ensure pbias configuration is always done
mmc: omap_hsmmc: fix oops in omap_hsmmc_dma_cb
OMAP: hsmmc: add platform data for eMMC hardware reset gpio
mmc: omap_hsmmc: add a hardware reset before initialization
Andy Shevchenko (8):
mmc: omap_hsmmc: move hardcoded frequency constants to definition block
mmc: omap_hsmmc: reduce a bit the error handlers in probe()
mmc: omap_hsmmc: split duplicate code to calc_divisor() function
mmc: omap_hsmmc: introduce start_clock and re-use stop_clock
mmc: omap_hsmmc: fix few bugs when set the clock divisor
mmc: omap_hsmmc: split same pieces of code to separate functions
OMAP: hsmmc: implement clock switcher
mmc: omap_hsmmc: adjust host controller clock in regard to current OPP
Jarkko Lavinen (1):
OMAP: hsmmc: Do not mux the slot if non default muxing is already done
Sudhir Bera (1):
mmc: omap_hsmmc: fix missing mmc_release_host() in no_off case
arch/arm/mach-omap2/board-rm680.c |1 +
arch/arm/mach-omap2/hsmmc.c | 188 +-
arch/arm/mach-omap2/hsmmc.h |2 +
arch/arm/plat-omap/include/plat/mmc.h |9 +
drivers/mmc/host/omap_hsmmc.c | 353 -
5 files changed, 414 insertions(+), 139 deletions(-)
Regards
Adrian
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[PATCH V2 02/16] mmc: omap_hsmmc: correct debug report error status mnemonics
CERR and BADA were in the wrong place and there are only
32 not 35.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
Reviewed-by: Venkatraman S svenk...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 19 +++
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 73faaec..0fed8eb 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -970,14 +970,14 @@ static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host
*host, int errno)
* Readable error output
*/
#ifdef CONFIG_MMC_DEBUG
-static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status)
+static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status)
{
/* --- means reserved bit without definition at documentation */
static const char *omap_hsmmc_status_bits[] = {
- CC, TC, BGE, ---, BWR, BRR, ---, ---, CIRQ,
- OBI, ---, ---, ---, ---, ---, ERRI, CTO, CCRC,
- CEB, CIE, DTO, DCRC, DEB, ---, ACE, ---,
- ---, ---, ---, CERR, CERR, BADA, ---, ---, ---
+ CC , TC , BGE, ---, BWR , BRR , --- , --- ,
+ CIRQ, OBI , ---, ---, --- , --- , --- , ERRI,
+ CTO , CCRC, CEB, CIE, DTO , DCRC, DEB , --- ,
+ ACE , --- , ---, ---, CERR, BADA, --- , ---
};
char res[256];
char *buf = res;
@@ -994,6 +994,11 @@ static void omap_hsmmc_report_irq(struct omap_hsmmc_host
*host, u32 status)
dev_dbg(mmc_dev(host-mmc), %s\n, res);
}
+#else
+static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host,
+u32 status)
+{
+}
#endif /* CONFIG_MMC_DEBUG */
/*
@@ -1052,9 +1057,7 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host
*host, int status)
dev_dbg(mmc_dev(host-mmc), IRQ Status is %x\n, status);
if (status ERR) {
-#ifdef CONFIG_MMC_DEBUG
- omap_hsmmc_report_irq(host, status);
-#endif
+ omap_hsmmc_dbg_report_irq(host, status);
if ((status CMD_TIMEOUT) ||
(status CMD_CRC)) {
if (host-cmd) {
--
1.7.0.4
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[PATCH V2 15/16] OMAP: hsmmc: add platform data for eMMC hardware reset gpio
eMMC may have a hardware reset line connected to a gpio,
so pass it to the driver.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap2/hsmmc.c |5 +
arch/arm/mach-omap2/hsmmc.h |1 +
arch/arm/plat-omap/include/plat/mmc.h |1 +
3 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index c37ba4f..a8078c1 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -472,6 +472,11 @@ static int __init omap_hsmmc_pdata_init(struct
omap2_hsmmc_info *c,
mmc-slots[0].switch_pin = c-gpio_cd;
mmc-slots[0].gpio_wp = c-gpio_wp;
+ if (c-gpio_hw_reset)
+ mmc-slots[0].gpio_hw_reset = c-gpio_hw_reset;
+ else
+ mmc-slots[0].gpio_hw_reset = -EINVAL;
+
mmc-slots[0].remux = c-remux;
mmc-slots[0].init_card = c-init_card;
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index 0f2a87e..b78ed41 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -22,6 +22,7 @@ struct omap2_hsmmc_info {
boolnomux; /* No default muxing for this slot */
int gpio_cd;/* or -EINVAL */
int gpio_wp;/* or -EINVAL */
+ int gpio_hw_reset; /* hardware reset */
char*name; /* or NULL for default */
struct device *dev; /* returned: pointer to mmc adapter */
int ocr_mask; /* temporary HACK */
diff --git a/arch/arm/plat-omap/include/plat/mmc.h
b/arch/arm/plat-omap/include/plat/mmc.h
index e3c9b20..9b69b7e 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -119,6 +119,7 @@ struct omap_mmc_platform_data {
int switch_pin; /* gpio (card detect) */
int gpio_wp;/* gpio (write protect) */
+ int gpio_hw_reset; /* gpio (hardware reset) */
int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
int (*set_power)(struct device *dev, int slot,
--
1.7.0.4
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[PATCH V2 01/16] mmc: omap_hsmmc: fix missing mmc_release_host() in no_off case
From: Sudhir Bera ext-sudhir.b...@nokia.com
In fact the no_off check here will not be hit because
'omap_hsmmc_disabled_to_sleep()' won't schedule a
deeper disable in the no_off case.
Signed-off-by: Sudhir Bera ext-sudhir.b...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 10 --
1 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 259ece0..73faaec 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -1770,15 +1770,13 @@ static int omap_hsmmc_sleep_to_off(struct
omap_hsmmc_host *host)
return 0;
if (mmc_slot(host).no_off)
- return 0;
+ goto out;
if (!((host-mmc-caps MMC_CAP_NONREMOVABLE) ||
mmc_slot(host).card_detect ||
(mmc_slot(host).get_cover_state
- mmc_slot(host).get_cover_state(host-dev, host-slot_id {
- mmc_release_host(host-mmc);
- return 0;
- }
+ mmc_slot(host).get_cover_state(host-dev, host-slot_id
+ goto out;
mmc_slot(host).set_power(host-dev, host-slot_id, 0, 0);
host-vdd = 0;
@@ -1788,7 +1786,7 @@ static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host
*host)
host-dpm_state == CARDSLEEP ? CARDSLEEP : REGSLEEP);
host-dpm_state = OFF;
-
+out:
mmc_release_host(host-mmc);
return 0;
--
1.7.0.4
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[PATCH V2 03/16] mmc: omap_hsmmc: move hardcoded frequency constants to definition block
From: Andy Shevchenko ext-andriy.shevche...@nokia.com Move the min and max frequency constants to the definition block in the source file. Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com Signed-off-by: Adrian Hunter adrian.hun...@nokia.com --- drivers/mmc/host/omap_hsmmc.c |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 0fed8eb..c8aab47 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -118,6 +118,8 @@ #define MMC_TIMEOUT_MS 20 #define OMAP_MMC_MASTER_CLOCK 9600 +#define OMAP_MMC_MIN_CLOCK 40 +#define OMAP_MMC_MAX_CLOCK 5200 #define DRIVER_NAMEomap_hsmmc /* Timeouts for entering power saving states on inactivity, msec */ @@ -2091,8 +2093,8 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).vcc_aux_disable_is_sleep) mmc_slot(host).no_off = 1; - mmc-f_min = 40; - mmc-f_max = 5200; + mmc-f_min = OMAP_MMC_MIN_CLOCK; + mmc-f_max = OMAP_MMC_MAX_CLOCK; spin_lock_init(host-irq_lock); -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 09/16] OMAP: hsmmc: Do not mux the slot if non default muxing is already done
From: Jarkko Lavinen jarkko.lavi...@nokia.com
Allow the bootloader do all the muxing.
Signed-off-by: Jarkko Lavinen jarkko.lavi...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap2/hsmmc.c |3 ++-
arch/arm/mach-omap2/hsmmc.h |1 +
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index b2f30be..6b97fae 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -440,7 +440,8 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info
*hsmmcinfo, int ctrl_nr)
pr_err(%s fails!\n, __func__);
goto done;
}
- omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
+ if (!hsmmcinfo-nomux)
+ omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
name = omap_hsmmc;
ohl = omap_hsmmc_latency;
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index f119348..0f2a87e 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -19,6 +19,7 @@ struct omap2_hsmmc_info {
boolpower_saving; /* Try to sleep or power off when possible */
boolno_off; /* power_saving and power is not to go off */
boolvcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */
+ boolnomux; /* No default muxing for this slot */
int gpio_cd;/* or -EINVAL */
int gpio_wp;/* or -EINVAL */
char*name; /* or NULL for default */
--
1.7.0.4
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[PATCH V2 08/16] mmc: omap_hsmmc: split same pieces of code to separate functions
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
There are few places with the same functionality. This patch creates two
functions omap_hsmmc_set_bus_width() and omap_hsmmc_set_bus_mode() to do the
job.
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 85 -
1 files changed, 41 insertions(+), 44 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index dd0d9d5..4f6e552 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -633,6 +633,41 @@ static void omap_hsmmc_set_clock(struct omap_hsmmc_host
*host)
omap_hsmmc_start_clock(host);
}
+static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
+{
+ struct mmc_ios *ios = host-mmc-ios;
+ u32 con;
+
+ con = OMAP_HSMMC_READ(host-base, CON);
+ switch (ios-bus_width) {
+ case MMC_BUS_WIDTH_8:
+ OMAP_HSMMC_WRITE(host-base, CON, con | DW8);
+ break;
+ case MMC_BUS_WIDTH_4:
+ OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
+ OMAP_HSMMC_WRITE(host-base, HCTL,
+ OMAP_HSMMC_READ(host-base, HCTL) | FOUR_BIT);
+ break;
+ case MMC_BUS_WIDTH_1:
+ OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
+ OMAP_HSMMC_WRITE(host-base, HCTL,
+ OMAP_HSMMC_READ(host-base, HCTL) ~FOUR_BIT);
+ break;
+ }
+}
+
+static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host)
+{
+ struct mmc_ios *ios = host-mmc-ios;
+ u32 con;
+
+ con = OMAP_HSMMC_READ(host-base, CON);
+ if (ios-bus_mode == MMC_BUSMODE_OPENDRAIN)
+ OMAP_HSMMC_WRITE(host-base, CON, con | OD);
+ else
+ OMAP_HSMMC_WRITE(host-base, CON, con ~OD);
+}
+
#ifdef CONFIG_PM
/*
@@ -644,7 +679,7 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
struct mmc_ios *ios = host-mmc-ios;
struct omap_mmc_platform_data *pdata = host-pdata;
int context_loss = 0;
- u32 hctl, capa, con;
+ u32 hctl, capa;
unsigned long timeout;
if (pdata-get_context_loss_count) {
@@ -706,30 +741,12 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
if (host-power_mode == MMC_POWER_OFF)
goto out;
- con = OMAP_HSMMC_READ(host-base, CON);
- switch (ios-bus_width) {
- case MMC_BUS_WIDTH_8:
- OMAP_HSMMC_WRITE(host-base, CON, con | DW8);
- break;
- case MMC_BUS_WIDTH_4:
- OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
- OMAP_HSMMC_WRITE(host-base, HCTL,
- OMAP_HSMMC_READ(host-base, HCTL) | FOUR_BIT);
- break;
- case MMC_BUS_WIDTH_1:
- OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
- OMAP_HSMMC_WRITE(host-base, HCTL,
- OMAP_HSMMC_READ(host-base, HCTL) ~FOUR_BIT);
- break;
- }
+ omap_hsmmc_set_bus_width(host);
omap_hsmmc_set_clock(host);
- con = OMAP_HSMMC_READ(host-base, CON);
- if (ios-bus_mode == MMC_BUSMODE_OPENDRAIN)
- OMAP_HSMMC_WRITE(host-base, CON, con | OD);
- else
- OMAP_HSMMC_WRITE(host-base, CON, con ~OD);
+ omap_hsmmc_set_bus_mode(host);
+
out:
host-context_loss = context_loss;
@@ -1554,7 +1571,6 @@ static void omap_hsmmc_request(struct mmc_host *mmc,
struct mmc_request *req)
static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct omap_hsmmc_host *host = mmc_priv(mmc);
- u32 con;
int do_send_init_stream = 0;
mmc_host_enable(host-mmc);
@@ -1580,22 +1596,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct mmc_ios *ios)
/* FIXME: set registers based only on changes to ios */
- con = OMAP_HSMMC_READ(host-base, CON);
- switch (mmc-ios.bus_width) {
- case MMC_BUS_WIDTH_8:
- OMAP_HSMMC_WRITE(host-base, CON, con | DW8);
- break;
- case MMC_BUS_WIDTH_4:
- OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
- OMAP_HSMMC_WRITE(host-base, HCTL,
- OMAP_HSMMC_READ(host-base, HCTL) | FOUR_BIT);
- break;
- case MMC_BUS_WIDTH_1:
- OMAP_HSMMC_WRITE(host-base, CON, con ~DW8);
- OMAP_HSMMC_WRITE(host-base, HCTL,
- OMAP_HSMMC_READ(host-base, HCTL) ~FOUR_BIT);
- break;
- }
+ omap_hsmmc_set_bus_width(host);
if (host-pdata-controller_flags OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
/* Only MMC1 can interface at 3V without some flavor
@@ -1620,11 +1621,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc,
struct
[PATCH V2 13/16] OMAP: hsmmc: implement clock switcher
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
There are 3 new platform data methods which should help us to do a clock
switching when notification is happened or request is started.
The purpose of the patch is to avoid high frequency of MMC controller on low
OPPs due to an HW bug in OMAP 3630.
The algorithm:
- the PM governor switches the clock of L3 (and therefore L4) bus on demand
- the MMC controller clock should follow the change
We have considered two OPPs for L3/L4 bus. Thus, we have corresponding flow:
- OPP1 - OPP2 (in case of abort - OPP1)
- OPP2 - OPP1 (in case of abort - OPP2)
During idle the MMC gates functional clock and we don't care about the
frequency. Most important to get proper solution when notification comes during
request. Then:
- in case of OPP1 - OPP2 we update frequency limit and it will be used for
new coming requests (it assumes the current frequency of the controller is
lower then new one)
- otherwise we wait until no device has used higher frequency then upcoming
one
Known issues and limitations:
- originally a clock notifier was used for the core L4 iclk but for upstream
Adrian changed to a cpufreq notifier where we assume OPP1 below 400MHz and
OPP2 above 400MHz
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap2/hsmmc.c | 180 -
arch/arm/plat-omap/include/plat/mmc.h |8 ++
2 files changed, 187 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 6b97fae..c37ba4f 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -10,10 +10,15 @@
* published by the Free Software Foundation.
*/
#include linux/kernel.h
+#include linux/err.h
#include linux/slab.h
#include linux/string.h
#include linux/delay.h
+#include linux/platform_device.h
+#include linux/clk.h
+#include linux/mmc/card.h
#include mach/hardware.h
+#include plat/clock.h
#include plat/mmc.h
#include plat/omap-pm.h
#include plat/mux.h
@@ -23,6 +28,8 @@
#include hsmmc.h
#include control.h
+#define HSMMC_MAX_FREQ 4800
+
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
static u16 control_pbias_offset;
@@ -203,6 +210,155 @@ static int nop_mmc_set_power(struct device *dev, int
slot, int power_on,
return 0;
}
+#ifdef CONFIG_ARCH_OMAP3
+static struct hsmmc_max_freq_info {
+ struct device *dev;
+ int freq;
+ int high_speed;
+} hsmmc_max_freq_info[OMAP34XX_NR_MMC];
+
+static unsigned int hsmmc_max_freq = HSMMC_MAX_FREQ;
+static DEFINE_SPINLOCK(hsmmc_max_freq_lock);
+
+static DECLARE_WAIT_QUEUE_HEAD(hsmmc_max_freq_wq);
+
+static int hsmmc_high_speed(struct device *dev)
+{
+ void *drvdata = platform_get_drvdata(to_platform_device(dev));
+ struct mmc_host *mmc = container_of(drvdata, struct mmc_host, private);
+
+ return mmc-card ? mmc_card_highspeed(mmc-card) : 0;
+}
+
+static unsigned int hsmmc_get_max_freq_hs(struct device *dev, int high_speed)
+{
+ return high_speed ? hsmmc_max_freq : hsmmc_max_freq 1;
+}
+
+static unsigned int hsmmc_get_max_freq(struct device *dev)
+{
+ return hsmmc_get_max_freq_hs(dev, hsmmc_high_speed(dev));
+}
+
+static unsigned int hsmmc_active(struct device *dev, unsigned int target_freq)
+{
+ int high_speed = hsmmc_high_speed(dev);
+ int i;
+ unsigned int max_freq, freq;
+ unsigned long flags;
+
+ spin_lock_irqsave(hsmmc_max_freq_lock, flags);
+ max_freq = hsmmc_get_max_freq_hs(dev, high_speed);
+ freq = min(target_freq, max_freq);
+ for (i = 0; i ARRAY_SIZE(hsmmc_max_freq_info); i++) {
+ if (!hsmmc_max_freq_info[i].dev) {
+ hsmmc_max_freq_info[i].dev = dev;
+ hsmmc_max_freq_info[i].freq = freq;
+ hsmmc_max_freq_info[i].high_speed = high_speed;
+ break;
+ }
+ }
+ spin_unlock_irqrestore(hsmmc_max_freq_lock, flags);
+ return freq;
+}
+
+static void hsmmc_inactive(struct device *dev)
+{
+ int i;
+ unsigned long flags;
+
+ spin_lock_irqsave(hsmmc_max_freq_lock, flags);
+ for (i = 0; i ARRAY_SIZE(hsmmc_max_freq_info); i++) {
+ if (hsmmc_max_freq_info[i].dev == dev) {
+ hsmmc_max_freq_info[i].dev = NULL;
+ spin_unlock_irqrestore(hsmmc_max_freq_lock, flags);
+ /*
+* Wake up the queue only in case we deactivated a
+* device.
+*/
+ wake_up(hsmmc_max_freq_wq);
+ return;
+ }
+ }
+ spin_unlock_irqrestore(hsmmc_max_freq_lock, flags);
+}
+
+static bool hsmmc_max_freq_ok(void)
+{
+ int i;
+ bool ret = true;
+ unsigned long flags;
+
+
Re: [PATCH v2 11/12] OMAP: Serial: Use resume call from prcm to enable uart
On Thu, May 5, 2011 at 8:28 PM, Kevin Hilman khil...@ti.com wrote:
Govindraj govindraj...@gmail.com writes:
[...]
... this is just putting back basically the same thing that was removed in
patch 1. IOW, this is now being checked for *every* PRCM wakeup, which
is no different than having it in the idle path.
I thought I understood that you had the SW IRQ triggering working, so
this part should not be necessary.
Actually I tried few experiments but couldn't get it working.
What exactly is not working? The interrupt is not firing at all? The
driver's ISR is not being called?
It throws a oops as here
http://pastebin.com/5bcPjAA0
Reproduced with below [EXP-1] change + below kernel.
git://gitorious.org/uart_runtime/pm.git
[Has uart runtime patches based on pm-core branch]
Tried below but didn't help.
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3960330..2c1dfc2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -288,6 +288,16 @@ static irqreturn_t prcm_interrupt_handler (int
irq, void *dev_id)
do {
if (irqstatus_mpu (OMAP3430_WKUP_ST_MASK |
OMAP3430_IO_ST_MASK)) {
+#if 1
+ /*
+ * EXP-1: SET UART1 SOFT IRQ BIT
+ * 3430 -SDP UART1 console.
+ * M_IRQ_72, INTCPS_ISR_SET
+ * 0x4820 0090 + (0x20 * n)
+ * bit-8 n = 2
+ */
+ __raw_writel(0x100 , 0x482000D0);
+#endif
c = _prcm_int_handle_wakeup();
/*
---
Currently we are planning to integrate irq_chaining patches
on top uart_runtime patches which is work-in-progress.
Will remove resume_idle once we have irq_chaining patches available.
Well, I'm not OK with $SUBJECT patch as it is since it's just moving an
ugly hack from serial.c to the PRCM ISR. If the hack is going to stay,
then it should stay where it is until it can be fixed for real.
Now with runtime changes we are cutting clocks independently
whereas prior to this we where cutting clocks only in sram_idle path.
With runtime changes:
1.) Once we cut uart clocks and send a char to uart it directs wakeup_irq to
prcm_irq_handler the one way to wakeup uart from there was to check
uart mod wakeup status bits if wakeup event occurred then wakeup the
particular uart.
2.) Moving this resume back to sram path will break module wakeup after
uart clocks are disabled(using put_sync)
Thats the reason I have moved this to prcm_irq path to ensure
once auto-suspend happens after inactivity period we have resume_call
to wakeup uart port.
--
Thanks,
Govindraj.R
Kevin
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[PATCH V2 16/16] mmc: omap_hsmmc: add a hardware reset before initialization
After a warm restart, an eMMC which cannot be powered off is
in an unknown state, so reset it to be sure it will initialize.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 38 +-
1 files changed, 37 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e1c9017..70b8ef8 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -530,10 +530,25 @@ static int omap_hsmmc_gpio_init(struct
omap_mmc_platform_data *pdata)
} else
pdata-slots[0].gpio_wp = -EINVAL;
+ if (gpio_is_valid(pdata-slots[0].gpio_hw_reset)) {
+ ret = gpio_request(pdata-slots[0].gpio_hw_reset,
+ mmc_hw_reset);
+ if (ret)
+ goto err_free_wp;
+ ret = gpio_direction_output(pdata-slots[0].gpio_hw_reset, 1);
+ if (ret)
+ goto err_free_hw_reset;
+ } else
+ pdata-slots[0].gpio_hw_reset = -EINVAL;
+
return 0;
+
+err_free_hw_reset:
+ gpio_free(pdata-slots[0].gpio_hw_reset);
err_free_wp:
- gpio_free(pdata-slots[0].gpio_wp);
+ if (gpio_is_valid(pdata-slots[0].gpio_wp))
+ gpio_free(pdata-slots[0].gpio_wp);
err_free_cd:
if (gpio_is_valid(pdata-slots[0].switch_pin))
err_free_sp:
@@ -543,6 +558,8 @@ err_free_sp:
static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata)
{
+ if (gpio_is_valid(pdata-slots[0].gpio_hw_reset))
+ gpio_free(pdata-slots[0].gpio_hw_reset);
if (gpio_is_valid(pdata-slots[0].gpio_wp))
gpio_free(pdata-slots[0].gpio_wp);
if (gpio_is_valid(pdata-slots[0].switch_pin))
@@ -803,6 +820,18 @@ static void omap_hsmmc_context_save(struct omap_hsmmc_host
*host)
#endif
+static void omap_hsmmc_do_hw_reset(struct omap_hsmmc_host *host)
+{
+ if (!gpio_is_valid(mmc_slot(host).gpio_hw_reset))
+ return;
+
+ gpio_set_value_cansleep(mmc_slot(host).gpio_hw_reset, 0);
+ udelay(9);
+ gpio_set_value_cansleep(mmc_slot(host).gpio_hw_reset, 1);
+ usleep_range(1000, 2000);
+ printk(KERN_INFO %s: hardware reset done\n, mmc_hostname(host-mmc));
+}
+
/*
* Send init stream sequence to card
* before sending IDLE command
@@ -815,6 +844,13 @@ static void send_init_stream(struct omap_hsmmc_host *host)
if (host-protect_card)
return;
+ /*
+* After a warm restart, an eMMC which cannot be powered off is in an
+* unknown state so reset it to be sure it will initialize.
+*/
+ if (mmc_slot(host).no_off)
+ omap_hsmmc_do_hw_reset(host);
+
disable_irq(host-irq);
OMAP_HSMMC_WRITE(host-base, IE, INT_EN_MASK);
--
1.7.0.4
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[PATCH V2 14/16] mmc: omap_hsmmc: adjust host controller clock in regard to current OPP
From: Andy Shevchenko ext-andriy.shevche...@nokia.com
We should like to adjust MMC host controller clock whenever the OPP is changed.
OPP affects to L3/L4 bus frequency. Due to this we update the maximum frequency
limits before each upcoming request and when the divisor is calculated.
Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 65 +
1 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index ee57b9b..e1c9017 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -187,6 +187,9 @@ struct omap_hsmmc_host {
int use_reg;
int req_in_progress;
+ /* Actual output frequency of host controller */
+ unsigned intfreq;
+
struct omap_mmc_platform_data *pdata;
};
@@ -592,13 +595,31 @@ static void omap_hsmmc_disable_irq(struct omap_hsmmc_host
*host)
OMAP_HSMMC_WRITE(host-base, STAT, STAT_CLEAR);
}
+/*
+ * Recalculate desired clock frequency with regard to maximum possible
+ * frequency at current OPP.
+ *
+ * Choose either target frequency (ios-clock) or maximum possible frequency at
+ * current OPP (get_max_freq() returns this limit)
+ */
+static void omap_hsmmc_recalc_freq(struct omap_hsmmc_host *host,
+ struct mmc_ios *ios)
+{
+ struct omap_mmc_platform_data *pdata = host-pdata;
+
+ if (pdata-get_max_freq)
+ host-freq = min(ios-clock, pdata-get_max_freq(host-dev));
+ else
+ host-freq = ios-clock;
+}
+
/* Calculate divisor for the given clock frequency */
-static u16 calc_divisor(struct mmc_ios *ios)
+static u16 calc_divisor(struct omap_hsmmc_host *host)
{
u16 dsor = 0;
- if (ios-clock) {
- dsor = DIV_ROUND_UP(OMAP_MMC_MASTER_CLOCK, ios-clock);
+ if (host-freq) {
+ dsor = DIV_ROUND_UP(OMAP_MMC_MASTER_CLOCK, host-freq);
if (dsor 250)
dsor = 250;
}
@@ -608,17 +629,16 @@ static u16 calc_divisor(struct mmc_ios *ios)
static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host)
{
- struct mmc_ios *ios = host-mmc-ios;
unsigned long regval;
unsigned long timeout;
- dev_dbg(mmc_dev(host-mmc), Set clock to %uHz\n, ios-clock);
+ dev_dbg(mmc_dev(host-mmc), Set clock to %uHz\n, host-freq);
omap_hsmmc_stop_clock(host);
regval = OMAP_HSMMC_READ(host-base, SYSCTL);
regval = regval ~(CLKD_MASK | DTO_MASK);
- regval = regval | (calc_divisor(ios) 6) | (DTO 16);
+ regval = regval | (calc_divisor(host) 6) | (DTO 16);
OMAP_HSMMC_WRITE(host-base, SYSCTL, regval);
OMAP_HSMMC_WRITE(host-base, SYSCTL,
OMAP_HSMMC_READ(host-base, SYSCTL) | ICE);
@@ -742,6 +762,7 @@ static int omap_hsmmc_context_restore(struct
omap_hsmmc_host *host)
omap_hsmmc_set_bus_width(host);
+ omap_hsmmc_recalc_freq(host, ios);
omap_hsmmc_set_clock(host);
omap_hsmmc_set_bus_mode(host);
@@ -925,6 +946,8 @@ static void omap_hsmmc_request_done(struct omap_hsmmc_host
*host, struct mmc_req
if (mrq-data host-use_dma dma_ch != -1)
return;
host-mrq = NULL;
+ if (host-pdata-inactive)
+ host-pdata-inactive(host-dev);
mmc_request_done(host-mmc, mrq);
}
@@ -984,6 +1007,9 @@ omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct
mmc_command *cmd)
}
if ((host-data == NULL !host-response_busy) || cmd-error)
omap_hsmmc_request_done(host, cmd-mrq);
+ else if (host-data == NULL host-response_busy
+host-pdata-inactive)
+ host-pdata-inactive(host-dev);
}
/*
@@ -1404,6 +1430,8 @@ static void omap_hsmmc_dma_cb(int lch, u16 ch_status,
void *cb_data)
struct mmc_request *mrq = host-mrq;
host-mrq = NULL;
+ if (host-pdata-inactive)
+ host-pdata-inactive(host-dev);
mmc_request_done(host-mmc, mrq);
}
}
@@ -1533,6 +1561,26 @@ static void omap_hsmmc_request(struct mmc_host *mmc,
struct mmc_request *req)
BUG_ON(host-req_in_progress);
BUG_ON(host-dma_ch != -1);
+
+ if (host-pdata-active) {
+ unsigned int new_freq;
+
+ /*
+* active() returns minimum of two (target, maximum)
+* frequencies.
+*/
+ new_freq = host-pdata-active(host-dev, mmc-ios.clock);
+
+ /*
+* We need to update actual frequency if it is not equal to the
+* minimum of two (target and maximum) frequencies
+*/
+ if (host-freq != new_freq) {
[PATCH 2/2] OMAP2+: hwmod: Add API to check IO PAD wakeup status
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/mux.c| 28 ++
arch/arm/mach-omap2/mux.h| 13
arch/arm/mach-omap2/omap_hwmod.c | 14 +
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
4 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index a4ab1e3..b40aebe 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -348,6 +348,34 @@ err1:
return NULL;
}
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Gets the wakeup status of given pad from omap-hwmod.
+ * Returns true if wakeup event is set for pad else false
+ * if wakeup is not occured or pads are not avialable.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ int i;
+ unsigned int val;
+ u8 ret = false;
+
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
+
+ val = omap_mux_read(pad-partition,
+ pad-mux-reg_offset);
+ if (val OMAP_WAKEUP_EVENT) {
+ ret = true;
+ break;
+ }
+ }
+
+ return ret;
+}
+
/* Assumes the calling function takes care of locking */
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
{
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 137f321..86a0051 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -225,8 +225,21 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int
nr_pads);
*/
void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
+/**
+ * omap_hwmod_mux_get_wake_status - omap hwmod check pad wakeup
+ * @hmux: Pads for a hwmod
+ *
+ * Called only from omap_hwmod.c, do not use.
+ */
+bool omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux);
#else
+static inline bool
+omap_hwmod_mux_get_wake_status(struct omap_hwmod_mux_info *hmux)
+{
+ return 0;
+}
+
static inline int omap_mux_init_gpio(int gpio, int val)
{
return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 97d3302..6891c4f 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2404,3 +2404,17 @@ int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod
*oh, bool enable)
return ret;
}
+
+/**
+ * omap_hwmod_pad_get_wakeup_status - get pad wakeup status if mux is
available.
+ * @oh: struct omap_hwmod *
+ *
+ * Returns the wake_up status bit of available pad mux pin.
+ * return error if no mux pads are available.
+ */
+int omap_hmwod_pad_get_wakeup_status(struct omap_hwmod *oh)
+{
+ if (oh-mux)
+ return omap_hwmod_mux_get_wake_status(oh-mux);
+ return -EINVAL;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b7f8d1b..b0535b7 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -603,6 +603,7 @@ u32 omap_hwmod_get_context_loss_count(struct omap_hwmod
*oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh, bool enable);
+int omap_hmwod_pad_get_wakeup_status(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
--
1.7.1
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[PATCH 0/2] OMAP2+: hwmod: Add hwmod's API's for pad wakeup
Add two API's to set IO Pad wakeup capability based on hwmod mux pins available and also to check the status of IO Pad wakeup event. This two patches are separated from uart_runtime patches posted earlier and uart_runtime adaptation relies on these two API's. Based on 2.6.39-rc6 Reference to Discussion: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg49000.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg49001.html Govindraj.R (2): OMAP2+: hwmod: Add API to enable IO ring wakeup. OMAP2+: hwmod: Add API to check IO PAD wakeup status arch/arm/mach-omap2/mux.c | 28 ++ arch/arm/mach-omap2/mux.h | 13 +++ arch/arm/mach-omap2/omap_hwmod.c | 49 + arch/arm/plat-omap/include/plat/omap_device.h |1 + arch/arm/plat-omap/include/plat/omap_hwmod.h |2 + arch/arm/plat-omap/omap_device.c | 27 ++ 6 files changed, 120 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] OMAP2+: hwmod: Add API to enable IO ring wakeup.
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hmwod idle transition based on whether wakeup_flag is
set or cleared.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 35 +
arch/arm/plat-omap/include/plat/omap_device.h |1 +
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
arch/arm/plat-omap/omap_device.c | 27 +++
4 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index e034294..97d3302 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2369,3 +2369,38 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
return 0;
}
+
+/**
+ * omap_hwmod_enable_ioring_wakeup - Set wakeup bit for iopad ring.
+ * @oh: struct omap_hwmod *
+ * @enable: based on 0 or 1 set or unset wakeup bit.
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * set wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh, bool enable)
+{
+ struct omap_device_pad *pad;
+ int ret = -EINVAL, j;
+ int val = 0;
+
+ /* Enable pin mux to make pad wake-up capable */
+ if (enable)
+ val = OMAP_WAKEUP_EN;
+ else
+ val = ~OMAP_WAKEUP_EN;
+
+ if (oh-mux-enabled) {
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ pad-idle = pad-enable | val;
+ ret = 0;
+ }
+ }
+ }
+
+ return ret;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
b/arch/arm/plat-omap/include/plat/omap_device.h
index e4c349f..ce8e3e8 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -117,6 +117,7 @@ int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
+int omap_device_enable_ioring_wakeup(struct platform_device *pdev, bool
enable);
/*
* Entries should be kept in latency order ascending
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1adea9c..b7f8d1b 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -601,6 +601,7 @@ int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh,
u8 state);
u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh, bool enable);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 9bbda9a..82fb4a6 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -742,6 +742,33 @@ void __iomem *omap_device_get_rt_va(struct omap_device *od)
return omap_hwmod_get_mpu_rt_va(od-hwmods[0]);
}
+/**
+ * omap_device_enable_ioring_wakeup - Set wakeup bit for iopad ring.
+ * @pdev: platform_device for which wakeup needs to be set.
+ * @enable: based on true or false set or unset ioring wakeup enable flag.
+ *
+ * Caller should ensure this is called if device_may_wakeup(dev) is true
+ * traverse through each hwmod and check each available pads
+ * if pad is enabled then set wakeup enable flag for the mux pin.
+ * Return error if pads are not enabled or not available.
+ * Wakeup enable flag will be we used during hwmod idle transistion
+ * to enable or disable wakeup capability for the pad.
+ */
+int omap_device_enable_ioring_wakeup(struct platform_device *pdev, bool enable)
+{
+ int ret = -EINVAL, i;
+ struct omap_device *od;
+ struct omap_hwmod *oh;
+
+ od = _find_by_pdev(pdev);
+ for (i = 0; i od-hwmods_cnt; i++) {
+ oh = od-hwmods[i];
+ ret = omap_hwmod_enable_ioring_wakeup(oh, enable);
+ }
+
+ return ret;
+}
+
/*
* Public functions intended for use in omap_device_pm_latency
* .activate_func and .deactivate_func function pointers
--
1.7.1
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Re: [PATCH V2 04/16] mmc: omap_hsmmc: reduce a bit the error handlers in probe()
On Fri, May 6, 2011 at 14:44, Adrian Hunter adrian.hun...@nokia.com wrote: From: Andy Shevchenko ext-andriy.shevche...@nokia.com Add patch description here. Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com Signed-off-by: Adrian Hunter adrian.hun...@nokia.com --- drivers/mmc/host/omap_hsmmc.c | 17 ++--- 1 files changed, 6 insertions(+), 11 deletions(-) snip -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 04/16] mmc: omap_hsmmc: reduce a bit the error handlers in probe()
On Fri, May 6, 2011 at 2:34 PM, Varadarajan, Charulatha ch...@ti.com wrote: On Fri, May 6, 2011 at 14:44, Adrian Hunter adrian.hun...@nokia.com wrote: From: Andy Shevchenko ext-andriy.shevche...@nokia.com Add patch description here. You mean something like following: The code contains similarities in the error path of probe function. Let's combine them at one place. ? Signed-off-by: Andy Shevchenko ext-andriy.shevche...@nokia.com Signed-off-by: Adrian Hunter adrian.hun...@nokia.com --- drivers/mmc/host/omap_hsmmc.c | 17 ++--- 1 files changed, 6 insertions(+), 11 deletions(-) snip -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v10 0/7] MFD: TWL4030: power script and workaround for erratum 27
Patch series for TWL4030 power scripts for OMAP3 boards and workaround for TWL erratum 27. Changes for implementing TWL4030 power scripts recommended by hardware team. Introduced a new TWL4030 power script file, which can be used by different OMAP3 board with the power companion chip TWL4030. Updated the changes for TWL4030 errata 27 28, and modified the TWL4030 power script. Workaround for TWL4030 erratum 27 is required for Si version less than or equal to TWL5030 ES1.1. TWL4030 script changes re-based on Kevin's PM tree in pm branch. This patch series have a dependency with the patch: http://www.spinics.net/lists/linux-omap/msg50547.html Changes in v7: changes to fix Nishanth Menon's comments i) Added the workaround for TWL4030 Erratum 27 split the first patch in v6 i) fix for twl4030 script load ii) correct the warning print during script loading Added new patch files i) changing sys_off signal polarity Changes in v8: updated the change logs moving the TWL IDCODE checking to twl-core.c Changes in V9: changes to fix David Derrick's comments i) turn OFF the NRES_PWRON resource in warm reset sequence ii) optimize the i2c writes during resource configuration Changes in V10: changes for Tony's comments i) making the TWL4030 power scripts loadable module Since the voltage layer is evolving to a new design, the voltage dependant changes required for the TWL4030 script are not incorporated in the patch series. So this TWL4030 script patch series can be tested with a separate patch for voltage layer changes. link: http://pastebin.mozilla.org/1219625 This changes are tested on OMAP3430 OMAP3630 SDP with off mode enabled in suspend path. Tested with suspend/resume script, which will test system suspend in a loop. Tested for more than 1000 iterations. Also tested the reboot with WRM_RST button reboot command. Cc: Nishanth Menon n...@ti.com Cc: David Derrick dderr...@ti.com Cc: Samuel Ortiz sa...@linux.intel.com --- Lesly A M (7): MFD: TWL4030: Fix for the TWL4030 sleep/wakeup sequence MFD: TWL4030: Correct the warning print during script loading MFD: TWL4030: Modifying the macro name Main_Ref to all caps MFD: TWL4030: power scripts for OMAP3 boards MFD: TWL4030: TWL version checking MFD: TWL4030: workaround changes for Erratum 27 MFD: TWL4030: optimizing resource configuration arch/arm/configs/omap2plus_defconfig |1 + arch/arm/mach-omap2/board-rx51-peripherals.c |2 +- arch/arm/mach-omap2/devices.c| 15 + drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile |1 + drivers/mfd/twl-core.c | 62 +++ drivers/mfd/twl4030-power.c | 241 + drivers/mfd/twl4030-script-omap.c| 523 ++ include/linux/i2c/twl.h | 61 +++- 9 files changed, 839 insertions(+), 78 deletions(-) create mode 100644 drivers/mfd/twl4030-script-omap.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v10 1/7] MFD: TWL4030: Fix for the TWL4030 sleep/wakeup sequence
Only configure sleep script when the flag is TWL4030_SLEEP_SCRIPT.
Adding the missing brackets for fixing the issue.
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl4030-power.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 6fed964..97f54ce 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -447,12 +447,13 @@ static int __init load_twl4030_script(struct
twl4030_script *tscript,
if (err)
goto out;
}
- if (tscript-flags TWL4030_SLEEP_SCRIPT)
+ if (tscript-flags TWL4030_SLEEP_SCRIPT) {
if (order)
pr_warning(TWL4030: Bad order of scripts (sleep \
script before wakeup) Leads to boot\
failure on some boards\n);
err = twl4030_config_sleep_sequence(address);
+ }
out:
return err;
}
--
1.7.1
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[PATCH v10 2/7] MFD: TWL4030: Correct the warning print during script loading
Correcting the if condition check for printing the warning,
if wakeup script is not updated before updating the sleep script.
Since the flag 'order' is set to '1' while updating the wakeup script for P1P2,
the condition checking for printing the warning should be if(!order)
(ie: print the warning if wakeup script is not updated before updating the
sleep script)
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl4030-power.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 97f54ce..12ab2a6 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -448,7 +448,7 @@ static int __init load_twl4030_script(struct twl4030_script
*tscript,
goto out;
}
if (tscript-flags TWL4030_SLEEP_SCRIPT) {
- if (order)
+ if (!order)
pr_warning(TWL4030: Bad order of scripts (sleep \
script before wakeup) Leads to boot\
failure on some boards\n);
--
1.7.1
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[PATCH v10 3/7] MFD: TWL4030: Modifying the macro name Main_Ref to all caps
Modifying the macro name Main_Ref to all caps(MAIN_REF).
Suggested by Nishanth Menon n...@ti.com
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c |2 +-
drivers/mfd/twl4030-power.c |2 +-
include/linux/i2c/twl.h |2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index bbcb677..01ee0a1 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -730,7 +730,7 @@ static struct twl4030_resconfig twl4030_rconfig[]
__initdata = {
{ .resource = RES_RESET, .devgroup = -1,
.type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
},
- { .resource = RES_Main_Ref, .devgroup = -1,
+ { .resource = RES_MAIN_REF, .devgroup = -1,
.type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
},
{ 0, 0},
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 12ab2a6..a764676 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -120,7 +120,7 @@ static u8 res_config_addrs[] = {
[RES_HFCLKOUT] = 0x8b,
[RES_32KCLKOUT] = 0x8e,
[RES_RESET] = 0x91,
- [RES_Main_Ref] = 0x94,
+ [RES_MAIN_REF] = 0x94,
};
static int __init twl4030_write_script_byte(u8 address, u8 byte)
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 0c0d1ae..4ebd7c3 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -501,7 +501,7 @@ static inline int twl6030_mmc_card_detect(struct device
*dev, int slot)
#define RES_32KCLKOUT 26
#define RES_RESET 27
/* Power Reference */
-#define RES_Main_Ref28
+#define RES_MAIN_REF28
#define TOTAL_RESOURCES28
/*
--
1.7.1
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[PATCH v10 4/7] MFD: TWL4030: power scripts for OMAP3 boards
Power bus message sequence for TWL4030 to enter sleep/wakeup/warm_reset.
TWL4030 power scripts which can be used by different OMAP3 boards
with the power companion chip (TWL4030 series).
The twl4030 generic script can be used by any board file to update
the power data in twl4030_platform_data.
Since the TWL4030 power script has dependency with APIs in twl4030-power.c
removing the __init for these APIs.
For more information please see:
http://omapedia.org/wiki/TWL4030_power_scripts
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
arch/arm/configs/omap2plus_defconfig |1 +
arch/arm/mach-omap2/devices.c| 15 ++
drivers/mfd/Kconfig | 11 +
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-power.c | 31 ++--
drivers/mfd/twl4030-script-omap.c| 373 ++
include/linux/i2c/twl.h | 41 -
7 files changed, 454 insertions(+), 19 deletions(-)
create mode 100644 drivers/mfd/twl4030-script-omap.c
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index 076db52..d9b9858 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -184,6 +184,7 @@ CONFIG_TWL4030_WATCHDOG=y
CONFIG_MENELAUS=y
CONFIG_TWL4030_CORE=y
CONFIG_TWL4030_POWER=y
+CONFIG_TWL4030_SCRIPT=m
CONFIG_REGULATOR=y
CONFIG_REGULATOR_TWL4030=y
CONFIG_REGULATOR_TPS65023=y
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7b85585..7653329 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -329,6 +329,20 @@ static void omap_init_audio(void)
static inline void omap_init_audio(void) {}
#endif
+#ifdef CONFIG_ARCH_OMAP3
+static struct platform_device omap_twl4030_script = {
+ .name = twl4030_script,
+ .id = -1,
+};
+
+static void omap_init_twl4030_script(void)
+{
+ platform_device_register(omap_twl4030_script);
+}
+#else
+static inline void omap_init_twl4030_script(void) {}
+#endif
+
#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
#include plat/mcspi.h
@@ -691,6 +705,7 @@ static int __init omap2_init_devices(void)
omap_init_sham();
omap_init_aes();
omap_init_vout();
+ omap_init_twl4030_script();
return 0;
}
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 3ed3ff0..bed88ce 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -204,6 +204,17 @@ config TWL4030_POWER
and load scripts controlling which resources are switched off/on
or reset when a sleep, wakeup or warm reset event occurs.
+config TWL4030_SCRIPT
+ tristate Support TWL4030 script for OMAP3 boards
+ depends on TWL4030_CORE TWL4030_POWER
+ help
+ Say yes here if you want to use the twl4030 power scripts
+ for OMAP3 boards. Power bus message sequence for
+ TWL4030 to enter sleep/wakeup/warm_reset.
+
+ TWL4030 power scripts which can be used by different
+ OMAP3 boards with the power companion chip (TWL4030 series).
+
config TWL4030_CODEC
bool
depends on TWL4030_CORE
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 419caa9..53ada21 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
obj-$(CONFIG_TWL4030_CODEC)+= twl4030-codec.o
obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o
+obj-$(CONFIG_TWL4030_SCRIPT)+= twl4030-script-omap.o
obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index a764676..88195e2 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -123,7 +123,7 @@ static u8 res_config_addrs[] = {
[RES_MAIN_REF] = 0x94,
};
-static int __init twl4030_write_script_byte(u8 address, u8 byte)
+static int twl4030_write_script_byte(u8 address, u8 byte)
{
int err;
@@ -137,7 +137,7 @@ out:
return err;
}
-static int __init twl4030_write_script_ins(u8 address, u16 pmb_message,
+static int twl4030_write_script_ins(u8 address, u16 pmb_message,
u8 delay, u8 next)
{
int err;
@@ -157,7 +157,7 @@ out:
return err;
}
-static int __init twl4030_write_script(u8 address, struct twl4030_ins *script,
+static int twl4030_write_script(u8 address, struct twl4030_ins *script,
int len)
{
int err;
@@ -182,7 +182,7 @@ static int __init twl4030_write_script(u8 address, struct
twl4030_ins *script,
return err;
}
-static int __init twl4030_config_wakeup3_sequence(u8 address)
+static int twl4030_config_wakeup3_sequence(u8 address)
{
int err;
u8 data;
[PATCH v10 7/7] MFD: TWL4030: optimizing resource configuration
Skip the i2c register writes in twl4030_configure_resource() if the new value
is same as the old value, for devgrp/type/remap regs.
Suggested by David Derrick dderr...@ti.com
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl4030-power.c | 126 --
1 files changed, 72 insertions(+), 54 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 6b57d2b..c1c3906 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -335,9 +335,9 @@ static int twl4030_configure_resource(struct
twl4030_resconfig *rconfig)
{
int rconfig_addr;
int err;
- u8 type;
- u8 grp;
- u8 remap;
+ u8 type, type_value;
+ u8 grp, grp_value;
+ u8 remap, remap_value;
if (rconfig-resource TOTAL_RESOURCES) {
pr_err(TWL4030 Resource %d does not exist\n,
@@ -348,76 +348,94 @@ static int twl4030_configure_resource(struct
twl4030_resconfig *rconfig)
rconfig_addr = res_config_addrs[rconfig-resource];
/* Set resource group */
- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, grp,
+ if (rconfig-devgroup != TWL4030_RESCONFIG_UNDEF) {
+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, grp,
rconfig_addr + DEV_GRP_OFFSET);
- if (err) {
- pr_err(TWL4030 Resource %d group could not be read\n,
- rconfig-resource);
- return err;
- }
+ if (err) {
+ pr_err(TWL4030 Resource %d group could not be read\n,
+ rconfig-resource);
+ return err;
+ }
- if (rconfig-devgroup != TWL4030_RESCONFIG_UNDEF) {
- grp = ~DEV_GRP_MASK;
- grp |= rconfig-devgroup DEV_GRP_SHIFT;
- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ grp_value = (grp DEV_GRP_MASK) DEV_GRP_SHIFT;
+
+ if (rconfig-devgroup != grp_value) {
+ grp = ~DEV_GRP_MASK;
+ grp |= rconfig-devgroup DEV_GRP_SHIFT;
+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
grp, rconfig_addr + DEV_GRP_OFFSET);
- if (err 0) {
- pr_err(TWL4030 failed to program devgroup\n);
- return err;
+ if (err 0) {
+ pr_err(TWL4030 failed to program devgroup\n);
+ return err;
+ }
}
}
/* Set resource types */
- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, type,
+ if ((rconfig-type != TWL4030_RESCONFIG_UNDEF) ||
+ (rconfig-type2 != TWL4030_RESCONFIG_UNDEF)) {
+
+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, type,
rconfig_addr + TYPE_OFFSET);
- if (err 0) {
- pr_err(TWL4030 Resource %d type could not be read\n,
- rconfig-resource);
- return err;
- }
+ if (err 0) {
+ pr_err(TWL4030 Resource %d type could not be read\n,
+ rconfig-resource);
+ return err;
+ }
- if (rconfig-type != TWL4030_RESCONFIG_UNDEF) {
- type = ~TYPE_MASK;
- type |= rconfig-type TYPE_SHIFT;
- }
+ type_value = type;
- if (rconfig-type2 != TWL4030_RESCONFIG_UNDEF) {
- type = ~TYPE2_MASK;
- type |= rconfig-type2 TYPE2_SHIFT;
- }
+ if (rconfig-type != TWL4030_RESCONFIG_UNDEF) {
+ type = ~TYPE_MASK;
+ type |= rconfig-type TYPE_SHIFT;
+ }
- err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ if (rconfig-type2 != TWL4030_RESCONFIG_UNDEF) {
+ type = ~TYPE2_MASK;
+ type |= rconfig-type2 TYPE2_SHIFT;
+ }
+
+ if (type != type_value) {
+ err = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
type, rconfig_addr + TYPE_OFFSET);
- if (err 0) {
- pr_err(TWL4030 failed to program resource type\n);
- return err;
+ if (err 0) {
+ pr_err(TWL4030 failed to program resource
type\n);
+ return err;
+ }
+ }
}
/* Set remap states */
- err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, remap,
+ if ((rconfig-remap_off != TWL4030_RESCONFIG_UNDEF) ||
+
[PATCH v10 6/7] MFD: TWL4030: workaround changes for Erratum 27
Workaround for TWL5030 Silicon Errata 27 28:
27 - VDD1, VDD2, may have glitches when their output value is updated.
28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock
is switched from internal to external.
Erratum 27:
If the DCDC regulators is running on their internal oscillator,
negative glitches may occur on VDD1, VDD2 output when voltage is
changed.
The OMAP device may reboot if the VDD1 or VDD2 go below the
core minimum operating voltage.
WORKAROUND
Set up the TWL5030 DC-DC power supplies to use the HFCLKIN instead of
the internal oscillator.
Erratum 28:
VDD1/VDD2 clock system may hang during switching the clock source from
internal oscillator to external. VDD1/VDD2 output voltages may collapse
if clock stops.
WORKAROUND
If HFCLK is disabled in OFFMODE, modify the sleep/wakeup sequence and
setuptimes to make sure the switching will happen only when HFCLKIN is
stable.
Also use the TWL5030 watchdog to safeguard the first switching from
internal oscillator to HFCLKIN during the TWL5030 init.
IMPACT
power sequence is changed.
sleep/wakeup time values will be changed.
The workaround changes are called from twl4030_power_init(), since we have to
make some i2c_read calls to check the TWL4030 version the i2c will not be
initialized in the early stage.
This workaround is required for TWL5030 Silicon version less than ES1.2
The power script setup time changes are recommended by TI HW team.
For more information please see:
http://omapedia.org/wiki/TWL4030_power_scripts
Changes taken from TWL4030 Erratum 27 workaround patch by Nishanth Menon.
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl4030-power.c | 79 +++
drivers/mfd/twl4030-script-omap.c | 150 +
include/linux/i2c/twl.h |1 +
3 files changed, 230 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index 88195e2..6b57d2b 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -63,6 +63,14 @@ static u8 twl4030_start_script_address = 0x2b;
#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
+#define R_VDD1_OSC 0x5C
+#define R_VDD2_OSC 0x6A
+#define R_VIO_OSC 0x52
+#define EXT_FS_CLK_EN BIT(6)
+
+#define R_WDT_CFG 0x03
+#define WDT_WRK_TIMEOUT0x03
+
/* resource configuration registers
RESOURCE_DEV_GRP at address 'n+0'
RESOURCE_TYPE at address 'n+1'
@@ -512,6 +520,67 @@ int twl4030_remove_script(u8 flags)
}
EXPORT_SYMBOL_GPL(twl4030_remove_script);
+/**
+ * twl_dcdc_use_hfclk - API to use HFCLK for TWL DCDCs
+ *
+ * TWL DCDCs switching to HFCLK instead of using internal RC oscillator.
+ */
+static int twl_dcdc_use_hfclk(void)
+{
+ u8 val;
+ u8 smps_osc_reg[] = {R_VDD1_OSC, R_VDD2_OSC, R_VIO_OSC};
+ int i;
+ int err;
+
+ for (i = 0; i sizeof(smps_osc_reg); i++) {
+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, val,
+ smps_osc_reg[i]);
+ val |= EXT_FS_CLK_EN;
+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, val,
+ smps_osc_reg[i]);
+ }
+ return err;
+}
+
+/**
+ * twl_erratum27_workaround - Workaround for TWL5030 Silicon Erratum 27
+ * 27 - VDD1, VDD2, may have glitches when their output value is updated.
+ * 28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock is
+ * switched from internal to external.
+ *
+ * Workaround requires the TWL DCDCs to use HFCLK instead of
+ * internal oscillator. Also enable TWL watchdog before switching the osc
+ * to recover if the VDD1/VDD2 stop working.
+ */
+static void twl_erratum27_workaround(void)
+{
+ u8 wdt_counter_val = 0;
+ int err;
+
+ /* Setup the twl wdt to take care of borderline failure case */
+ err = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, wdt_counter_val,
+ R_WDT_CFG);
+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, WDT_WRK_TIMEOUT,
+ R_WDT_CFG);
+
+ /* TWL DCDC switching to HFCLK */
+ err |= twl_dcdc_use_hfclk();
+
+ /* restore the original value */
+ err |= twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, wdt_counter_val,
+ R_WDT_CFG);
+ if (err)
+ pr_warning(TWL4030: workaround setup failed!\n);
+}
+
+static bool is_twl5030_erratum27wa_required(void)
+{
+ if (twl_get_type() == TWL_SIL_5030)
+
[PATCH v10 5/7] MFD: TWL4030: TWL version checking
Added API to get the TWL5030 Si version from the IDCODE register.
It is used for enabling the workaround for TWL erratum 27.
Signed-off-by: Lesly A M lesl...@ti.com
Cc: Nishanth Menon n...@ti.com
Cc: David Derrick dderr...@ti.com
Cc: Samuel Ortiz sa...@linux.intel.com
---
drivers/mfd/twl-core.c | 62 +++
include/linux/i2c/twl.h | 17 -
2 files changed, 78 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 960b5be..2bd9e06 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -229,6 +229,9 @@
/* is driver active, bound to a chip? */
static bool inuse;
+/* TWL IDCODE Register value */
+static u32 twl_idcode;
+
static unsigned int twl_id;
unsigned int twl_rev(void)
{
@@ -487,6 +490,58 @@ EXPORT_SYMBOL(twl_i2c_read_u8);
/*--*/
+/**
+ * twl_read_idcode_register - API to read the IDCODE register.
+ *
+ * Unlocks the IDCODE register and read the 32 bit value.
+ */
+static int twl_read_idcode_register(void)
+{
+ int err;
+
+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
+ REG_UNLOCK_TEST_REG);
+ if (err) {
+ pr_err(TWL4030 Unable to unlock IDCODE registers -%d\n, err);
+ goto fail;
+ }
+
+ err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(twl_idcode),
+ REG_IDCODE_7_0, 4);
+ if (err) {
+ pr_err(TWL4030: unable to read IDCODE -%d\n, err);
+ goto fail;
+ }
+
+ err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
+ if (err)
+ pr_err(TWL4030 Unable to relock IDCODE registers -%d\n, err);
+fail:
+ return err;
+}
+
+/**
+ * twl_get_type - API to get TWL Si type.
+ *
+ * Api to get the TWL Si type from IDCODE value.
+ */
+int twl_get_type(void)
+{
+ return TWL_SIL_TYPE(twl_idcode);
+}
+EXPORT_SYMBOL_GPL(twl_get_type);
+
+/**
+ * twl_get_version - API to get TWL Si version.
+ *
+ * Api to get the TWL Si version from IDCODE value.
+ */
+int twl_get_version(void)
+{
+ return TWL_SIL_REV(twl_idcode);
+}
+EXPORT_SYMBOL_GPL(twl_get_version);
+
static struct device *
add_numbered_child(unsigned chip, const char *name, int num,
void *pdata, unsigned pdata_len,
@@ -1014,6 +1069,7 @@ twl_probe(struct i2c_client *client, const struct
i2c_device_id *id)
unsignedi;
struct twl4030_platform_data*pdata = client-dev.platform_data;
u8 temp;
+ int ret = 0;
if (!pdata) {
dev_dbg(client-dev, no platform data?\n);
@@ -1060,6 +1116,12 @@ twl_probe(struct i2c_client *client, const struct
i2c_device_id *id)
/* setup clock framework */
clocks_init(client-dev, pdata-clock);
+ /* read TWL IDCODE Register */
+ if (twl_id == TWL4030_CLASS_ID) {
+ ret = twl_read_idcode_register();
+ WARN(ret 0, Error: reading twl_idcode register value\n);
+ }
+
/* load power event scripts */
if (twl_has_power() pdata-power)
twl4030_power_init(pdata-power);
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 41c9448..cf0f9f3 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -150,7 +150,12 @@
#define MMC_PU (0x1 3)
#define MMC_PD (0x1 2)
-
+#define TWL_SIL_TYPE(rev) ((rev) 0x00FF)
+#define TWL_SIL_REV(rev) ((rev) 24)
+#define TWL_SIL_5030 0x09002F
+#define TWL5030_REV_1_00x00
+#define TWL5030_REV_1_10x10
+#define TWL5030_REV_1_20x30
#define TWL4030_CLASS_ID 0x4030
#define TWL6030_CLASS_ID 0x6030
@@ -180,6 +185,9 @@ int twl_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
+int twl_get_type(void);
+int twl_get_version(void);
+
int twl6030_interrupt_unmask(u8 bit_mask, u8 offset);
int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
@@ -285,7 +293,12 @@ extern struct twl4030_power_data twl4030_generic_script;
*(Use TWL_4030_MODULE_INTBR)
*/
+#define REG_IDCODE_7_0 0x00
+#define REG_IDCODE_15_80x01
+#define REG_IDCODE_16_23 0x02
+#define REG_IDCODE_31_24 0x03
#define REG_GPPUPDCTR1 0x0F
+#define REG_UNLOCK_TEST_REG0x12
/*I2C1 and I2C4(SR) SDA/SCL pull-up control bits */
@@ -294,6 +307,8 @@ extern struct twl4030_power_data twl4030_generic_script;
#define SR_I2C_SCL_CTRL_PU BIT(4)
#define SR_I2C_SDA_CTRL_PU
Re: [PATCH V2 16/16] mmc: omap_hsmmc: add a hardware reset before initialization
Hi,
On Fri, May 6, 2011 at 14:44, Adrian Hunter adrian.hun...@nokia.com wrote:
After a warm restart, an eMMC which cannot be powered off is
in an unknown state, so reset it to be sure it will initialize.
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
drivers/mmc/host/omap_hsmmc.c | 38 +-
1 files changed, 37 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e1c9017..70b8ef8 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -530,10 +530,25 @@ static int omap_hsmmc_gpio_init(struct
omap_mmc_platform_data *pdata)
} else
pdata-slots[0].gpio_wp = -EINVAL;
+ if (gpio_is_valid(pdata-slots[0].gpio_hw_reset)) {
Not required as gpio_request takes care of it.
+ ret = gpio_request(pdata-slots[0].gpio_hw_reset,
+ mmc_hw_reset);
+ if (ret)
+ goto err_free_wp;
+ ret = gpio_direction_output(pdata-slots[0].gpio_hw_reset, 1);
Use gpio_request_one instead.
+ if (ret)
+ goto err_free_hw_reset;
+ } else
+ pdata-slots[0].gpio_hw_reset = -EINVAL;
+
return 0;
+
+err_free_hw_reset:
+ gpio_free(pdata-slots[0].gpio_hw_reset);
err_free_wp:
- gpio_free(pdata-slots[0].gpio_wp);
+ if (gpio_is_valid(pdata-slots[0].gpio_wp))
Not required as gpio_free takes care of it.
+ gpio_free(pdata-slots[0].gpio_wp);
err_free_cd:
if (gpio_is_valid(pdata-slots[0].switch_pin))
err_free_sp:
@@ -543,6 +558,8 @@ err_free_sp:
static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata)
{
+ if (gpio_is_valid(pdata-slots[0].gpio_hw_reset))
ditto
+ gpio_free(pdata-slots[0].gpio_hw_reset);
if (gpio_is_valid(pdata-slots[0].gpio_wp))
gpio_free(pdata-slots[0].gpio_wp);
if (gpio_is_valid(pdata-slots[0].switch_pin))
snip
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Module + offset calculations have to be signed in arch/arm/mach-omap2/pm-debug.c
On 05/05/2011 02:16 PM, Kevin Hilman wrote:
In any case, you've found a real bug, and your patch is valid. However,
it doesn't currently apply to mainline, and it looks like it's because
your patch is using spaces and the code being patched is using tabs.
Also, you can simplify the changelog to to just describe the fix needed
due to using negative offsets in some PRM modules.
I've attached a new patch to fix the tabs/changelog.
--
Peter Barada
peter.bar...@gmail.com
From 6857bb52af1fcd90e64d3e6c45de3ff0f071be7a Mon Sep 17 00:00:00 2001
From: Peter Barada peter.bar...@logicpd.com
Date: Fri, 6 May 2011 11:07:50 -0400
Subject: [PATCH] Make offset in pm_module_def signed to allow negative offsets.
Since PRM module offsets can be negative (IVA2 is -0x800), offset in
pm_module_def struct has to be signed.
---
arch/arm/mach-omap2/pm-debug.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git b/arch/arm/mach-omap2/pm-debug.c a/arch/arm/mach-omap2/pm-debug.c
index b731ef3..125f565 100644
--- b/arch/arm/mach-omap2/pm-debug.c
+++ a/arch/arm/mach-omap2/pm-debug.c
@@ -199,7 +199,7 @@ enum {
struct pm_module_def {
char name[8]; /* Name of the module */
short type; /* CM or PRM */
- short offset;
+ unsigned short offset;
int low; /* First register address on this module */
int high; /* Last register address on this module */
};
--
1.7.1
Re: [RFC/PATCH] OMAP PM: remove OMAP_PM_NONE config option
Salut Jean On Fri, 6 May 2011, Jean Pihet wrote: The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet j-pi...@ti.com I'm okay with this but could you please base it on v2.6.39-rc6 so I can merge it here? thanks - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Common clock and dvfs
Not that this is particularly related to DVFS, but: On Thu, 5 May 2011, Colin Cross wrote: On Thu, May 5, 2011 at 2:08 PM, Cousson, Benoit b-cous...@ti.com wrote: Colin Cross wrote: omap_hwmod is entirely omap specific, and any generic solution cannot be based on it. For the moment, because it is a fairly new design, but nothing should prevent us to make it generic if this abstraction is relevant for other SoC. That's not how you design abstractions. Oh really? You can't abstract one case, without considering other SoCs, and then make it generic if it fits other SoCs - it will never fit other SoCs. You have to consider all the cases you want it to cover, and design an abstraction that makes sense for the superset. In actual practice, one often does not know in advance the entire universe of cases that one needs to cover. Even just for one SoC. Consider that you mentioned earlier that you had to rewrite the Tegra clock code several times. Now, add several other families of SoCs to the requirements. If the documentation for these chips is even available at all, it is often misleading or wrong. Attempting to create an abstraction before one knows the underlying requirements of what one is actually trying to abstract is a plan for intense suffering. There's little glory in it. ... In the specific case of omap_hwmod, the core of the omap_hwmod data structures were designed such that they could apply to any SoC with a complex interconnect. The design was based on hardware principles common to any SoC: interconnects, IP blocks, reset lines, etc. There are OMAP-specific parts, but if others found omap_hwmod useful, they're trivial to abstract. We haven't sought to force it on others. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC/PATCH] OMAP PM: remove OMAP_PM_NONE config option
Hi Paul, On Fri, May 6, 2011 at 6:16 PM, Paul Walmsley p...@pwsan.com wrote: Salut Jean On Fri, 6 May 2011, Jean Pihet wrote: The current code base is not linking with the OMAP_PM_NONE option set. Since the option OMAP_PM_NOOP provides a no-op/debug layer, OMAP_PM_NONE can be removed. OMAP_PM_NOOP is enabled by default by Kconfig. Signed-off-by: Jean Pihet j-pi...@ti.com I'm okay with this but could you please base it on v2.6.39-rc6 so I can merge it here? I checked the patch against the master branch of both Tony's and Linus's trees, it applies and compiles OK. Is that OK to you? Regards, Jean thanks - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP2: CONFIG_TOUCHSCREEN_ADS7846 XOR CONFIG_MTD_NAND_OMAP2 breaks build
#ifdef clauses in arch/arm/mach-omap2/common-board-devices.h header file broke
kernel build when configured with CONFIG_TOUCHSCREEN_ADS7846 (XOR)
CONFIG_MTD_NAND_OMAP2
quick and dirty fix by using #ifdef clauses in the code file, too
---
arch/arm/mach-omap2/common-board-devices.c |7 +++
arch/arm/mach-omap2/common-board-devices.h |3 +--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/common-board-devices.c
b/arch/arm/mach-omap2/common-board-devices.c
index d57c71d..4f290e9 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -50,6 +50,9 @@ void __init omap_pmic_init(int bus, u32 clkrate,
omap_register_i2c_bus(bus, clkrate, pmic_i2c_board_info, 1);
}
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
+ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
+
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,/* 0: slave, 1: master */
@@ -105,7 +108,9 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown,
int gpio_debounce,
spi_register_board_info(ads7846_spi_board_info, 1);
}
+#endif
+#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
static struct omap_nand_platform_data nand_data = {
.dma_channel= -1, /* disable DMA in OMAP NAND driver */
};
@@ -146,3 +151,5 @@ void __init omap_nand_flash_init(int options, struct
mtd_partition *parts,
printk(KERN_ERR Unable to register NAND device\n);
}
}
+#endif
+
diff --git a/arch/arm/mach-omap2/common-board-devices.h
b/arch/arm/mach-omap2/common-board-devices.h
index ca03abf..eb4a07a 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -3,6 +3,7 @@
struct twl4030_platform_data;
struct mtd_partition;
+struct ads7846_platform_data;
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data);
@@ -28,8 +29,6 @@ static inline void omap4_pmic_init(const char *pmic_type,
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-struct ads7846_platform_data;
-
void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
struct ads7846_platform_data *board_pdata);
#else
--
1.7.1
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Re: Module + offset calculations have to be signed in arch/arm/mach-omap2/pm-debug.c
Hi Peter,
Peter Barada peter.bar...@gmail.com writes:
On 05/05/2011 02:16 PM, Kevin Hilman wrote:
In any case, you've found a real bug, and your patch is valid. However,
it doesn't currently apply to mainline, and it looks like it's because
your patch is using spaces and the code being patched is using tabs.
Also, you can simplify the changelog to to just describe the fix needed
due to using negative offsets in some PRM modules.
I've attached a new patch to fix the tabs/changelog.
Thanks for the updated patch.
[...]
From 6857bb52af1fcd90e64d3e6c45de3ff0f071be7a Mon Sep 17 00:00:00 2001
From: Peter Barada peter.bar...@logicpd.com
Date: Fri, 6 May 2011 11:07:50 -0400
Subject: [PATCH] Make offset in pm_module_def signed to allow negative
offsets.
Please post in separate mail, and give subject a prefix like:
OMAP: PM debug: use signed offset in pm_module_def
Also, please Cc the linux-arm-kernel mailing list:
linux-arm-ker...@lists.infradead.org for patches intended for mainline.
Since PRM module offsets can be negative (IVA2 is -0x800), offset in
pm_module_def struct has to be signed.
OK, but...
---
arch/arm/mach-omap2/pm-debug.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git b/arch/arm/mach-omap2/pm-debug.c a/arch/arm/mach-omap2/pm-debug.c
index b731ef3..125f565 100644
--- b/arch/arm/mach-omap2/pm-debug.c
+++ a/arch/arm/mach-omap2/pm-debug.c
@@ -199,7 +199,7 @@ enum {
struct pm_module_def {
char name[8]; /* Name of the module */
short type; /* CM or PRM */
- short offset;
+ unsigned short offset;
...this changes it from signed to unsigned.
int low; /* First register address on this module */
int high; /* Last register address on this module */
};
Kevin
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[PATCH v2] omap: fix build when MTD_NAND_OMAP2 and TOUCHSCREEN_ADS7846 are disabled
Commits 5e6a64b36ce346b7a2d481ef9fa315290eb28e5e (omap: move detection of
NAND CS to common-board-devices) and 96974a249b0cf3537f49115a59be67e2c54f315c
(omap: consolidate touch screen initialization among different boards)
break compilation when CONFIG_MTD_NAND_OMAP2 and
CONFIG_TOUCHSCREEN_ADS7846 are not selected.
Removing ifdefs and stubs from common-board-devices.h fixes the problem.
Signed-off-by: Mike Rapoport m...@compulab.co.il
CC: Oleg Drokin gr...@linuxhacker.ru
---
Hope this one is better.
arch/arm/mach-omap2/common-board-devices.c | 15 +++
arch/arm/mach-omap2/common-board-devices.h | 17 -
2 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/common-board-devices.c
b/arch/arm/mach-omap2/common-board-devices.c
index d57c71d..e94903b 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -50,6 +50,8 @@ void __init omap_pmic_init(int bus, u32 clkrate,
omap_register_i2c_bus(bus, clkrate, pmic_i2c_board_info, 1);
}
+#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
+ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0,
.single_channel = 1,/* 0: slave, 1: master */
@@ -105,7 +107,14 @@ void __init omap_ads7846_init(int bus_num, int
gpio_pendown, int gpio_debounce,
spi_register_board_info(ads7846_spi_board_info, 1);
}
+#else
+void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
+ struct ads7846_platform_data *board_pdata)
+{
+}
+#endif
+#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
static struct omap_nand_platform_data nand_data = {
.dma_channel= -1, /* disable DMA in OMAP NAND driver */
};
@@ -146,3 +155,9 @@ void __init omap_nand_flash_init(int options, struct
mtd_partition *parts,
printk(KERN_ERR Unable to register NAND device\n);
}
}
+#else
+void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
+int nr_parts)
+{
+}
+#endif
diff --git a/arch/arm/mach-omap2/common-board-devices.h
b/arch/arm/mach-omap2/common-board-devices.h
index ca03abf..eb80b3b 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -26,27 +26,10 @@ static inline void omap4_pmic_init(const char *pmic_type,
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
}
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
- defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
struct ads7846_platform_data;
void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
struct ads7846_platform_data *board_pdata);
-#else
-static inline void omap_ads7846_init(int bus_num,
-int gpio_pendown, int gpio_debounce,
-struct ads7846_platform_data *board_data)
-{
-}
-#endif
-
-#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
-#else
-static inline void omap_nand_flash_init(int opts, struct mtd_partition *parts,
- int nr_parts)
-{
-}
-#endif
#endif /* __OMAP_COMMON_BOARD_DEVICES__ */
--
1.7.3.1
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Re: [RFC/PATCH] OMAP PM: remove OMAP_PM_NONE config option
On Fri, 6 May 2011, Jean Pihet wrote: I checked the patch against the master branch of both Tony's and Linus's trees, it applies and compiles OK. Is that OK to you? If it applies cleanly against Linus's current tree, then yes, that's fine. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 1/4] OMAP2+: PM: omap device: API's for handling mstandby mode
On Mon, 28 Mar 2011, G, Manjunath Kondaiah wrote: Certain errata in OMAP2+ processors will require forcing master standby to no standby mode before completing on going operation. Without this, the results will be unpredictable. Thanks, I've queued this one (provisionally) for 2.6.40, assuming we have the diffstat budget for it. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] OMAP2+: hwmod: Add API to enable IO ring wakeup.
Hi
some comments
On Fri, 6 May 2011, Govindraj.R wrote:
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hmwod idle transition based on whether wakeup_flag is
set or cleared.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 35
+
arch/arm/plat-omap/include/plat/omap_device.h |1 +
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
arch/arm/plat-omap/omap_device.c | 27 +++
4 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index e034294..97d3302 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2369,3 +2369,38 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
return 0;
}
+
+/**
+ * omap_hwmod_enable_ioring_wakeup - Set wakeup bit for iopad ring.
+ * @oh: struct omap_hwmod *
+ * @enable: based on 0 or 1 set or unset wakeup bit.
+ *
+ * Traverse through dynamic pads, if pad is enabled then
+ * set wakeup enable bit flag for the mux pin. Wakeup pad bit
+ * will be set during hwmod idle transistion.
+ * Return error if pads are not enabled or not available.
+ */
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh, bool enable)
+{
+ struct omap_device_pad *pad;
+ int ret = -EINVAL, j;
+ int val = 0;
+
+ /* Enable pin mux to make pad wake-up capable */
+ if (enable)
+ val = OMAP_WAKEUP_EN;
+ else
+ val = ~OMAP_WAKEUP_EN;
Instead of combining enable and disable into the same function, please
create two functions, one enable function and one disable function, to
make the code that uses this easier to understand.
Please move the code beneath into a separate, static function, shared
between both functions.
+
+ if (oh-mux-enabled) {
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+ if (pad-flags OMAP_DEVICE_PAD_WAKEUP) {
+ pad-idle = pad-enable | val;
+ ret = 0;
+ }
+ }
+ }
+
+ return ret;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
b/arch/arm/plat-omap/include/plat/omap_device.h
index e4c349f..ce8e3e8 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -117,6 +117,7 @@ int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
+int omap_device_enable_ioring_wakeup(struct platform_device *pdev, bool
enable);
/*
* Entries should be kept in latency order ascending
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 1adea9c..b7f8d1b 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -601,6 +601,7 @@ int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh,
u8 state);
u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+int omap_hwmod_enable_ioring_wakeup(struct omap_hwmod *oh, bool enable);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
diff --git a/arch/arm/plat-omap/omap_device.c
b/arch/arm/plat-omap/omap_device.c
index 9bbda9a..82fb4a6 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -742,6 +742,33 @@ void __iomem *omap_device_get_rt_va(struct omap_device
*od)
return omap_hwmod_get_mpu_rt_va(od-hwmods[0]);
}
+/**
+ * omap_device_enable_ioring_wakeup - Set wakeup bit for iopad ring.
+ * @pdev: platform_device for which wakeup needs to be set.
+ * @enable: based on true or false set or unset ioring wakeup enable flag.
+ *
+ * Caller should ensure this is called if device_may_wakeup(dev) is true
+ * traverse through each hwmod and check each available pads
+ * if pad is enabled then set wakeup enable flag for the mux pin.
+ * Return error if pads are not enabled or not available.
+ * Wakeup enable flag will be we used during hwmod idle transistion
+ * to enable or disable wakeup capability for the pad.
+ */
+int omap_device_enable_ioring_wakeup(struct platform_device *pdev, bool
enable)
Instead of combining enable and disable into the same function, please
create two functions, one enable function and one disable function, to
make the code that uses this easier to understand.
+{
+ int ret = -EINVAL, i;
+ struct omap_device *od;
Re: [PATCH] OMAP: Added recalculation of clock rate in 'clk_set_rate'
On Thu, 21 Apr 2011, Gulati, Shweta wrote: Yes, but in current code clk_set_rate of dpll3_m2 - 'omap3_core_dpll_m2_set_rate' doesn't update clk.rate, I will submit patch fixing that bug and will make sure that set_rate of all clocks should update clk.rate Ping. Do you plan to post this soon? This should be a trivial patch. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Your Unsubscribe Request to us...@tortoisesvn.tigris.org
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