Daniel Mack wrote:
Well, it doesn't really affect me as I just use this as a development
platform for now. But please consider that there is hardware out there
which gets software updates through automated download and install
procedures. In such cases, you want as little dependencies between
Here are few miscellaneous patches for DSS. A pure cleanup patch from Nishant,
patch adding Color Phase Rotation support, and two minor fixes.
Tomi
Nishant Kamat (1):
OMAP: DSS: Minor cleanup in ovl and mgr cache structs
Tomi Valkeinen (3):
OMAP: DSS2: Add Color Phase Rotation support
From: Nishant Kamat nska...@ti.com
The overlay_cache_data and manager_cache_data structs include
the elements of omap_overlay_info and omap_overlay_manager_info
structs respectively. Include the structs instead of the individual
elements to reduce code.
Signed-off-by: Nishant Kamat
Add Color Phase Rotation (CPR) support and sysfs files to enable CPR and
to set the CPR coefficient matrix.
CPR is enabled via manager?/cpr_enable file, and the coefficient matrix
is set via manager?/cpr_coef file. The values in cpr_coef are in the
following order:
RR RG RB GR GG GB BR BG BB
When the panel driver calls omapdss_dsi_display_disable() it is possible
that there are still some unsent packets in the TX fifo.
Add dsi_sync_vc() calls in the beginning of
omapdss_dsi_display_disable() to make sure the TX fifos are empty.
This allows us to remove the msleep(10) hack from
The DMA FIFO threshold registers and burst size registers have changed
for OMAP4. The current code only handles OMAP2/3 case, and so the
values are a bit off for OMAP4. A summary of the differences between
OMAP2/3 and OMAP4:
Burst size:
OMAP2/3: 4 x 32 bits / 8 x 32 bits / 16 x 32 bits
OMAP4: 2
On Tue, Jun 21, 2011 at 8:18 AM, Ohad Ben-Cohen o...@wizery.com wrote:
+/* bootaddr isn't needed for the dual M3's */
+static inline int omap_rproc_start(struct rproc *rproc, u64 bootaddr)
+static inline int omap_rproc_stop(struct rproc *rproc)
These two functions don't need to be inline as
On Tue, Jun 21, 2011 at 05:06:58PM -0700, Stephen Boyd wrote:
On 06/21/2011 04:10 PM, Russell King - ARM Linux wrote:
On Tue, Jun 21, 2011 at 01:16:47PM -0700, Stephen Boyd wrote:
On 06/21/2011 03:26 AM, Russell King - ARM Linux wrote:
On Tue, Jun 21, 2011 at 03:51:00PM +0530, Santosh
For better navigation this patch moves the drivers/iommu
drivers into its own submenu in Kconfig.
Signed-off-by: Joerg Roedel joerg.roe...@amd.com
---
drivers/iommu/Kconfig | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/drivers/iommu/Kconfig
A few parts of the driver were missing in drivers/iommu.
Move them there to have the complete driver in that
directory.
Signed-off-by: Joerg Roedel joerg.roe...@amd.com
---
arch/x86/kernel/Makefile |1 -
drivers/iommu/Makefile |2 +-
Okay, I applied the patches to move forward with them. On-top I also put
two additional patches which are sent as a follow-up to this mail.
These changes are at
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
in the core branch.
Thanks,
Joerg
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On Wed, Jun 22, 2011 at 5:42 AM, Rusty Russell ru...@rustcorp.com.au wrote:
On Tue, 21 Jun 2011 10:18:33 +0300, Ohad Ben-Cohen o...@wizery.com wrote:
Add a virtio-based IPC bus, which enables kernel users to communicate
with remote processors over shared memory using a simple messaging
On Wed, Jun 22, 2011 at 1:05 PM, Will Newton will.new...@gmail.com wrote:
On Tue, Jun 21, 2011 at 8:18 AM, Ohad Ben-Cohen o...@wizery.com wrote:
+/* bootaddr isn't needed for the dual M3's */
+static inline int omap_rproc_start(struct rproc *rproc, u64 bootaddr)
+static inline int
From: Russell King rmk+ker...@arm.linux.org.uk
Secondary CPU bringup typically calls calibrate_delay() during its
initialization. However, calibrate_delay() modifies a global variable
(loops_per_jiffy) used for udelay() and __delay().
A side effect of 71c696b1 (calibrate: extract fall-back
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of
Ghongdemath, Girish
Sent: Wednesday, June 22, 2011 5:55 AM
To: linux-omap
Cc: Ghongdemath, Girish
Subject: [PATCH 1/2] OMAP4 :TWL6030: Regulator set the
default
Hi Arnd,
On Tue, Jun 21, 2011 at 5:20 PM, Arnd Bergmann a...@arndb.de wrote:
This looks really nice overall, but I don't currently have time for a
more in-depth review. My feeling is that you are definitely on the right
track here, and the plans you list as TODO to continue are all good.
The i2c module should be reset as part of the hwmod setup for i2c modules.
This is happening for omap2 and omap3 i2c modules. But for omap4, the i2c is
not reset because of the HWMOD_INIT_NO_RESET reset flags. Remove these flags
to ensure i2c is reset as a part of setup.
Cc: Rajendra Nayak
The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a
special sequence to reset the module. The sequence is
- Disable the I2C.
- Write to SOFTRESET bit.
- Enable the I2C.
- Poll on the RESETDONE bit.
The sequence is implemented as a function and the i2c_class is updated
From: Misael Lopez Cruz misael.lo...@ti.com
Configure, and enable the twl6040 codec on SDP4430.
Signed-off-by: Misael Lopez Cruz misael.lo...@ti.com
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c | 10 +-
1 files changed, 9 insertions(+), 1
Hello Dmitry,
On Tuesday 21 June 2011 22:32:01 Dmitry Torokhov wrote:
On Tue, Jun 21, 2011 at 04:39:09PM +0300, Peter Ujfalusi wrote:
From: Misael Lopez Cruz misael.lo...@ti.com
Add twl6040_vibra as a child of MFD device twl6040_codec. This
implementation covers the PCM-to-PWM mode of
Hello Mark,
On Tuesday 21 June 2011 19:35:05 Mark Brown wrote:
On Tue, Jun 21, 2011 at 04:39:13PM +0300, Peter Ujfalusi wrote:
From: Misael Lopez Cruz misael.lo...@ti.com
Remove dependency between pll (hppll, lppll) and headset power
mode (low-power, high-performance), as headset power
On Wednesday 22 June 2011, Ohad Ben-Cohen wrote:
One point I noticed is the use of debugfs, which you should probably
replace at some point with a stable API, e.g. your own debugfs-like
file system, but there is no hurry to do that now.
debugfs is only being used to expose debugging info
On Wed, Jun 22, 2011 at 4:05 PM, Arnd Bergmann a...@arndb.de wrote:
Ok, I see. In that case I agree that using debugfs is fine, but I would
recommend trying to use fewer macros and just open-coding the file
operations for better readability.
Sure thing. It didn't end up saving much code
On Wed, Jun 22, 2011 at 6:18 AM, Premi, Sanjeev pr...@ti.com wrote:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of
Ghongdemath, Girish
Sent: Wednesday, June 22, 2011 5:55 AM
To: linux-omap
Cc: Ghongdemath, Girish
lazy_disable framework in OMAP HSMMC manages multiple low power states
and Card is powered off after inactivity time of 8 seconds.
Based on previous discussion on the list Card power(regulator)
handling (when to power OFF/ON) should ideally be handled by core layer.
Remove usage of lazy disable to
Removing the custom state machine - lazy disable framework in omap_hsmmc
to make way for runtime pm to handle host controller
power states.
This allows mmc_host_enable/mmc_host_disable to be replaced by
runtime get_sync and put_sync at host controller driver.
Enable runtime PM in omap_hsmmc
add runtime pm support to HSMMC host controller
Use runtime pm API to enable/disable HSMMC clock
Use runtime autosuspend APIs to enable auto suspend delay
Based on OMAP HSMMC runtime implementation by Kevin Hilman, Kishore Kadiyala
Signed-off-by: Balaji T K balaj...@ti.com
---
After runtime conversion to handle clk,
iclk node is not used
However fclk node is still used to get clock rate.
Signed-off-by: Balaji T K balaj...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git
On Wed, Jun 22, 2011 at 5:54 AM, Girish S G giris...@ti.com wrote:
TWL6030 below table shows the default state each LDO's can
be put into.
+---+
| LDO | Usage | state |
Tony,
Does this one look better?
On 06/15/11 00:16, Igor Grinberg wrote:
cm-t3730 is basically the same board as cm-t35,
but has AM/DM3730 SoC assembled and therefore some changes are required.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
Acked-by: Mike Rapoport
-Original Message-
From: Ghongdemath, Girish
Sent: Wednesday, June 22, 2011 7:23 PM
To: Premi, Sanjeev
Cc: linux-omap
Subject: Re: [PATCH 1/2] OMAP4 :TWL6030: Regulator set the
default behavior of LDO's
On Wed, Jun 22, 2011 at 6:18 AM, Premi, Sanjeev pr...@ti.com wrote:
Currently cpu_suspend is not like a normal C function - when it's called
it returns normally to a bunch of code which is not expected to return.
The return path is via code pointed to by 'r3'.
It also corrupts a bunch of registers in ways which make it non-compliant
with a C API.
If we do make
Eliminate the differences between MULTI_CPU and non-MULTI_CPU resume
paths, making the saved structure identical irrespective of the way
the kernel was configured.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S
Move the return address for cpu_resume to the top of stack so that
cpu_resume looks more like a normal function.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S | 16
1 files changed, 8
Make cpu_suspend()..return function preserve r4 to r11 across a suspend
cycle. This is in preparation of relieving platform support code from
this task.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S |5
In the previous commit, we introduced an official way to supply an
argument to the suspend function. Convert the sa1100 suspend code
to use this method.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-pxa/sleep.S |8
1 files changed, 4 insertions(+), 4
cpu_suspend() has a weird calling method which makes it only possible to
call from assembly code: it returns with a modified stack pointer to
finish the suspend, but on resume, it 'returns' via a provided pointer.
We can make cpu_suspend() appear to be a normal function merely by
swapping the
Save the suspend function pointer onto the stack for use when returning.
Allocate r2 to pass an argument to the suspend function.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S |9 +
1 files
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention. Remove these redundant instructions.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-s5pv210/sleep.S |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git
sa1100_cpu_suspend does not need to save any registers to the stack
with the new cpu_suspend calling convention. Remove these redundant
instructions.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-sa1100/sleep.S |4 ++--
1 files changed, 2 insertions(+), 2
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention. Remove these redundant instructions.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-exynos4/sleep.S |5 +
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention. Remove these redundant instructions.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-s3c64xx/sleep.S |4 +---
1 files
We don't need a veneer for cpu_suspend, it can be called directly from
C code now. Move it into sa11x0_pm_enter() along with the re-enabling
of clock switching.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-sa1100/pm.c|7 +--
arch/arm/mach-sa1100/sleep.S
Avoid using r2 and r3 in the suspend code, allowing these to be
passed further into the function as arguments.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S | 18 +-
1 files changed, 9
Very little code is different between these two paths now, so extract
the common code.
Acked-by: Frank Hofmann frank.hofm...@tomtom.com
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/sleep.S | 24 ++--
1 files changed, 6 insertions(+), 18
s3c_cpu_save does not need to save any registers with the new
cpu_suspend calling convention. Remove these redundant instructions.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/plat-s3c24xx/sleep.S |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git
Remove now redundant stacking of registers.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-pxa/sleep.S | 33 +
1 files changed, 13 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index
Ensure that the TLS register is saved and restored over a suspend
cycle, so that userspace programs don't see a corrupted TLS value.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mm/proc-v7.S | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git
Convert sa11x0 to use the generic CPU suspend/resume support, rather
than implementing its own version. Tested on 3430 LDP.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-omap2/pm34xx.c| 39 ++--
arch/arm/mach-omap2/sleep34xx.S | 130
cpu_proc_init() does processor specific initialization, which we do
at boot time. We have been omitting to do this on resume, which
causes some of this initialization to be skipped. We've also been
skipping this on SMP initialization too.
Ensure that cpu_proc_init() is always called
This is now taken care of by calling cpu_proc_init() in the resume
path, so eliminate this unnecessary call.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-sa1100/pm.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-sa1100/pm.c
The code alludes to r9 being used to indicate what was lost over the
suspend/resume transition. However, although r9 is set, it is never
actually used.
Also, the comments before the code (which refer to the value of r9)
and the comments against the assignment of r9 contradict each other,
so just
As we have core code dealing with CPU suspend/resume, we can
re-initialize the CPUs exception banked registers via that code rather
than having platforms deal with that level of detail. So, move the
call to cpu_init() out of platform code into core code.
Signed-off-by: Russell King
The core suspend code calls flush_cache_all() immediately prior to
calling the suspend finisher function, so remove these needless calls
from the finisher functions.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-s3c2412/pm.c |2 --
arch/arm/mach-s3c2416/pm.c |
The ABI allows called functions to corrupt r0-r3 and ip (r12). So
its pointless saving these registers in the suspend code - the
calling function will expect them to be corrupted and so won't rely
on their contents after resume.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
Move the call to cpu_suspend into C code, and noticing that all the
s3c_cpu_save implementations are now identical, we can move this
into the common samsung code.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-exynos4/pm.c |2 +-
We don't need a veneer for cpu_suspend, it can be called directly from
C code now. Move it into the PXA CPU suspend functions, along with
the accumulator register saving/restoring.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/mach-pxa/include/mach/pm.h |4 +-
Hi Balaji,
On 6/22/2011 4:18 PM, Krishnamoorthy, Balaji T wrote:
Removing the custom state machine - lazy disable framework in omap_hsmmc
to make way for runtime pm to handle host controller
power states.
This allows mmc_host_enable/mmc_host_disable to be replaced by
runtime get_sync and
A couple of things to point out here:
On Wed, Jun 22, 2011 at 04:16:58PM +0100, Russell King - ARM Linux wrote:
- mrc p15, 0, r4, c13, c0, 1 @ Context ID
- mrc p15, 0, r5, c13, c0, 2 @ User r/w thread and process ID
- mrc p15, 0, r6, c12, c0, 0 @ Secure or NS vector
Hi Rajendra,
On Wed, 15 Jun 2011, Rajendra Nayak wrote:
This is to take the discussion forward which I started here
http://marc.info/?l=linux-omapm=130812942102354w=2
on how to support the omap_pm_get_device_context_loss_count()
api on OMAP4.
I started to work on this and thought I almost
On 6/22/2011 4:18 PM, Krishnamoorthy, Balaji T wrote:
After runtime conversion to handle clk,
iclk node is not used
However fclk node is still used to get clock rate.
Signed-off-by: Balaji T Kbalaj...@ti.com
---
drivers/mmc/host/omap_hsmmc.c | 10 --
1 files changed, 0
I was able to test this on OMAP3 beagleboard and got it working properly
after some sweating.
Version 3 changes:
- Changed omap3 PRCM wakeup interrupt handler to be a dummy, wakeup irq
clearing is now done when we are entering idle. This prevents PRCM
interrupt hanging in case UART is
This is required by OMAP3 as it needs to dynamically unmask events during
idle cycle.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 17 ++---
arch/arm/plat-omap/include/plat/prcm.h |1 +
2 files changed, 15 insertions(+), 3 deletions(-)
PRCM interrupt handler will now parse registered pads to see whether there
is an active wakeup event. If this is the case, the corresponding interrupt
will be triggered. This can be used for example with UART driver to register
PAD wakeup event for the UART RX pin, and when this happens, UART
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
arch/arm/mach-omap2/serial.c | 40 +---
2 files changed, 21 insertions(+), 38 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c
Any tty access should enable UART port first if it is idle.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/tty/serial/omap-serial.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index
PRCM interrupts are now handled with the chained handler mechanism. This patch
also changes the PRCM interrupts to be of one-shot type, and the interrupt
does not clear the wakeup statuses anymore. Clearing of the wakeup interrupts
is done just before entering idle, as we probably have more time
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC
Le mercredi 22 juin 2011 à 11:55 +0100, Russell King - ARM Linux a
écrit :
From: Russell King rmk+ker...@arm.linux.org.uk
Secondary CPU bringup typically calls calibrate_delay() during its
initialization. However, calibrate_delay() modifies a global variable
(loops_per_jiffy) used for
Hi,
There seems to be still one issue with this patch. It fails to protect
against pr_warning from omap_device.c in some cases, console_trylock()
console_unlock() hacks inside UART clock enable / disable are not enough
to protect against this. This bug can be prevented by removing the
On Tue, 21 Jun 2011 10:18:27 +0300 Ohad Ben-Cohen wrote:
Hi,
Just a few minor nits inline...
diff --git a/Documentation/remoteproc.txt b/Documentation/remoteproc.txt
new file mode 100644
index 000..3075813
--- /dev/null
+++ b/Documentation/remoteproc.txt
@@ -0,0 +1,170 @@
+Remote
Balaji T K balaj...@ti.com writes:
lazy_disable framework in OMAP HSMMC manages multiple low power states
and Card is powered off after inactivity time of 8 seconds.
Based on previous discussion on the list Card power(regulator)
needs some punctuation for readability.
handling (when to
Balaji T K balaj...@ti.com writes:
add runtime pm support to HSMMC host controller
Use runtime pm API to enable/disable HSMMC clock
Use runtime autosuspend APIs to enable auto suspend delay
Based on OMAP HSMMC runtime implementation by Kevin Hilman, Kishore Kadiyala
Signed-off-by: Balaji T
Hi Randy,
On Wed, Jun 22, 2011 at 8:55 PM, Randy Dunlap rdun...@xenotime.net wrote:
On Tue, 21 Jun 2011 10:18:27 +0300 Ohad Ben-Cohen wrote:
Hi,
Just a few minor nits inline...
Thanks!
Ohad.
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On Wed, Jun 22, 2011 at 9:11 PM, Sjur Brændeland
sjur.brandel...@stericsson.com wrote:
+/*
+ * API for HSI clients
+ */
+int hsi_async(struct hsi_client *cl, struct hsi_msg *msg);
+
+/**
I'm pleased to see scatter list support. But is this supported by all HW?
What is the behavior if HW doesn't
Hi Carlos,
Some weeks ago I submitted a CAIF-HSI protocol driver for
Linux 3.0.1, located in drivers/net/caif in David Miller's net-next-2.6.
This driver depends on a platform specific glue-layer.
It would be nice to adapt to a generic HSI API, so I'm looking forward
to see a this patch going
Hi Carlos,
...
+static ssize_t hsc_read(struct file *file, char __user *buf, size_t len,
+ loff_t *ppos __maybe_unused)
+{
...
+ ret = hsi_async_read(channel-cl, msg);
+
+ ret = wait_event_interruptible(channel-rx_wait,
+
On Wed, Jun 22, 2011 at 04:08:16PM +0100, Russell King - ARM Linux wrote:
Tested on Assabet (SA1100) and 3430LDP only.
Correction - because suspend only goes into retention mode, these
changes have not been tested on the 3430. Someone who knows what
they're doing with the mega-complicated OMAPs
On Tue, Jun 21, 2011 at 5:24 PM, Girish S G giris...@ti.com wrote:
snip
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 04b7770..46f6800 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -560,6 +560,9
On Wed, Jun 22, 2011 at 5:12 PM, Pandita, Vikram vikram.pand...@ti.com wrote:
On Tue, Jun 21, 2011 at 5:24 PM, Girish S G giris...@ti.com wrote:
snip
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 04b7770..46f6800 100644
---
On 6/23/2011 2:31 AM, Russell King - ARM Linux wrote:
On Wed, Jun 22, 2011 at 04:08:16PM +0100, Russell King - ARM Linux wrote:
Tested on Assabet (SA1100) and 3430LDP only.
Correction - because suspend only goes into retention mode, these
changes have not been tested on the 3430. Someone who
On 6/22/2011 9:40 PM, Russell King - ARM Linux wrote:
A couple of things to point out here:
On Wed, Jun 22, 2011 at 04:16:58PM +0100, Russell King - ARM Linux wrote:
- mrc p15, 0, r4, c13, c0, 1 @ Context ID
- mrc p15, 0, r5, c13, c0, 2 @ User r/w thread and process ID
-
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM
Hi Sanjeev,
On Mon, Jun 20, 2011 at 6:16 PM, Premi, Sanjeev pr...@ti.com wrote:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of K, Mythri P
Sent: Friday, June 17, 2011 1:47 PM
To: linux-omap@vger.kernel.org; Valkeinen,
Hi Sanjeev,
On Mon, Jun 20, 2011 at 7:03 PM, Premi, Sanjeev pr...@ti.com wrote:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of K, Mythri P
Sent: Friday, June 17, 2011 1:47 PM
To: linux-omap@vger.kernel.org; Valkeinen,
Hi,
On Mon, Jun 20, 2011 at 7:18 PM, Premi, Sanjeev pr...@ti.com wrote:
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of K, Mythri P
Sent: Friday, June 17, 2011 1:47 PM
To: linux-omap@vger.kernel.org; Valkeinen, Tomi
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