On Wed, Oct 3, 2012 at 5:05 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Hi Santosh, Tero,
I just added my 4460/PandaES to my board farm for automated PM testing
and see that basic suspend/resume tests don't work in mainline. It
fails on v3.6 and linux-next,arm-soc/for-next.
Adding
Hi Mark,
On Wed, Oct 03, 2012 at 01:52:18AM +0100, Mark A. Greer wrote:
From: Mark A. Greer mgr...@animalcreek.com
Commit 923df96b9f31b7d08d8438ff9677326d9537accf
(ARM: 7451/1: arch timer: implement read_current_timer and get_cycles)
modifies get_cycles() such that it calls
On Tue, Oct 02, 2012 at 11:07:30PM +0200, Janusz Krzysztofik wrote:
Is something wrong with this patch? Any chance for it to find its way into
3.7?
I don't have the patch.
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To unsubscribe from this list: send the line unsubscribe linux-omap in
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The old method of registering with the ASoC core by creating a
soc-audio platform device no longer works for Amstrad Delta sound card
after recent changes to drvdata handling (commit
0998d0631001288a5974afc0b2a5f568bcdecb4d, 'device-core: Ensure drvdata =
NULL when no driver is bound'.
Use
On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote:
On Mon, Oct 1, 2012 at 5:44 PM, Tony Lindgren t...@atomide.com wrote:
OK that is typical pinctrl driver implementation work.
I hope Tony can advice on this?
I think we're best off to just stick to alternative named modes
passed
Special character detect enable if enabled by default.Received data
comparison with XOFF2 data happens by default.
tty provides only XOFF1 no X0FF2 is provided so no need
to enable check for XOFF2.
Keeping this enabled might give some slow transfers due to dummy xoff2
comparison with xoff2 reset
Currently the array serial_omap_console_ports is hard coded to 4.
Make it depend on the maximum uart count.
Post to [cfc55bc ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6]
the max ports is 6.
Cc: AnilKumar Ch anilku...@ti.com
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
get_context_loss_count returns an int however it is stored in
unsigned integer context_loss_cnt . This patch tries to make
context_loss_cnt int. So that in case of errors the value
(which may be negative) is not interpreted wrongly.
In serial_omap_runtime_resume in case of errors returned by
On Wed, Oct 3, 2012 at 12:52 PM, AnilKumar, Chimata anilku...@ti.com wrote:
On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote:
This is what we're doing for ux500 and should be a good model.
I have looked into this, but not seen any named modes.
OK maybe it's not easy to find. If you look
Hi Kevin,
On Wed, Oct 3, 2012 at 12:21 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Hi Jean,
Jean Pihet jean.pi...@newoldbits.com writes:
Remove the device dependent settings (cpu_is_xxx(), IP fck etc.)
from the driver code and pass them instead via the platform
data.
This allows a
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
Hi all,
On 26/09/2012, Philippe De Swert philippe.desw...@jollamobile.com wrote:
Hi,
On Tue, Sep 25, 2012 at 2:39 PM, Philippe De Swert
Then maybe it's best to just remove the ifdefs and always provide
generic_interrupt() ?
Anyone against it ?
Mark,
Please note we have an Ack from Tony.
http://mailman.alsa-project.org/pipermail/alsa-devel/2012-September/055493.html
Thanks,
Janusz
---
Subject: Re: [PATCH] ASoC: ams-delta: Convert to use snd_soc_register_card()
Date: niedziela, 16 wrzeĊnia 2012, 13:44:23
From: Tony Lindgren
Shilimkar, Santosh santosh.shilim...@ti.com writes:
On Wed, Oct 3, 2012 at 5:05 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Hi Santosh, Tero,
I just added my 4460/PandaES to my board farm for automated PM testing
and see that basic suspend/resume tests don't work in mainline. It
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Jarkko Nikula jarkko.nik...@bitmer.com
Cc: Liam Girdwood l...@ti.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Jaroslav Kysela pe...@perex.cz
Cc: Takashi Iwai ti...@suse.de
Cc: linux-omap@vger.kernel.org
Cc: alsa-de...@alsa-project.org
Adds support to use ELM as BCH 4 8 bit error correction module and
adds support for single shot read_page and write_page functions
Platforms containing the ELM module can be used to correct errors
reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit
support is added.
BCH 4 8 bit
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12
1 files changed, 8
Platforms containing the ELM module can be used to correct errors
reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit
support is added.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley
On 10/03/2012 05:31 PM, Tim Gardner wrote:
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Jarkko Nikula jarkko.nik...@bitmer.com
Cc: Liam Girdwood l...@ti.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Jaroslav Kysela pe...@perex.cz
Cc: Takashi Iwai ti...@suse.de
Cc:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured
ELM module can be used for error correction of BCH 4 8 bit. Also
support read write page in one shot by adding custom read_page
write_page methods. This helps in optimizing code.
New structure member is_elm_used is added to know the status of
whether the ELM module is used for error correction
On Fri, Sep 28, 2012 at 03:37:45PM -0400, Matt Porter wrote:
Changes since v1:
- Replaced uio_pruss private SRAM API use with genalloc
- Added DA850 platform device and clock support
- Added DA850 L3 RAM gen_pool support
- Split out DT binding
This series enables
some minor nitpicks below
Platforms containing the ELM module can be used to correct errors
reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit
support is added.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
From: Jean Pihet j-pi...@ti.com
Rename the smartreflex fck names for consistency and better readability;
rename the clock aliases for use by the SmartReflex driver, with the
smartreflex.%d format.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/clock33xx_data.c | 12
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
Kevin,
On Wed, Oct 3, 2012 at 4:29 PM, Kevin Hilman
khil...@deeprootsystems.com wrote:
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This
* AnilKumar, Chimata anilku...@ti.com [121003 03:53]:
On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote:
On Mon, Oct 1, 2012 at 5:44 PM, Tony Lindgren t...@atomide.com wrote:
OK that is typical pinctrl driver implementation work.
I hope Tony can advice on this?
I think we're
* Peter Ujfalusi peter.ujfal...@ti.com [121003 07:52]:
On 10/03/2012 05:31 PM, Tim Gardner wrote:
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Jarkko Nikula jarkko.nik...@bitmer.com
Cc: Liam Girdwood l...@ti.com
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Jaroslav Kysela
* Tony Lindgren t...@atomide.com [121003 09:00]:
* Peter Ujfalusi peter.ujfal...@ti.com [121003 07:52]:
On 10/03/2012 05:31 PM, Tim Gardner wrote:
Cc: Peter Ujfalusi peter.ujfal...@ti.com
Cc: Jarkko Nikula jarkko.nik...@bitmer.com
Cc: Liam Girdwood l...@ti.com
Cc: Mark Brown
McPDM needs platt/cpu.h for omap_rev and not omap_hwmod.h.
Drivers must not include omap_hwmod.h at, it will be
private to mach-omap2 soon. Fix the problem before other
drivers will also start including omap_hwmod.h.
Note that also plat/cpu.h will be going away, so the
omap_rev check needs to be
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL,
Hi Tony,
On Wed, Oct 3, 2012 at 7:00 PM, Tony Lindgren t...@atomide.com wrote:
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
Hi,
* Tony Lindgren t...@atomide.com [120928 08:02]:
* Tomi Valkeinen tomi.valkei...@ti.com [120928 05:05]:
Hi,
I'm a bit at loss how to deal with drivers/video/omap2/vrfb.c.
VRFB is part of the SDRAM controller on OMAP2 and OMAP3. vrfb.c uses the
following functions from sdrc.h:
On Wed, Oct 03, 2012 at 03:29:48PM +0100, Philip, Avinash wrote:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured
On Wed, Oct 03, 2012 at 03:29:49PM +0100, Philip, Avinash wrote:
ELM module can be used for error correction of BCH 4 8 bit. Also
support read write page in one shot by adding custom read_page
write_page methods. This helps in optimizing code.
New structure member is_elm_used is added to
Hi Matt,
On 2 October 2012 16:25, Matt Porter mpor...@ti.com wrote:
...
I can see why you went this path with the iommu driver as it already had
some integration code present here. I have some concerns going forward
about how this should be long-term. Take any platform booting only with
DT
From: Kevin Hilman khil...@ti.com
Currently, a dummy omap_device is created for the MPU sub-system so
that a device node exists for MPU DVFS. Specifically, for the
association of MPU OPPs to a device node, and so that a voltage
regulator can be mapped to a device node.
For drivers to get a
* Alan Cox a...@linux.intel.com [120911 12:02]:
Even better would be if for other cases is_omap_port and friends
returned 0...
Yes it seems that those macros could be moved from plat-omap/serial.h
to live in drivers/tty/serial/8250/8250.h? Or do you have some better
place in mind?
From: Kevin Hilman khil...@ti.com
Here's a series with a couple bug fixes and a couple fixes that
make this driver support newer OMAP-based SoCs.
The 'get_cpu_device' patch is needed due to a change in the OMAP
OMAP PM core code which enforces use of get_cpu_device() instead of
a deprecated
From: Kevin Hilman khil...@ti.com
OMAP PM core code has moved to using the existing, generic CPU devices
for attaching OPPs, so the CPUfreq driver can now use the generic
get_cpu_device() API instead of the OMAP-specific omap_device API.
This allows us to remove the last plat/* include from this
From: Kevin Hilman khil...@ti.com
The plat/*.h headers are going away, and this one is not used. remove it.
Signed-off-by: Kevin Hilman khil...@ti.com
---
drivers/cpufreq/omap-cpufreq.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/cpufreq/omap-cpufreq.c
From: Kevin Hilman khil...@ti.com
Ensure the clock rate that will be used is a valid one before
attempting to scale the voltage. Currently the driver assumes it has
a valid frequency from the OPP table, but boards using different
system oscillators might not have exact matches with the OPP
From: Paul Walmsley p...@pwsan.com
OMAP core code now has SoC-independent clock alias for the scalable
CPU clock. Using it means driver is SoC independent and will work for
AM3xxx SoCs as well as OMAP1/3/4.
While here, remove some unnecessary plat/ includes that are
interfering with
Tony Lindgren t...@atomide.com writes:
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck,
From: Mike Turquette mturque...@linaro.org
Implement the voltdm-get_voltage callback for the voltage controller
driver. This reads the DATA field corresponding to each VC and returns
the voltage, after converting it from vsel format.
If DATA is zero (the reset value) then the caller must
From: Mike Turquette mturque...@linaro.org
Introduces a new callback to struct voltagedomain for retrieving the
voltage of the voltage domain from the hardware. This will be used to
populate voltdm-nominal_volt during initialization of the voltage code
instead of waiting for the first call to
From: Mike Turquette mturque...@linaro.org
Populate the .get_voltage callbacks for VC VP. Use these callbacks to
populate voltdm-nominal_volt during boot sequence.
This is useful for the Adaptive Body-Bias sequence coming in a
subsequent series. Without this patch voltdm-nominal will not be
From: Mike Turquette mturque...@linaro.org
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/vc.c |2 +-
arch/arm/mach-omap2/vc.h |2 +-
arch/arm/mach-omap2/vc3xxx_data.c |2 +-
arch/arm/mach-omap2/vc44xx_data.c |2 +-
4 files changed,
From: Mike Turquette mturque...@linaro.org
This series creates a new callback for struct voltagedomain,
.get_voltage. This fetches the voltage from hardware, if possible, and
returns it to the caller. We use this call to populate
voltdm-nominal_volt at boot time.
The need for this came out of
From: Mike Turquette mturque...@linaro.org
Implement the voltdm-get_voltage callback for the voltage processor
driver. This reads the INITVOLTAGE field corresponding to each VP and
returns the voltage, after converting it from vsel format.
If INITVOLTAGE is zero (the reset value) then the
From: Mike Turquette mturque...@linaro.org
Adaptive Body-Bias ldos are present for some voltage domains starting
with OMAP3630. They have three modes of operation:
* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
Some PRM_IRQSTATUS registers contain a bit to signal that an ABB LDO
transition has completed. These tranxdone bits exist for every instance
of an ABB LDO; thus these tranxdone bits are supported on 36xx variants
for the MPU voltage domain, and on 44xx variants for the MPU and IVA
voltage
OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU
interrupts related to voltage control that are not present on OMAP34XX.
This patch adds the offsets, register addresses, bitfield shifts and
masks to support this feature.
Signed-off-by: Mike Turquette mturque...@ti.com
The operating mode of the Adaptive Body-Bias ldo is a function of the
voltage at which the VDD is operating and silicon characteristics.
NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage.
FAST_OPP causes the ldo to operate in Forward Body-Bias mode. SLOW_OPP
puts the ldo in
Starting with OMAP36XX, some voltage domains have an ldo for biasing
voltage to the transistors within that domain.
This ldo has three modes of operation. The first is Forward Body-Bias
mode (FBB) which boosts performance of transistors at high OPPs by
providng a positive voltage bias. This
This patch adds struct omap_abb_instance to struct voltagedomain and
populates the data for those voltage domains that have an ABB ldo on
both 36xx and 44xx silicon.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
Adaptive Body-Bias ldo state should be transitioned (if necessary)
during any voltage scaling operation.
This patch initializes ABB LDO's as a part of the greater voltage domain
initialization sequence and adds the ABB transition callbacks to the
primary voltage domain scaling function,
The Adaptive Body-Bias ldo can be set to bypass, Forward Body-Bias or
Reverse Body-Bias during a voltage transition. The ABB programming
sequence depends on whether voltage is scaling up or down.
This patch implements the Adaptive Body-Bias ldo initialization routine
and the transition sequence
On Friday, September 28, 2012 7:35 PM Tomi Valkeinen wrote
Hi,
This series adds an omapdss_version enum that is passed via platform data to
omapdss driver. This version identifier is then used instead of cpu_is_*()
calls.
Hi Tomi,
As you mentioned, cpu_is_*() is not preferable in driver.
On Wed, Oct 3, 2012 at 6:26 PM, Mike Turquette mturque...@ti.com wrote:
The Adaptive Body-Bias ldo can be set to bypass, Forward Body-Bias or
Reverse Body-Bias during a voltage transition. The ABB programming
sequence depends on whether voltage is scaling up or down.
This patch implements
On Wed, Oct 3, 2012 at 7:15 PM, Philippe De Swert
philippe.desw...@jollamobile.com wrote:
So any comments on the approach here (see patch kept below)? Or should I
immediately send it as a new patch to get the comments? I sent it in this
thread as it also solves the issue I have.
Patch is
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