Re: OMAP4460/PandaES: hang during resume
On Wed, Oct 3, 2012 at 5:05 AM, Kevin Hilman khil...@deeprootsystems.com wrote: Hi Santosh, Tero, I just added my 4460/PandaES to my board farm for automated PM testing and see that basic suspend/resume tests don't work in mainline. It fails on v3.6 and linux-next,arm-soc/for-next. Adding 'no_console_suspend' to the cmdline shows me that wakeup event is happening so the hang is somewhere during resume. I haven't dug any deeper than that. This works fine on 4430/Panda. Do you know of anything else we're missing in mainline for a basic suspend/resume test on 4430? OMAP4460 has one ROM code BUG which impacts MPUSS OSWR. I suspect you are missing that Errata WA. You need a patch [1] which is in Tero's CORE RET series. Regards Santosh [1] https://patchwork.kernel.org/patch/1216671/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: arch timer: Export 'read_current_timer' symbol
Hi Mark, On Wed, Oct 03, 2012 at 01:52:18AM +0100, Mark A. Greer wrote: From: Mark A. Greer mgr...@animalcreek.com Commit 923df96b9f31b7d08d8438ff9677326d9537accf (ARM: 7451/1: arch timer: implement read_current_timer and get_cycles) modifies get_cycles() such that it calls read_current_timer(). Unfortunately, the 'read_current_timer' symbol is not exported so when a driver that calls get_cycles() is built as a module, an undefined reference error occurs. A good example is the crypto/tcrypt.c (CONFIG_CRYPTO_TEST) driver because it calls get_cycles() and can only be built as a module. Fix this error by exporting the 'read_current_timer' symbol. This was already reported over on the kernel-janitors list, I assumed they'd CC'd LAK, but it looks like it didn't happen. http://marc.info/?l=kernel-janitorsm=134910841909057w=2 Anyway, I've got a fix in the works (I don't think you need the ifdef). Will -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ASoC: ams-delta: Convert to use snd_soc_register_card()
On Tue, Oct 02, 2012 at 11:07:30PM +0200, Janusz Krzysztofik wrote: Is something wrong with this patch? Any chance for it to find its way into 3.7? I don't have the patch. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RESEND][PATCH] ASoC: ams-delta: Convert to use snd_soc_register_card()
The old method of registering with the ASoC core by creating a
soc-audio platform device no longer works for Amstrad Delta sound card
after recent changes to drvdata handling (commit
0998d0631001288a5974afc0b2a5f568bcdecb4d, 'device-core: Ensure drvdata =
NULL when no driver is bound'.
Use snd_soc_register_card() method instead, as suggested by the ASoC
core generated warning message, and move both the card and codec
platform device registration to the arch board file where those belong.
Created and tested against linux-3.6-rc5.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
On Thu, 6 Sep 2012 15:36:35 Mark Brown wrote:
On Sat, Sep 01, 2012 at 11:09:18AM +0200, Janusz Krzysztofik wrote:
I see your point, however for now I can see no better way of referencing
the data (of type struct snd_soc_card) then passing it to
snd_soc_register_card(). But for this to work, I would have to register
successfully an ams-delta specific platform device first, not the soc-
audio. This, even if still done from the sound/soc/omap/ams-delta.c, not
from an arch board file, would require now not existing ams-delta ASoC
platform driver probe/remove callbacks at least. I'm still not convinced
if such modification would be acceptable in the middle of the rc cycle.
If there is a simpler, less intrusive way to do this, then sorry, I
still can't see it.
Like I already said just make it a static variable.
Mark,
Sorry, I was still not able to understand what you actually meant, and
to come out with a working fix other than I initially proposed. If what
I've prepared now is not acceptable as a fix, than hard luck, please
consider queueing it for 3.7, and 3.6 must go with Amstrad Delta sound
not working unless someone else is still able to fix it.
Tony,
Please give your ack on the arch/arm/mach-omap1 bits if acceptable. I
believe there should be no merge conflicts if this change goes through
sound/soc.
Thanks,
Janusz
arch/arm/mach-omap1/board-ams-delta.c | 12 ++
sound/soc/omap/ams-delta.c| 63 +++-
2 files changed, 42 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c
b/arch/arm/mach-omap1/board-ams-delta.c
index c534698..5ab9c6b 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -444,16 +444,28 @@ static struct omap1_cam_platform_data
ams_delta_camera_platform_data = {
.lclk_khz_max = 1334, /* results in 5fps CIF, 10fps QCIF */
};
+static struct platform_device ams_delta_audio_device = {
+ .name = ams-delta-audio,
+ .id = -1,
+};
+
+static struct platform_device cx20442_codec_device = {
+ .name = cx20442-codec,
+ .id = -1,
+};
+
static struct platform_device *ams_delta_devices[] __initdata = {
latch1_gpio_device,
latch2_gpio_device,
ams_delta_kp_device,
ams_delta_camera_device,
+ ams_delta_audio_device,
};
static struct platform_device *late_devices[] __initdata = {
ams_delta_nand_device,
ams_delta_lcd_device,
+ cx20442_codec_device,
};
static void __init ams_delta_init(void)
diff --git a/sound/soc/omap/ams-delta.c b/sound/soc/omap/ams-delta.c
index 7d4fa8e..7b18b74 100644
--- a/sound/soc/omap/ams-delta.c
+++ b/sound/soc/omap/ams-delta.c
@@ -575,56 +575,53 @@ static struct snd_soc_card ams_delta_audio_card = {
};
/* Module init/exit */
-static struct platform_device *ams_delta_audio_platform_device;
-static struct platform_device *cx20442_platform_device;
-
-static int __init ams_delta_module_init(void)
+static __devinit int ams_delta_probe(struct platform_device *pdev)
{
+ struct snd_soc_card *card = ams_delta_audio_card;
int ret;
- if (!(machine_is_ams_delta()))
- return -ENODEV;
-
- ams_delta_audio_platform_device =
- platform_device_alloc(soc-audio, -1);
- if (!ams_delta_audio_platform_device)
- return -ENOMEM;
+ card-dev = pdev-dev;
- platform_set_drvdata(ams_delta_audio_platform_device,
- ams_delta_audio_card);
-
- ret = platform_device_add(ams_delta_audio_platform_device);
- if (ret)
- goto err;
-
- /*
-* Codec platform device could be registered from elsewhere (board?),
-* but I do it here as it makes sense only if used with the card.
-*/
- cx20442_platform_device =
- platform_device_register_simple(cx20442-codec, -1, NULL, 0);
+ ret = snd_soc_register_card(card);
+ if (ret) {
+ dev_err(pdev-dev, snd_soc_register_card failed (%d)\n, ret);
+ card-dev = NULL;
+ return ret;
+ }
return 0;
-err:
- platform_device_put(ams_delta_audio_platform_device);
- return ret;
}
-late_initcall(ams_delta_module_init);
-static void __exit
RE: [PATCH v2] leds: leds-gpio: adopt pinctrl support
On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote: On Mon, Oct 1, 2012 at 5:44 PM, Tony Lindgren t...@atomide.com wrote: OK that is typical pinctrl driver implementation work. I hope Tony can advice on this? I think we're best off to just stick to alternative named modes passed from device tree. For example, for GPIO wake-ups you can have named modes such as default, enabled and idle where idle muxes things for GPIO wake-ups for the duration of idle. In this case we need to add three different values according to three modes (default, enabled, idle) and for each node. It seems that should also work for leds-gpio. And you can define more named modes as needed. If we want to implement pinctrl_gpio functionality we have to separate function-mask bits to 1. pinmux-mask 2. pinconf-mask, to make it generic we need following bit masks a. receiver enable/disable bit b. slew rate fast/slow bit c. pull-up/down bit I have gone through nvidia pinctrl dt data (tegra20-seaboard.dts, node drive_sdio1) which has different pinconfig values, those are mapping to pinconf values. With the above bit masks and function-mask we can identify pull-up/down, slow/high speed slew rate and direction in/out. (or) Named modes:- Are you saying named modes like this? default-input-up default-input-down default-output-up default-output-down This 1, 2 and 2.a or named modes are required to implement pinctrl_gpio_direction_input/output and pinctrl_request/free_gpio. This is what we're doing for ux500 and should be a good model. I have looked into this, but not seen any named modes. Thanks AnilKumar -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] serial: omap: Remove the default setting of special character
Special character detect enable if enabled by default.Received data comparison with XOFF2 data happens by default. tty provides only XOFF1 no X0FF2 is provided so no need to enable check for XOFF2. Keeping this enabled might give some slow transfers due to dummy xoff2 comparison with xoff2 reset value. Since not all want the XOFF2 support lets not enable it by default. Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com --- drivers/tty/serial/omap-serial.c |6 +- 1 files changed, 1 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index fd0fb8c..caf49a6 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -702,11 +702,7 @@ serial_omap_configure_xonxoff serial_out(up, UART_MCR, up-mcr | UART_MCR_TCRTLR); serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); - /* Enable special char function UARTi.EFR_REG[5] and -* load the new software flow control mode IXON or IXOFF -* and restore the UARTi.EFR_REG[4] ENHANCED_EN value. -*/ - serial_out(up, UART_EFR, up-efr | UART_EFR_SCD); + serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_MCR, up-mcr ~UART_MCR_TCRTLR); -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] serial: omap: Remove the hardcode serial_omap_console_ports array.
Currently the array serial_omap_console_ports is hard coded to 4. Make it depend on the maximum uart count. Post to [cfc55bc ARM: OMAP2+: serial: Change MAX_HSUART_PORTS to 6] the max ports is 6. Cc: AnilKumar Ch anilku...@ti.com Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com --- drivers/tty/serial/omap-serial.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index caf49a6..478383d 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -1077,7 +1077,7 @@ out: #ifdef CONFIG_SERIAL_OMAP_CONSOLE -static struct uart_omap_port *serial_omap_console_ports[4]; +static struct uart_omap_port *serial_omap_console_ports[OMAP_MAX_HSUART_PORTS]; static struct uart_driver serial_omap_reg; -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] serial: omap: Make context_loss_cnt signed
get_context_loss_count returns an int however it is stored in
unsigned integer context_loss_cnt . This patch tries to make
context_loss_cnt int. So that in case of errors the value
(which may be negative) is not interpreted wrongly.
In serial_omap_runtime_resume in case of errors returned by
get_context_loss_count print a warning and do a restore.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
drivers/tty/serial/omap-serial.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 6ede6fd..fd0fb8c 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -96,7 +96,7 @@ struct uart_omap_port {
unsigned char msr_saved_flags;
charname[20];
unsigned long port_activity;
- u32 context_loss_cnt;
+ int context_loss_cnt;
u32 errata;
u8 wakeups_enabled;
unsigned intirq_pending:1;
@@ -1556,11 +1556,15 @@ static int serial_omap_runtime_resume(struct device
*dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
- u32 loss_cnt = serial_omap_get_context_loss_count(up);
+ int loss_cnt = serial_omap_get_context_loss_count(up);
- if (up-context_loss_cnt != loss_cnt)
+ if (loss_cnt 0) {
+ dev_err(dev, serial_omap_get_context_loss_count failed : %d\n,
+ loss_cnt);
serial_omap_restore_context(up);
-
+ } else if (up-context_loss_cnt != loss_cnt) {
+ serial_omap_restore_context(up);
+ }
up-latency = up-calc_latency;
schedule_work(up-qos_work);
--
1.7.5.4
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Re: [PATCH v2] leds: leds-gpio: adopt pinctrl support
On Wed, Oct 3, 2012 at 12:52 PM, AnilKumar, Chimata anilku...@ti.com wrote: On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote: This is what we're doing for ux500 and should be a good model. I have looked into this, but not seen any named modes. OK maybe it's not easy to find. If you look into: arch/arm/mach-ux500/board-mop500-pins.c you find our work in progress. Note that this is not (yet) using device tree. (We want to migrate all our pinctrl stuff first, then do DT.) So for example this macro: #define DB8500_PIN(pin,conf,dev) \ PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl-db8500, pin, conf) Will define a config for the default mode for a certain pin. This: #define DB8500_PIN_SLEEP(pin, conf, dev) \ PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, pinctrl-db8500, \ pin, conf) Will mutatis mutandis define a sleep mode for a pin. Sorry for the macros. We'll get rid of them in the DT. (Now that Stephen has patched in preprocessing it will even look good.) Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
Hi Kevin,
On Wed, Oct 3, 2012 at 12:21 AM, Kevin Hilman
khil...@deeprootsystems.com wrote:
Hi Jean,
Jean Pihet jean.pi...@newoldbits.com writes:
Remove the device dependent settings (cpu_is_xxx(), IP fck etc.)
from the driver code and pass them instead via the platform
data.
This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
include/linux/platform_data.
Signed-off-by: Jean Pihet j-pi...@ti.com
Could you make pdata change and the clock change should be two different
patches? Also, your previous patch to align SR clock names should be
combined with the changes made here.
Some comments on the clock change below...
---
arch/arm/mach-omap2/sr_device.c | 13
drivers/power/avs/smartreflex.c | 40
++--
include/linux/power/smartreflex.h | 14 +++-
3 files changed, 36 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/sr_device.c
b/arch/arm/mach-omap2/sr_device.c
index d033a65..2885a77 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -122,6 +122,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh,
void *user)
sr_data-senn_mod = 0x1;
sr_data-senp_mod = 0x1;
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ sr_data-err_weight = OMAP3430_SR_ERRWEIGHT;
+ sr_data-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+ sr_data-accum_data = OMAP3430_SR_ACCUMDATA;
+ if (!(strcmp(sr_data-name, smartreflex_mpu))) {
+ sr_data-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+ } else {
+ sr_data-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+ }
+ }
+
sr_data-voltdm = voltdm_lookup(sr_dev_attr-sensor_voltdm_name);
if (IS_ERR(sr_data-voltdm)) {
pr_err(%s: Unable to get voltage domain pointer for VDD %s\n,
diff --git a/drivers/power/avs/smartreflex.c
b/drivers/power/avs/smartreflex.c
index 92f6728..7c03c90 100644
--- a/drivers/power/avs/smartreflex.c
+++ b/drivers/power/avs/smartreflex.c
@@ -128,17 +128,16 @@ static irqreturn_t sr_interrupt(int irq, void *data)
static void sr_set_clk_length(struct omap_sr *sr)
{
+ char fck_name[16]; /* smartreflex.0 fits in 16 chars */
struct clk *sys_ck;
u32 sys_clk_speed;
- if (cpu_is_omap34xx())
- sys_ck = clk_get(NULL, sys_ck);
- else
- sys_ck = clk_get(NULL, sys_clkin_ck);
+ sprintf(fck_name, smartreflex.%d, sr-srid);
hmm, isn't this the same as dev_name(sr-pdev.dev) ?
Yes. Atfer the previous patch ARM: OMAP: hwmod: align the SmartReflex
fck names there is a direct mapping between the device name and the
IP functional clock. Note: the mapping is based on the order of the
hwmod entries and so it is important not to move them around.
Combined with your earlier patch to align clock names, this should just
be:
sys_ck = clk_get(sr-pdev.dev, fck);
Great! That works great and the code is much more elegant.
Also note that you've changed this from sys_clk to the SR functional
clock, which seems to be the same clock on 34xx and 44xx, but that change
should be clearly documented in the changelog.
Ok.
Updated patch in a bit.
Kevin
Thanks for reviewing,
Jean
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[PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
include/linux/platform_data.
Note about the smartreflex functional clocks: the smartreflex fclks
are derived from sys_clk and are named smartreflex.%d. Since the
smartreflex device names and the functional clock names are identical
the device driver code uses them to control the functional clocks.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/sr_device.c | 13 +
drivers/power/avs/smartreflex.c | 38 +
include/linux/power/smartreflex.h | 14 --
3 files changed, 34 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index cbeae56..06de443 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void
*user)
sr_data-senn_mod = 0x1;
sr_data-senp_mod = 0x1;
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ sr_data-err_weight = OMAP3430_SR_ERRWEIGHT;
+ sr_data-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+ sr_data-accum_data = OMAP3430_SR_ACCUMDATA;
+ if (!(strcmp(sr_data-name, smartreflex_mpu))) {
+ sr_data-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+ } else {
+ sr_data-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+ }
+ }
+
sr_data-voltdm = voltdm_lookup(sr_dev_attr-sensor_voltdm_name);
if (IS_ERR(sr_data-voltdm)) {
pr_err(%s: Unable to get voltage domain pointer for VDD %s\n,
diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c
index 24768a2..829467f 100644
--- a/drivers/power/avs/smartreflex.c
+++ b/drivers/power/avs/smartreflex.c
@@ -133,14 +133,11 @@ static void sr_set_clk_length(struct omap_sr *sr)
struct clk *sys_ck;
u32 sys_clk_speed;
- if (cpu_is_omap34xx())
- sys_ck = clk_get(NULL, sys_ck);
- else
- sys_ck = clk_get(NULL, sys_clkin_ck);
+ sys_ck = clk_get(sr-pdev-dev, fck);
if (IS_ERR(sys_ck)) {
- dev_err(sr-pdev-dev, %s: unable to get sys clk\n,
- __func__);
+ dev_err(sr-pdev-dev, %s: unable to get smartreflex fck
%s\n,
+ __func__, dev_name(sr-pdev-dev));
return;
}
@@ -170,28 +167,6 @@ static void sr_set_clk_length(struct omap_sr *sr)
}
}
-static void sr_set_regfields(struct omap_sr *sr)
-{
- /*
-* For time being these values are defined in smartreflex.h
-* and populated during init. May be they can be moved to board
-* file or pmic specific data structure. In that case these structure
-* fields will have to be populated using the pdata or pmic structure.
-*/
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- sr-err_weight = OMAP3430_SR_ERRWEIGHT;
- sr-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
- sr-accum_data = OMAP3430_SR_ACCUMDATA;
- if (!(strcmp(sr-name, smartreflex_mpu_iva))) {
- sr-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
- sr-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
- } else {
- sr-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
- sr-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
- }
- }
-}
-
static void sr_start_vddautocomp(struct omap_sr *sr)
{
if (!sr_class || !(sr_class-enable) || !(sr_class-configure)) {
@@ -924,8 +899,14 @@ static int __init omap_sr_probe(struct platform_device
*pdev)
sr_info-nvalue_count = pdata-nvalue_count;
sr_info-senn_mod = pdata-senn_mod;
sr_info-senp_mod = pdata-senp_mod;
+ sr_info-err_weight = pdata-err_weight;
+ sr_info-err_maxlimit = pdata-err_maxlimit;
+ sr_info-accum_data = pdata-accum_data;
+ sr_info-senn_avgweight = pdata-senn_avgweight;
+ sr_info-senp_avgweight = pdata-senp_avgweight;
sr_info-autocomp_active = false;
sr_info-ip_type = pdata-ip_type;
+
sr_info-base = ioremap(mem-start, resource_size(mem));
if (!sr_info-base) {
dev_err(pdev-dev, %s: ioremap fail\n, __func__);
@@ -937,7 +918,6 @@ static int __init omap_sr_probe(struct platform_device
*pdev)
sr_info-irq = irq-start;
sr_set_clk_length(sr_info);
-
RE: [PATCH 1/1] usb: Include generic_interrupt for OMAP2_PLUS
Hi all,
On 26/09/2012, Philippe De Swert philippe.desw...@jollamobile.com wrote:
Hi,
On Tue, Sep 25, 2012 at 2:39 PM, Philippe De Swert
Then maybe it's best to just remove the ifdefs and always provide
generic_interrupt() ?
Anyone against it ?
Providing generic_interrupt seems fine.
Well it seems there are only two drivers that use it omap2430 and
ux500. Maybe we somehow link it to the drivers that need it? (I might
have missed other drivers but it looks like it is just those two)
One way I see is that omap2430 and ux500 implement the isr handler
in platform glue driver and then call the musb_interrupt() as done in
daxxx, amxxx, ti8xxx platforms. Then generic_interrupt can be removed.
So something along those lines? (If this is the right way I will resend as a
real patch)
So any comments on the approach here (see patch kept below)? Or should I
immediately send it as a new patch to get the comments? I sent it in this
thread as it also solves the issue I have.
BTW: CONFIG_SOC_OMAP3430 could be easily removed as it only changes minor
things in the musb stack. It would clean up the code and get rid of this very
misleading option as it has nothing to do with any OMAP3430 soc specific
handling.
Regards,
Philippe
From deae78e1084749f340ae8b8aaeca51818d5bfc55 Mon Sep 17 00:00:00 2001
From: Philippe De Swert philippe.desw...@jollamobile.com
Date: Wed, 26 Sep 2012 17:00:46 +0300
Subject: [PATCH 1/1] musb: Move generic_interrupt out of the way
Have all musb drivers define their own isr.
Signed-off-by: Philippe De Swert philippe.desw...@jollamobile.com
---
drivers/usb/musb/musb_core.c | 33 ++---
drivers/usb/musb/omap2430.c | 22 ++
drivers/usb/musb/ux500.c | 21 +
3 files changed, 45 insertions(+), 31 deletions(-)
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 26f1bef..1d5ee34 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1496,35 +1496,6 @@ static int __devinit musb_core_init(u16 musb_type,
struct musb *musb)
return 0;
}
-/*-*/
-
-#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \
- defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500)
-
-static irqreturn_t generic_interrupt(int irq, void *__hci)
-{
- unsigned long flags;
- irqreturn_t retval = IRQ_NONE;
- struct musb *musb = __hci;
-
- spin_lock_irqsave(musb-lock, flags);
-
- musb-int_usb = musb_readb(musb-mregs, MUSB_INTRUSB);
- musb-int_tx = musb_readw(musb-mregs, MUSB_INTRTX);
- musb-int_rx = musb_readw(musb-mregs, MUSB_INTRRX);
-
- if (musb-int_usb || musb-int_tx || musb-int_rx)
- retval = musb_interrupt(musb);
-
- spin_unlock_irqrestore(musb-lock, flags);
-
- return retval;
-}
-
-#else
-#define generic_interruptNULL
-#endif
-
/*
* handle all the irqs defined by the HDRC core. for now we expect: other
* irq sources (phy, dma, etc) will be handled first, musb-int_* values
@@ -1907,7 +1878,8 @@ musb_init_controller(struct device *dev, int nIrq,
void __iomem *ctrl)
musb-ops = plat-platform_ops;
/* The musb_platform_init() call:
- * - adjusts musb-mregs and musb-isr if needed,
+ * - adjusts musb-mregs if needed
+ * - sets the musb-isr
* - may initialize an integrated tranceiver
* - initializes musb-xceiv, usually by otg_get_phy()
* - stops powering VBUS
@@ -1917,7 +1889,6 @@ musb_init_controller(struct device *dev, int nIrq,
void __iomem *ctrl)
* external/discrete ones in various flavors (twl4030 family,
* isp1504, non-OTG, etc) mostly hooking up through ULPI.
*/
- musb-isr = generic_interrupt;
status = musb_platform_init(musb);
if (status 0)
goto fail1;
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 5fdb9da..5461619d 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -306,6 +306,26 @@ static void omap_musb_mailbox_work(struct work_struct
*mailbox_work)
omap_musb_set_mailbox(glue);
}
+static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
+{
+unsigned long flags;
+irqreturn_t retval = IRQ_NONE;
+struct musb *musb = __hci;
+
+spin_lock_irqsave(musb-lock, flags);
+
+musb-int_usb = musb_readb(musb-mregs, MUSB_INTRUSB);
+musb-int_tx = musb_readw(musb-mregs, MUSB_INTRTX);
+musb-int_rx = musb_readw(musb-mregs, MUSB_INTRRX);
+
+if (musb-int_usb || musb-int_tx || musb-int_rx)
+retval = musb_interrupt(musb);
+
+spin_unlock_irqrestore(musb-lock, flags);
+
+return retval;
+}
+
static int
Re: [RESEND][PATCH] ASoC: ams-delta: Convert to use snd_soc_register_card()
Mark, Please note we have an Ack from Tony. http://mailman.alsa-project.org/pipermail/alsa-devel/2012-September/055493.html Thanks, Janusz --- Subject: Re: [PATCH] ASoC: ams-delta: Convert to use snd_soc_register_card() Date: niedziela, 16 wrzeĊnia 2012, 13:44:23 From: Tony Lindgren t...@atomide.com To: Janusz Krzysztofik jkrzy...@tis.icnet.pl Cc: Mark Brown broo...@opensource.wolfsonmicro.com, Liam Girdwood l...@ti.com, linux-omap@vger.kernel.org, linux-arm-ker...@lists.infradead.org, alsa-de...@alsa-project.org * Janusz Krzysztofik jkrzy...@tis.icnet.pl [120916 12:18]: Tony, Please give your ack on the arch/arm/mach-omap1 bits if acceptable. I believe there should be no merge conflicts if this change goes through sound/soc. Yes looks good to me: Acked-by: Tony Lindgren t...@atomide.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: OMAP4460/PandaES: hang during resume
Shilimkar, Santosh santosh.shilim...@ti.com writes: On Wed, Oct 3, 2012 at 5:05 AM, Kevin Hilman khil...@deeprootsystems.com wrote: Hi Santosh, Tero, I just added my 4460/PandaES to my board farm for automated PM testing and see that basic suspend/resume tests don't work in mainline. It fails on v3.6 and linux-next,arm-soc/for-next. Adding 'no_console_suspend' to the cmdline shows me that wakeup event is happening so the hang is somewhere during resume. I haven't dug any deeper than that. This works fine on 4430/Panda. Do you know of anything else we're missing in mainline for a basic suspend/resume test on 4430? OMAP4460 has one ROM code BUG which impacts MPUSS OSWR. I suspect you are missing that Errata WA. You need a patch [1] which is in Tero's CORE RET series. Ah, yes. The one where I asked you to q(re)write the change log a hundred times. How could I forget. ;) Thanks for the reminder. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
jean.pi...@newoldbits.com writes:
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
include/linux/platform_data.
Note about the smartreflex functional clocks: the smartreflex fclks
are derived from sys_clk and are named smartreflex.%d. Since the
smartreflex device names and the functional clock names are identical
the device driver code uses them to control the functional clocks.
Thanks for adding this part.
One more nit below, then please resend this patch as a combined series
with the align fclk names patch. (note: The previous patch 1 from this
series I've queued separately as a fix for v3.7-rc. )
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/sr_device.c | 13 +
drivers/power/avs/smartreflex.c | 38
+
include/linux/power/smartreflex.h | 14 --
3 files changed, 34 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index cbeae56..06de443 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh,
void *user)
sr_data-senn_mod = 0x1;
sr_data-senp_mod = 0x1;
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ sr_data-err_weight = OMAP3430_SR_ERRWEIGHT;
+ sr_data-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+ sr_data-accum_data = OMAP3430_SR_ACCUMDATA;
+ if (!(strcmp(sr_data-name, smartreflex_mpu))) {
+ sr_data-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+ } else {
+ sr_data-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+ }
+ }
+
sr_data-voltdm = voltdm_lookup(sr_dev_attr-sensor_voltdm_name);
if (IS_ERR(sr_data-voltdm)) {
pr_err(%s: Unable to get voltage domain pointer for VDD %s\n,
diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c
index 24768a2..829467f 100644
--- a/drivers/power/avs/smartreflex.c
+++ b/drivers/power/avs/smartreflex.c
@@ -133,14 +133,11 @@ static void sr_set_clk_length(struct omap_sr *sr)
struct clk *sys_ck;
u32 sys_clk_speed;
- if (cpu_is_omap34xx())
- sys_ck = clk_get(NULL, sys_ck);
- else
- sys_ck = clk_get(NULL, sys_clkin_ck);
+ sys_ck = clk_get(sr-pdev-dev, fck);
nit: since this isn't the sys_clk anymore, could you s/sys_ck/fck/ ?
Thanks,
Kevin
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[PATCH 3.7-rc1] omap zoom2.c: Fix compile error by including correct header files
Cc: Peter Ujfalusi peter.ujfal...@ti.com Cc: Jarkko Nikula jarkko.nik...@bitmer.com Cc: Liam Girdwood l...@ti.com Cc: Mark Brown broo...@opensource.wolfsonmicro.com Cc: Jaroslav Kysela pe...@perex.cz Cc: Takashi Iwai ti...@suse.de Cc: linux-omap@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Tim Gardner tim.gard...@canonical.com --- sound/soc/omap/zoom2.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 23de2b2..d0a8c92 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -27,9 +27,10 @@ #include asm/mach-types.h #include mach/hardware.h -#include mach/gpio.h +#include linux/gpio.h #include mach/board-zoom.h #include linux/platform_data/asoc-ti-mcbsp.h +#include linux/platform_data/gpio-omap.h /* Register descriptions for twl4030 codec part */ #include linux/mfd/twl4030-audio.h -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4] mtd: nand: OMAP: Add support to use ELM as error correction module
Adds support to use ELM as BCH 4 8 bit error correction module and adds support for single shot read_page and write_page functions Platforms containing the ELM module can be used to correct errors reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit support is added. BCH 4 8 bit error detection support is already available in mainline kernel and works with software error correction. This series is based on top of [1] [2] 1. linux-next/master 2. linux-omap-dt/for_3.7/dts_part2 Nand driver tested for BCH 4 8 bit error correction per sector. This being tested by introducing bit errors at multiple sectors inside page. Philip, Avinash (4): mtd: nand: omap2: Update nerrors using ecc.strength mtd: devices: elm: Add support for ELM error correction ARM: OMAP2: gpmc: Add support for BCH ECC scheme mtd: nand: omap2: Add data correction support arch/arm/mach-omap2/gpmc.c | 120 +++- arch/arm/plat-omap/include/plat/gpmc.h |1 + drivers/mtd/devices/Makefile |4 +- drivers/mtd/devices/elm.c| 446 ++ drivers/mtd/nand/omap2.c | 368 +++-- include/linux/platform_data/elm.h| 64 include/linux/platform_data/mtd-nand-omap2.h |1 + 7 files changed, 958 insertions(+), 46 deletions(-) create mode 100644 drivers/mtd/devices/elm.c create mode 100644 include/linux/platform_data/elm.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength
Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX BCH4_ERROR_MAX
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
#defineECCCLEAR0x100
#defineECC10x1
+#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd,
int mode)
mtd);
struct nand_chip *chip = mtd-priv;
- nerrors = (info-nand.ecc.bytes == 13) ? 8 : 4;
+ nerrors = info-nand.ecc.strength;
dev_width = (chip-options NAND_BUSWIDTH_16) ? 1 : 0;
/*
* Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int
ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
#ifdef CONFIG_MTD_NAND_OMAP_BCH8
- const int hw_errors = 8;
+ const int hw_errors = BCH8_MAX_ERROR;
#else
- const int hw_errors = 4;
+ const int hw_errors = BCH4_MAX_ERROR;
#endif
info-bch = NULL;
- max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+ max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+ BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err(cannot configure %d-bit BCH ecc, only %d-bit supported,
max_errors, hw_errors);
--
1.7.0.4
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[PATCH 2/4] mtd: devices: elm: Add support for ELM error correction
Platforms containing the ELM module can be used to correct errors
reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit
support is added.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
---
:00 100644 000... b88ee83... A
Documentation/devicetree/bindings/mtd/elm.txt
:100644 100644 395733a... 0f6a94b... M drivers/mtd/devices/Makefile
:00 100644 000... 802b572... A drivers/mtd/devices/elm.c
:00 100644 000... eb53163... A include/linux/platform_data/elm.h
Documentation/devicetree/bindings/mtd/elm.txt | 18 +
drivers/mtd/devices/Makefile |4 +-
drivers/mtd/devices/elm.c | 440 +
include/linux/platform_data/elm.h | 60
4 files changed, 521 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/elm.txt
b/Documentation/devicetree/bindings/mtd/elm.txt
new file mode 100644
index 000..b88ee83
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/elm.txt
@@ -0,0 +1,18 @@
+Error location module
+
+Required properties:
+- compatible: Must be ti,elm
+- reg: physical base address and size of the registers map.
+- interrupts: Interrupt number for the elm.
+- interrupt-parent: The parent interrupt controller
+
+Optional properties:
+- ti,hwmods: Name of the hwmod associated to the elm
+
+Example:
+elm: elm@0 {
+ compatible = ti,elm;
+ reg = 0x4808 0x2000;
+ interrupt-parent = intc;
+ interrupts = 4;
+};
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 395733a..0f6a94b 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -17,8 +17,10 @@ obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD)+= block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH)+= mtd_dataflash.o
obj-$(CONFIG_MTD_M25P80) += m25p80.o
+obj-$(CONFIG_MTD_NAND_OMAP2) += elm.o
obj-$(CONFIG_MTD_SPEAR_SMI)+= spear_smi.o
obj-$(CONFIG_MTD_SST25L) += sst25l.o
obj-$(CONFIG_MTD_BCM47XXSFLASH)+= bcm47xxsflash.o
-CFLAGS_docg3.o += -I$(src)
\ No newline at end of file
+
+CFLAGS_docg3.o += -I$(src)
diff --git a/drivers/mtd/devices/elm.c b/drivers/mtd/devices/elm.c
new file mode 100644
index 000..802b572
--- /dev/null
+++ b/drivers/mtd/devices/elm.c
@@ -0,0 +1,440 @@
+/*
+ * Error Location Module
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/platform_device.h
+#include linux/module.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/of.h
+#include linux/pm_runtime.h
+#include linux/platform_data/elm.h
+
+#define ELM_IRQSTATUS 0x018
+#define ELM_IRQENABLE 0x01c
+#define ELM_LOCATION_CONFIG0x020
+#define ELM_PAGE_CTRL 0x080
+#define ELM_SYNDROME_FRAGMENT_00x400
+#define ELM_SYNDROME_FRAGMENT_60x418
+#define ELM_LOCATION_STATUS0x800
+#define ELM_ERROR_LOCATION_0 0x880
+
+/* ELM Interrupt Status Register */
+#define INTR_STATUS_PAGE_VALID BIT(8)
+
+/* ELM Interrupt Enable Register */
+#define INTR_EN_PAGE_MASK BIT(8)
+
+/* ELM Location Configuration Register */
+#define ECC_BCH_LEVEL_MASK 0x3
+
+/* ELM syndrome */
+#define ELM_SYNDROME_VALID BIT(16)
+
+/* ELM_LOCATION_STATUS Register */
+#define ECC_CORRECTABLE_MASK BIT(8)
+#define ECC_NB_ERRORS_MASK 0x1f
+
+/* ELM_ERROR_LOCATION_0-15 Registers */
+#define ECC_ERROR_LOCATION_MASK0x1fff
+
+#define ELM_ECC_SIZE 0x7ff
+
+#define SYNDROME_FRAGMENT_REG_SIZE 0x40
+#define ERROR_LOCATION_SIZE0x100
+#define MAX_BCH_ELM_ERROR 16
+#define ELM_FRAGMENT_REG 7
+
+typedef u32 syn_t[ELM_FRAGMENT_REG];
+typedef u32 elm_error_t[MAX_BCH_ELM_ERROR];
+
+struct elm_info {
+ struct device *dev;
+ void __iomem *elm_base;
+ struct completion elm_completion;
+ struct list_head list;
+ enum bch_ecc bch_type;
+};
+
+static LIST_HEAD(elm_devices);
+
+static void elm_write_reg(void *offset, u32 val)
+{
+ writel(val, offset);
+}
+
+static u32 elm_read_reg(void *offset)
+{
+ return readl(offset);
+}
+
+/**
+ * elm_config - Configure ELM
Re: [PATCH 3.7-rc1] omap zoom2.c: Fix compile error by including correct header files
On 10/03/2012 05:31 PM, Tim Gardner wrote: Cc: Peter Ujfalusi peter.ujfal...@ti.com Cc: Jarkko Nikula jarkko.nik...@bitmer.com Cc: Liam Girdwood l...@ti.com Cc: Mark Brown broo...@opensource.wolfsonmicro.com Cc: Jaroslav Kysela pe...@perex.cz Cc: Takashi Iwai ti...@suse.de Cc: linux-omap@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Tim Gardner tim.gard...@canonical.com --- sound/soc/omap/zoom2.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 23de2b2..d0a8c92 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -27,9 +27,10 @@ #include asm/mach-types.h #include mach/hardware.h -#include mach/gpio.h +#include linux/gpio.h #include mach/board-zoom.h #include linux/platform_data/asoc-ti-mcbsp.h +#include linux/platform_data/gpio-omap.h /* Register descriptions for twl4030 codec part */ #include linux/mfd/twl4030-audio.h I have the same patch stashed away for the same issue. Was waiting for rc1 to send it. Acked-by: Peter Ujfalusi peter.ujfal...@ti.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured in wrap mode 1 and with ecc_size0 as
13 and ecc_size1 as 1.
BCH 8 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured in wrap mode 1 and with ecc_size0 as
26 and ecc_size1 as 2.
Note: For BCH8 ECC bytes set to 14 to make compatible with RBL.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 72428bd... c9bc3cf... M arch/arm/mach-omap2/gpmc.c
:100644 100644 2e6e259... c916510... M arch/arm/plat-omap/include/plat/gpmc.h
arch/arm/mach-omap2/gpmc.c | 120 +---
arch/arm/plat-omap/include/plat/gpmc.h |1 +
2 files changed, 112 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 72428bd..c9bc3cf 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -24,6 +24,7 @@
#include linux/io.h
#include linux/module.h
#include linux/interrupt.h
+#include linux/mtd/nand.h
#include asm/mach-types.h
#include plat/gpmc.h
@@ -83,6 +84,18 @@
#define ENABLE_PREFETCH(0x1 7)
#define DMA_MPU_MODE 2
+/* GPMC ecc engine settings for read */
+#define BCH_WRAPMODE_1 1 /* BCH wrap mode 6 */
+#define BCH8R_ECC_SIZE00x1a/* ecc_size0 = 26 */
+#define BCH8R_ECC_SIZE10x2 /* ecc_size1 = 2 */
+#define BCH4R_ECC_SIZE00xd /* ecc_size0 = 13 */
+#define BCH4R_ECC_SIZE10x1 /* ecc_size1 = 1 4bit padding
in BCH4 */
+
+/* GPMC ecc engine settings for write */
+#define BCH_WRAPMODE_6 6 /* BCH wrap mode 6 */
+#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
+#define BCH_ECC_SIZE1 0x20/* ecc_size1 = 32 */
+
/* XXX: Only NAND irq has been considered,currently these are the only ones
used
*/
#defineGPMC_NR_IRQ 2
@@ -1119,7 +1132,8 @@ EXPORT_SYMBOL_GPL(gpmc_init_hwecc_bch);
int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors,
int nerrors)
{
- unsigned int val;
+ unsigned int val, wr_mode;
+ unsigned int ecc_size1, ecc_size0;
/* check if ecc module is in use */
if (gpmc_ecc_used != -EINVAL)
@@ -1130,18 +1144,35 @@ int gpmc_enable_hwecc_bch(int cs, int mode, int
dev_width, int nsectors,
/* clear ecc and enable bits */
gpmc_write_reg(GPMC_ECC_CONTROL, 0x1);
- /*
-* When using BCH, sector size is hardcoded to 512 bytes.
-* Here we are using wrapping mode 6 both for reading and writing, with:
-* size0 = 0 (no additional protected byte in spare area)
-* size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
-*/
- gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (32 22) | (0 12));
+ /* When using BCH, sector size is hard coded to 512 bytes. */
+ if ((mode == NAND_ECC_READ) (nsectors != 1)) {
+ /*
+* Here we are using wrapping mode 1 for reading, for
+* supporting multi sector reading.
+* Read mode, ECC engine enabled for valid ecc_size0 nibbles
+* disabled for ecc_size1 nibbles.
+*/
+ ecc_size0 = (nerrors == 8) ? BCH8R_ECC_SIZE0 : BCH4R_ECC_SIZE0;
+ ecc_size1 = (nerrors == 8) ? BCH8R_ECC_SIZE1 : BCH4R_ECC_SIZE1;
+ wr_mode = BCH_WRAPMODE_1;
+ } else {
+ /*
+* Here we are using wrapping mode 6 for writing,
+* ECC engine enabled for valid ecc_size0 nibbles
+* disabled for ecc_size1 nibbles.
+*/
+ ecc_size0 = BCH_ECC_SIZE0;
+ ecc_size1 = BCH_ECC_SIZE1;
+ wr_mode = BCH_WRAPMODE_6;
+ }
+
+ gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, (ecc_size1 22) |
+ (ecc_size0 12));
/* BCH configuration */
val = ((1 16) | /* enable BCH */
(((nerrors == 8) ? 1 : 0) 12) | /* 8 or 4 bits */
- (0x06 8) | /* wrap mode = 6 */
+ (wr_mode8) | /* wrap mode = 6 or 1 */
(dev_width 7) | /* bus width */
(((nsectors-1) 0x7) 4) | /* number of sectors */
(cs 1) | /* ECC CS */
@@ -1154,6 +1185,77 @@ int gpmc_enable_hwecc_bch(int cs, int mode, int
dev_width, int nsectors,
EXPORT_SYMBOL_GPL(gpmc_enable_hwecc_bch);
/**
+ * gpmc_calculate_ecc_bch - Generate ecc bytes per block of 512 data
bytes for entire page
+
[PATCH 4/4] mtd: nand: omap2: Add data correction support
ELM module can be used for error correction of BCH 4 8 bit. Also
support read write page in one shot by adding custom read_page
write_page methods. This helps in optimizing code.
New structure member is_elm_used is added to know the status of
whether the ELM module is used for error correction or not.
Note:
ECC layout of BCH8 uses 14 bytes for 512 byte of data to make compatible
with RBL ECC layout, even though the requirement was only 13 byte. This
results a common ecc layout across RBL, U-boot Linux.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 af511a9... 8fd6ddb... M drivers/mtd/nand/omap2.c
:100644 100644 1a68c1e... 5b7054e... M
include/linux/platform_data/mtd-nand-omap2.h
drivers/mtd/nand/omap2.c | 359 +++---
include/linux/platform_data/mtd-nand-omap2.h |1 +
2 files changed, 328 insertions(+), 32 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index af511a9..8fd6ddb 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -30,6 +30,7 @@
#include plat/dma.h
#include plat/gpmc.h
#include linux/platform_data/mtd-nand-omap2.h
+#include linux/platform_data/elm.h
#defineDRIVER_NAME omap2-nand
#defineOMAP_NAND_TIMEOUT_MS5000
@@ -114,6 +115,12 @@
#define BCH8_MAX_ERROR 8 /* upto 8 bit coorectable */
#define BCH4_MAX_ERROR 4 /* upto 4 bit correctable */
+#define SECTOR_BYTES 512
+/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
+#define BCH4_BIT_PAD 4
+#define BCH8_ECC_MAX ((SECTOR_BYTES + BCH8_ECC_OOB_BYTES) * 8)
+#define BCH4_ECC_MAX ((SECTOR_BYTES + BCH4_SIZE) * 8)
+
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
@@ -153,6 +160,8 @@ struct omap_nand_info {
#ifdef CONFIG_MTD_NAND_OMAP_BCH
struct bch_control *bch;
struct nand_ecclayout ecclayout;
+ boolis_elm_used;
+ struct device *elm_dev;
#endif
};
@@ -892,6 +901,138 @@ static int omap_correct_data(struct mtd_info *mtd, u_char
*dat,
return stat;
}
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+/**
+ * omap_elm_correct_data - corrects page data area in case error reported
+ * @mtd: MTD device structure
+ * @dat: page data
+ * @read_ecc: ecc read from nand flash
+ * @calc_ecc: ecc read from HW ECC registers
+ *
+ * Check the read ecc vector from OOB area to see the page is flashed.
+ * If flashed, check any error reported by checking calculated ecc vector.
+ * For non error page, calculated ecc will be zero. For error pages,
+ * a non-zero valid syndrome polynomial reported in calculated ecc vector.
+ * Pass this non-zero syndrome polynomial to 'elm_decode_bch_error_page'
+ * with elm error vector updated for error reported sectors.
+ * On returning from this function, elm error vector updated with
+ * - number of correctable errors, error location if correctable.
+ * - if pages are non-correctable, updated with elm error vector
+ * error uncorrectable.
+ */
+static int omap_elm_correct_data(struct mtd_info *mtd, u_char *dat,
+ u_char *read_ecc, u_char *calc_ecc)
+{
+ struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
+ mtd);
+ int eccsteps = info-nand.ecc.steps;
+ int i , j, stat = 0;
+ int eccsize, eccflag, size;
+ struct elm_errorvec err_vec[ERROR_VECTOR_MAX];
+ u_char *ecc_vec = calc_ecc;
+ enum bch_ecc type;
+ bool is_error_reported = false;
+
+ /* initialize elm error vector to zero */
+ memset(err_vec, 0, sizeof(err_vec));
+ if (info-nand.ecc.strength == BCH8_MAX_ERROR) {
+ size = BCH8_SIZE;
+ eccsize = BCH8_ECC_OOB_BYTES;
+ type = BCH8_ECC;
+ } else {
+ size = BCH4_SIZE;
+ eccsize = BCH4_SIZE;
+ type = BCH4_ECC;
+ }
+
+ for (i = 0; i eccsteps ; i++) {
+ eccflag = 0;/* initialize eccflag */
+
+ for (j = 0; (j eccsize); j++) {
+ if (read_ecc[j] != 0xFF) {
+ eccflag = 1;/* data area is flashed */
+ break;
+ }
+ }
+
+ /* check calculated ecc if data area is flashed */
+ if (eccflag == 1) {
+ eccflag = 0;
+ /*
+* check any error reported, in case of error
+* non zero ecc reported.
+*/
+ for (j = 0; (j eccsize); j++) {
+ if (calc_ecc[j] != 0) {
+
Re: [PATCH v2 0/7] uio_pruss cleanup and platform support
On Fri, Sep 28, 2012 at 03:37:45PM -0400, Matt Porter wrote: Changes since v1: - Replaced uio_pruss private SRAM API use with genalloc - Added DA850 platform device and clock support - Added DA850 L3 RAM gen_pool support - Split out DT binding This series enables uio_pruss on both DA850 and AM33xx. The driver previously was not enabled by any platform and the private SRAM API was accessing an invalid SRAM bank for use on DA850. For AM33xx, DT, pinctrl, and runtime PM support are added since AM33xx only boots via DT. I'm dropping AM33xx/OMAP support from v3 for this series since the focus has turned to fixing Davinci SRAM to provide genalloc support and the associated use of that in the driver. I'll have a separate series with AM33xx support since dealing cleanly with external resets on OMAP is a bigger issue. -Matt -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/4] mtd: devices: elm: Add support for ELM error correction
some minor nitpicks below
Platforms containing the ELM module can be used to correct errors
reported by BCH 4, 8 16 bit ECC scheme. For now only 4 8 bit
support is added.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
---
:00 100644 000... b88ee83... A
Documentation/devicetree/bindings/mtd/elm.txt
:100644 100644 395733a... 0f6a94b... Mdrivers/mtd/devices/Makefile
:00 100644 000... 802b572... Adrivers/mtd/devices/elm.c
:00 100644 000... eb53163... A
include/linux/platform_data/elm.h
Documentation/devicetree/bindings/mtd/elm.txt | 18 +
drivers/mtd/devices/Makefile |4 +-
drivers/mtd/devices/elm.c | 440
+
include/linux/platform_data/elm.h | 60
4 files changed, 521 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/elm.txt
b/Documentation/devicetree/bindings/mtd/elm.txt
new file mode 100644
index 000..b88ee83
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/elm.txt
@@ -0,0 +1,18 @@
+Error location module
+
+Required properties:
+- compatible: Must be ti,elm
+- reg: physical base address and size of the registers map.
+- interrupts: Interrupt number for the elm.
+- interrupt-parent: The parent interrupt controller
+
+Optional properties:
+- ti,hwmods: Name of the hwmod associated to the elm
+
+Example:
+elm: elm@0 {
+ compatible = ti,elm;
+ reg = 0x4808 0x2000;
+ interrupt-parent = intc;
+ interrupts = 4;
+};
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 395733a..0f6a94b 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -17,8 +17,10 @@ obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_M25P80) += m25p80.o
+obj-$(CONFIG_MTD_NAND_OMAP2) += elm.o
obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
obj-$(CONFIG_MTD_SST25L) += sst25l.o
obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o
-CFLAGS_docg3.o += -I$(src)
\ No newline at end of file
+
+CFLAGS_docg3.o += -I$(src)
diff --git a/drivers/mtd/devices/elm.c b/drivers/mtd/devices/elm.c
new file mode 100644
index 000..802b572
--- /dev/null
+++ b/drivers/mtd/devices/elm.c
@@ -0,0 +1,440 @@
+/*
+ * Error Location Module
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/platform_device.h
+#include linux/module.h
+#include linux/interrupt.h
+#include linux/io.h
+#include linux/of.h
+#include linux/pm_runtime.h
+#include linux/platform_data/elm.h
+
+#define ELM_IRQSTATUS0x018
+#define ELM_IRQENABLE0x01c
+#define ELM_LOCATION_CONFIG 0x020
+#define ELM_PAGE_CTRL0x080
+#define ELM_SYNDROME_FRAGMENT_0 0x400
+#define ELM_SYNDROME_FRAGMENT_6 0x418
+#define ELM_LOCATION_STATUS 0x800
+#define ELM_ERROR_LOCATION_0 0x880
+
+/* ELM Interrupt Status Register */
+#define INTR_STATUS_PAGE_VALID BIT(8)
+
+/* ELM Interrupt Enable Register */
+#define INTR_EN_PAGE_MASKBIT(8)
+
+/* ELM Location Configuration Register */
+#define ECC_BCH_LEVEL_MASK 0x3
+
+/* ELM syndrome */
+#define ELM_SYNDROME_VALID BIT(16)
+
+/* ELM_LOCATION_STATUS Register */
+#define ECC_CORRECTABLE_MASK BIT(8)
+#define ECC_NB_ERRORS_MASK 0x1f
+
+/* ELM_ERROR_LOCATION_0-15 Registers */
+#define ECC_ERROR_LOCATION_MASK 0x1fff
+
+#define ELM_ECC_SIZE 0x7ff
+
+#define SYNDROME_FRAGMENT_REG_SIZE 0x40
+#define ERROR_LOCATION_SIZE 0x100
+#define MAX_BCH_ELM_ERROR16
+#define ELM_FRAGMENT_REG 7
+
+typedef u32 syn_t[ELM_FRAGMENT_REG];
+typedef u32 elm_error_t[MAX_BCH_ELM_ERROR];
+
+struct elm_info {
+ struct device *dev;
+ void __iomem *elm_base;
+ struct completion elm_completion;
+ struct list_head list;
+ enum bch_ecc bch_type;
+};
+
+static LIST_HEAD(elm_devices);
+
+static void elm_write_reg(void
[PATCH 0/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
From: Jean Pihet j-pi...@ti.com Remove the device dependent code (ex. cpu_is_xxx()) and settings from the driver code and instead pass them via the platform data. This allows a clean separation of the driver code and the platform code, as required by the move of the platform header files to include/linux/platform_data. Note about the smartreflex functional clocks: the smartreflex fclks are derived from sys_clk and are renamed smartreflex.%d. Since the smartreflex device names and the functional clock names are identical the device driver code uses them to control the functional clocks. Based on mainline 3.6.0. Boot tested on OMAP34 platforms. Jean Pihet (2): ARM: OMAP: hwmod: align the SmartReflex fck names ARM: OMAP: SmartReflex: pass device dependent data via platform data arch/arm/mach-omap2/clock33xx_data.c | 12 +++ arch/arm/mach-omap2/clock3xxx_data.c | 12 +++ arch/arm/mach-omap2/clock44xx_data.c |6 ++-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |8 ++--- arch/arm/mach-omap2/sr_device.c| 13 +++ drivers/power/avs/smartreflex.c| 54 +--- include/linux/power/smartreflex.h | 14 ++-- 7 files changed, 61 insertions(+), 58 deletions(-) -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: OMAP: hwmod: align the SmartReflex fck names
From: Jean Pihet j-pi...@ti.com
Rename the smartreflex fck names for consistency and better readability;
rename the clock aliases for use by the SmartReflex driver, with the
smartreflex.%d format.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/clock33xx_data.c | 12 ++--
arch/arm/mach-omap2/clock3xxx_data.c | 12 ++--
arch/arm/mach-omap2/clock44xx_data.c |6 +++---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |8
4 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/clock33xx_data.c
b/arch/arm/mach-omap2/clock33xx_data.c
index 2026311..851fc54 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -548,16 +548,16 @@ static struct clk mcasp1_fck = {
.recalc = followparent_recalc,
};
-static struct clk smartreflex0_fck = {
- .name = smartreflex0_fck,
+static struct clk smartreflex_mpu_fck = {
+ .name = smartreflex_mpu_fck,
.clkdm_name = l4_wkup_clkdm,
.parent = sys_clkin_ck,
.ops= clkops_null,
.recalc = followparent_recalc,
};
-static struct clk smartreflex1_fck = {
- .name = smartreflex1_fck,
+static struct clk smartreflex_core_fck = {
+ .name = smartreflex_core_fck,
.clkdm_name = l4_wkup_clkdm,
.parent = sys_clkin_ck,
.ops= clkops_null,
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL, mmu_fck, mmu_fck, CK_AM33XX),
- CLK(NULL, smartreflex0_fck, smartreflex0_fck,
CK_AM33XX),
- CLK(NULL, smartreflex1_fck, smartreflex1_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.0,smartreflex_mpu_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.1,smartreflex_core_fck,
CK_AM33XX),
CLK(NULL, timer1_fck, timer1_fck,CK_AM33XX),
CLK(NULL, timer2_fck, timer2_fck,CK_AM33XX),
CLK(NULL, timer3_fck, timer3_fck,CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index 700317a..796a1dc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3050,8 +3050,8 @@ static struct clk traceclk_fck = {
/* SR clocks */
/* SmartReflex fclk (VDD1) */
-static struct clk sr1_fck = {
- .name = sr1_fck,
+static struct clk smartreflex_mpu_iva_fck = {
+ .name = smartreflex_mpu_iva_fck,
.ops= clkops_omap2_dflt_wait,
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
@@ -3061,8 +3061,8 @@ static struct clk sr1_fck = {
};
/* SmartReflex fclk (VDD2) */
-static struct clk sr2_fck = {
- .name = sr2_fck,
+static struct clk smartreflex_core_fck = {
+ .name = smartreflex_core_fck,
.ops= clkops_omap2_dflt_wait,
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
@@ -3448,8 +3448,8 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, atclk_fck,atclk_fck, CK_3XXX),
CLK(NULL, traceclk_src_fck, traceclk_src_fck, CK_3XXX),
CLK(NULL, traceclk_fck, traceclk_fck, CK_3XXX),
- CLK(NULL, sr1_fck, sr1_fck, CK_34XX | CK_36XX),
- CLK(NULL, sr2_fck, sr2_fck, CK_34XX | CK_36XX),
+ CLK(NULL, smartreflex.0,smartreflex_mpu_iva_fck,
CK_34XX | CK_36XX),
+ CLK(NULL, smartreflex.1,smartreflex_core_fck, CK_34XX
| CK_36XX),
CLK(NULL, sr_l4_ick,sr_l4_ick, CK_34XX | CK_36XX),
CLK(NULL, secure_32k_fck, secure_32k_fck, CK_3XXX),
CLK(NULL, gpt12_fck,gpt12_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 500682c..b9b988a 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3224,9 +3224,9 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, slimbus2_fclk_0, slimbus2_fclk_0,
CK_443X),
CLK(NULL, slimbus2_slimbus_clk, slimbus2_slimbus_clk,
CK_443X),
CLK(NULL, slimbus2_fck, slimbus2_fck,
CK_443X),
- CLK(NULL, smartreflex_core_fck, smartreflex_core_fck,
CK_443X),
- CLK(NULL, smartreflex_iva_fck, smartreflex_iva_fck,
CK_443X),
- CLK(NULL, smartreflex_mpu_fck, smartreflex_mpu_fck,
CK_443X),
+ CLK(NULL, smartreflex.0,
[PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
From: Jean Pihet j-pi...@ti.com
Remove the device dependent code (ex. cpu_is_xxx()) and settings
from the driver code and instead pass them via the platform
data. This allows a clean separation of the driver code and the platform
code, as required by the move of the platform header files to
include/linux/platform_data.
Note about the smartreflex functional clocks: the smartreflex fclks
are derived from sys_clk and are named smartreflex.%d. Since the
smartreflex device names and the functional clock names are identical
the device driver code uses them to control the functional clocks.
Signed-off-by: Jean Pihet j-pi...@ti.com
---
arch/arm/mach-omap2/sr_device.c | 13 +
drivers/power/avs/smartreflex.c | 54 -
include/linux/power/smartreflex.h | 14 --
3 files changed, 42 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index cbeae56..06de443 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -121,6 +121,19 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void
*user)
sr_data-senn_mod = 0x1;
sr_data-senp_mod = 0x1;
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ sr_data-err_weight = OMAP3430_SR_ERRWEIGHT;
+ sr_data-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
+ sr_data-accum_data = OMAP3430_SR_ACCUMDATA;
+ if (!(strcmp(sr_data-name, smartreflex_mpu))) {
+ sr_data-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
+ } else {
+ sr_data-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
+ sr_data-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
+ }
+ }
+
sr_data-voltdm = voltdm_lookup(sr_dev_attr-sensor_voltdm_name);
if (IS_ERR(sr_data-voltdm)) {
pr_err(%s: Unable to get voltage domain pointer for VDD %s\n,
diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c
index 24768a2..c983e85 100644
--- a/drivers/power/avs/smartreflex.c
+++ b/drivers/power/avs/smartreflex.c
@@ -130,24 +130,21 @@ static irqreturn_t sr_interrupt(int irq, void *data)
static void sr_set_clk_length(struct omap_sr *sr)
{
- struct clk *sys_ck;
- u32 sys_clk_speed;
+ struct clk *fck;
+ u32 fclk_speed;
- if (cpu_is_omap34xx())
- sys_ck = clk_get(NULL, sys_ck);
- else
- sys_ck = clk_get(NULL, sys_clkin_ck);
+ fck = clk_get(sr-pdev-dev, fck);
- if (IS_ERR(sys_ck)) {
- dev_err(sr-pdev-dev, %s: unable to get sys clk\n,
- __func__);
+ if (IS_ERR(fck)) {
+ dev_err(sr-pdev-dev, %s: unable to get smartreflex fck
%s\n,
+ __func__, dev_name(sr-pdev-dev));
return;
}
- sys_clk_speed = clk_get_rate(sys_ck);
- clk_put(sys_ck);
+ fclk_speed = clk_get_rate(fck);
+ clk_put(fck);
- switch (sys_clk_speed) {
+ switch (fclk_speed) {
case 1200:
sr-clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
break;
@@ -164,34 +161,12 @@ static void sr_set_clk_length(struct omap_sr *sr)
sr-clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
break;
default:
- dev_err(sr-pdev-dev, %s: Invalid sysclk value: %d\n,
- __func__, sys_clk_speed);
+ dev_err(sr-pdev-dev, %s: Invalid fclk rate: %d\n,
+ __func__, fclk_speed);
break;
}
}
-static void sr_set_regfields(struct omap_sr *sr)
-{
- /*
-* For time being these values are defined in smartreflex.h
-* and populated during init. May be they can be moved to board
-* file or pmic specific data structure. In that case these structure
-* fields will have to be populated using the pdata or pmic structure.
-*/
- if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- sr-err_weight = OMAP3430_SR_ERRWEIGHT;
- sr-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
- sr-accum_data = OMAP3430_SR_ACCUMDATA;
- if (!(strcmp(sr-name, smartreflex_mpu_iva))) {
- sr-senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
- sr-senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
- } else {
- sr-senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
- sr-senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
- }
- }
-}
-
static void sr_start_vddautocomp(struct omap_sr *sr)
{
if (!sr_class || !(sr_class-enable) || !(sr_class-configure)) {
@@ -924,8 +899,14 @@ static int __init omap_sr_probe(struct platform_device
*pdev)
Re: [PATCH 2/2] ARM: OMAP: SmartReflex: pass device dependent data via platform data
Kevin, On Wed, Oct 3, 2012 at 4:29 PM, Kevin Hilman khil...@deeprootsystems.com wrote: jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com Remove the device dependent code (ex. cpu_is_xxx()) and settings from the driver code and instead pass them via the platform data. This allows a clean separation of the driver code and the platform code, as required by the move of the platform header files to include/linux/platform_data. Note about the smartreflex functional clocks: the smartreflex fclks are derived from sys_clk and are named smartreflex.%d. Since the smartreflex device names and the functional clock names are identical the device driver code uses them to control the functional clocks. Thanks for adding this part. One more nit below, then please resend this patch as a combined series with the align fclk names patch. Just re-sent the new series. (note: The previous patch 1 from this series I've queued separately as a fix for v3.7-rc. ) Thanks! The new series is based on mainline 3.6.0 with this patch applied. ... diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c index 24768a2..829467f 100644 --- a/drivers/power/avs/smartreflex.c +++ b/drivers/power/avs/smartreflex.c @@ -133,14 +133,11 @@ static void sr_set_clk_length(struct omap_sr *sr) struct clk *sys_ck; u32 sys_clk_speed; - if (cpu_is_omap34xx()) - sys_ck = clk_get(NULL, sys_ck); - else - sys_ck = clk_get(NULL, sys_clkin_ck); + sys_ck = clk_get(sr-pdev-dev, fck); nit: since this isn't the sys_clk anymore, could you s/sys_ck/fck/ ? Done! Thanks, Kevin Thanks, Jean -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] leds: leds-gpio: adopt pinctrl support
* AnilKumar, Chimata anilku...@ti.com [121003 03:53]: On Tue, Oct 02, 2012 at 01:29:37, Linus Walleij wrote: On Mon, Oct 1, 2012 at 5:44 PM, Tony Lindgren t...@atomide.com wrote: OK that is typical pinctrl driver implementation work. I hope Tony can advice on this? I think we're best off to just stick to alternative named modes passed from device tree. For example, for GPIO wake-ups you can have named modes such as default, enabled and idle where idle muxes things for GPIO wake-ups for the duration of idle. In this case we need to add three different values according to three modes (default, enabled, idle) and for each node. Yes those make sense from the generic leds-gpio point of view for the platforms that implement pinctrl. It seems that should also work for leds-gpio. And you can define more named modes as needed. If we want to implement pinctrl_gpio functionality we have to separate function-mask bits to 1. pinmux-mask 2. pinconf-mask, to make it generic we need following bit masks a. receiver enable/disable bit b. slew rate fast/slow bit c. pull-up/down bit Yes those can be implemented, but the problem will always be that the driver will not know if the board is using external pulls. If you implement the board specific settings in the .dts file for default, enabled and idle, the leds-gpio does not need to care if the pull is internal or external. So that seems like a more generic way to do it. I have gone through nvidia pinctrl dt data (tegra20-seaboard.dts, node drive_sdio1) which has different pinconfig values, those are mapping to pinconf values. With the above bit masks and function-mask we can identify pull-up/down, slow/high speed slew rate and direction in/out. (or) Named modes:- Are you saying named modes like this? default-input-up default-input-down default-output-up default-output-down Hmm no, you want to implement named modes that make sense from the client driver point of view. It seems that default, enabled and idle should do here? Then for the enabled mode you can set the LED specific pins to whatever pull mode you want for the board, and then leds-gpio does the rest using the gpio framework. This 1, 2 and 2.a or named modes are required to implement pinctrl_gpio_direction_input/output and pinctrl_request/free_gpio. I would just add the named modes to leds-gpio because 2a does not work for the case where you use external pulls. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3.7-rc1] omap zoom2.c: Fix compile error by including correct header files
* Peter Ujfalusi peter.ujfal...@ti.com [121003 07:52]: On 10/03/2012 05:31 PM, Tim Gardner wrote: Cc: Peter Ujfalusi peter.ujfal...@ti.com Cc: Jarkko Nikula jarkko.nik...@bitmer.com Cc: Liam Girdwood l...@ti.com Cc: Mark Brown broo...@opensource.wolfsonmicro.com Cc: Jaroslav Kysela pe...@perex.cz Cc: Takashi Iwai ti...@suse.de Cc: linux-omap@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Tim Gardner tim.gard...@canonical.com --- sound/soc/omap/zoom2.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 23de2b2..d0a8c92 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -27,9 +27,10 @@ #include asm/mach-types.h #include mach/hardware.h -#include mach/gpio.h +#include linux/gpio.h #include mach/board-zoom.h #include linux/platform_data/asoc-ti-mcbsp.h +#include linux/platform_data/gpio-omap.h /* Register descriptions for twl4030 codec part */ #include linux/mfd/twl4030-audio.h I have the same patch stashed away for the same issue. Was waiting for rc1 to send it. Can you please update the patch to also to remove the #include mach/board-zoom.h while at it? AFAIK it's not needed at all and just adds a dependency to asoc with my upcoming plat header cleanup patches. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3.7-rc1] omap zoom2.c: Fix compile error by including correct header files
* Tony Lindgren t...@atomide.com [121003 09:00]: * Peter Ujfalusi peter.ujfal...@ti.com [121003 07:52]: On 10/03/2012 05:31 PM, Tim Gardner wrote: Cc: Peter Ujfalusi peter.ujfal...@ti.com Cc: Jarkko Nikula jarkko.nik...@bitmer.com Cc: Liam Girdwood l...@ti.com Cc: Mark Brown broo...@opensource.wolfsonmicro.com Cc: Jaroslav Kysela pe...@perex.cz Cc: Takashi Iwai ti...@suse.de Cc: linux-omap@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Tim Gardner tim.gard...@canonical.com --- sound/soc/omap/zoom2.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 23de2b2..d0a8c92 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -27,9 +27,10 @@ #include asm/mach-types.h #include mach/hardware.h -#include mach/gpio.h +#include linux/gpio.h #include mach/board-zoom.h #include linux/platform_data/asoc-ti-mcbsp.h +#include linux/platform_data/gpio-omap.h /* Register descriptions for twl4030 codec part */ #include linux/mfd/twl4030-audio.h I have the same patch stashed away for the same issue. Was waiting for rc1 to send it. Can you please update the patch to also to remove the #include mach/board-zoom.h while at it? AFAIK it's not needed at all and just adds a dependency to asoc with my upcoming plat header cleanup patches. Actually we can also drop #include mach/hardware.h too, it's now empty for mach-omap2. I've updated Tim's patch below for you guys to queue via the ASoC fixes. It's against the current linux next. Regards, Tony From: Tim Gardner tim.gard...@canonical.com Date: Wed, 3 Oct 2012 08:31:26 -0600 Subject: [PATCH] omap zoom2.c: Fix compile error by including correct header files Also drop the includes that are no longer needed and just cause problems for the ARM common zImage. Acked-by: Peter Ujfalusi peter.ujfal...@ti.com Cc: Jarkko Nikula jarkko.nik...@bitmer.com Cc: Liam Girdwood l...@ti.com Cc: Mark Brown broo...@opensource.wolfsonmicro.com Cc: Jaroslav Kysela pe...@perex.cz Cc: Takashi Iwai ti...@suse.de Cc: linux-omap@vger.kernel.org Cc: alsa-de...@alsa-project.org Signed-off-by: Tim Gardner tim.gard...@canonical.com [t...@atomide.com: updated to drop unneeded headers] Signed-off-by: Tony Lindgren t...@atomide.com diff --git a/sound/soc/omap/zoom2.c b/sound/soc/omap/zoom2.c index 677b567..1ff6bb9 100644 --- a/sound/soc/omap/zoom2.c +++ b/sound/soc/omap/zoom2.c @@ -21,15 +21,14 @@ #include linux/clk.h #include linux/platform_device.h +#include linux/gpio.h #include sound/core.h #include sound/pcm.h #include sound/soc.h #include asm/mach-types.h -#include mach/hardware.h -#include mach/gpio.h -#include mach/board-zoom.h #include linux/platform_data/asoc-ti-mcbsp.h +#include linux/platform_data/gpio-omap.h /* Register descriptions for twl4030 codec part */ #include linux/mfd/twl4030-audio.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
ASoC: Fix wrong include for McPDM
McPDM needs platt/cpu.h for omap_rev and not omap_hwmod.h. Drivers must not include omap_hwmod.h at, it will be private to mach-omap2 soon. Fix the problem before other drivers will also start including omap_hwmod.h. Note that also plat/cpu.h will be going away, so the omap_rev check needs to be replaced with mcpdm-watchdog flag from platform_data or DT. Signed-off-by: Tony Lindgren t...@atomide.com --- Can you guys please queue this as fix for -rc1? This removes and unnecessary dependency for making omap_hwmod.h local to mach-omap2. Then I'm hoping Peter will remove the plat/cpu.h dependency for v3.8 merge window ;) --- a/sound/soc/omap/omap-mcpdm.c +++ b/sound/soc/omap/omap-mcpdm.c @@ -40,7 +40,7 @@ #include sound/pcm_params.h #include sound/soc.h -#include plat/omap_hwmod.h +#include plat/cpu.h #include omap-mcpdm.h #include omap-pcm.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] ARM: OMAP: hwmod: align the SmartReflex fck names
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL, mmu_fck, mmu_fck, CK_AM33XX),
- CLK(NULL, smartreflex0_fck, smartreflex0_fck,
CK_AM33XX),
- CLK(NULL, smartreflex1_fck, smartreflex1_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.0,smartreflex_mpu_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.1,smartreflex_core_fck,
CK_AM33XX),
CLK(NULL, timer1_fck, timer1_fck,CK_AM33XX),
CLK(NULL, timer2_fck, timer2_fck,CK_AM33XX),
CLK(NULL, timer3_fck, timer3_fck,CK_AM33XX),
I think this should be something like this instead:
CLK(smartreflex.0,fck, smartreflex_mpu_fck, CK_AM33XX),
CLK(smartreflex.1,fck, smartreflex_core_fck, CK_AM33XX),
Where the first one is the dev name, the second one is the
alias you want to use in the client driver?
Regards,
Tony
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Re: [PATCH 1/2] ARM: OMAP: hwmod: align the SmartReflex fck names
Hi Tony,
On Wed, Oct 3, 2012 at 7:00 PM, Tony Lindgren t...@atomide.com wrote:
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL, mmu_fck, mmu_fck, CK_AM33XX),
- CLK(NULL, smartreflex0_fck, smartreflex0_fck,
CK_AM33XX),
- CLK(NULL, smartreflex1_fck, smartreflex1_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.0,smartreflex_mpu_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex.1,smartreflex_core_fck,
CK_AM33XX),
CLK(NULL, timer1_fck, timer1_fck,CK_AM33XX),
CLK(NULL, timer2_fck, timer2_fck,CK_AM33XX),
CLK(NULL, timer3_fck, timer3_fck,CK_AM33XX),
I think this should be something like this instead:
CLK(smartreflex.0,fck, smartreflex_mpu_fck, CK_AM33XX),
CLK(smartreflex.1,fck, smartreflex_core_fck, CK_AM33XX),
Where the first one is the dev name, the second one is the
alias you want to use in the client driver?
Ok, thanks for the suggestion.
It works however I get a ' smartreflex.0: alias fck already exists'
warning at boot, coming from _add_hwmod_clocks_clkdev (called from
omap_device_alloc).
Since an fck is implicitly added for every device (in
_add_hwmod_clocks_clkdev) I replaced fck in the alias definition by
NULL but the warning is still present.
What do you think? /me dives into the omap_device code for details...
Regards,
Tony
Thanks,
Jean
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Re: Converting vrfb.c
Hi,
* Tony Lindgren t...@atomide.com [120928 08:02]:
* Tomi Valkeinen tomi.valkei...@ti.com [120928 05:05]:
Hi,
I'm a bit at loss how to deal with drivers/video/omap2/vrfb.c.
VRFB is part of the SDRAM controller on OMAP2 and OMAP3. vrfb.c uses the
following functions from sdrc.h:
omap2_sms_write_rot_control();
omap2_sms_write_rot_size();
omap2_sms_write_rot_physical_ba();
There are no other dependencies to the sdrc.c.
Those functions are quite simple:
void omap2_sms_write_rot_control(u32 val, unsigned ctx)
{
sms_write_reg(val, SMS_ROT_CONTROL(ctx));
}
void omap2_sms_write_rot_size(u32 val, unsigned ctx)
{
sms_write_reg(val, SMS_ROT_SIZE(ctx));
}
void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
{
sms_write_reg(val, SMS_ROT_PHYSICAL_BA(ctx));
}
vrfb.c is in turn used by omapfb and omap v4l2 driver.
So... Should I just remove the sdrc.h dependency and make vrfb.c ioremap
those SMS registers itself? Those three registers are VRFB specific, so
they are not used by anyone else. In that case I'd need to pass the SMS
base address to vrfb.c somehow.
Or should I have some kind of platform data passed to vrfb.c, which
contains func pointers to the above three functions?
Or should vrfb.c be moved into mach-omap2/? But then how would omapfb
call it? Passing vrfb functions as pointers in omapfb platform data?
Maybe just export those functions in sdrc.c for now? Eventually
that should be just a regular device driver too..
Actually, if you're only using it to save and restore the hw
context, why don't you let mach-omap2/sdrc.c do it based on runtime
PM calls? It already has omap2_sms_save/restore_context.
Or maybe Paul has some better ideas?
Regards,
Tony
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Re: [PATCH 3/4] ARM: OMAP2: gpmc: Add support for BCH ECC scheme
On Wed, Oct 03, 2012 at 03:29:48PM +0100, Philip, Avinash wrote:
Add support for BCH ECC scheme to gpmc driver and also enabling multi
sector read/write. This helps in doing single shot NAND page read and
write.
ECC engine configurations
BCH 4 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured in wrap mode 1 and with ecc_size0 as
13 and ecc_size1 as 1.
BCH 8 bit support
1. write = ECC engine configured in wrap mode 6 and with ecc_size0 as 32.
2. read = ECC engine configured in wrap mode 1 and with ecc_size0 as
26 and ecc_size1 as 2.
Note: For BCH8 ECC bytes set to 14 to make compatible with RBL.
Hi Philip,
I have a few comments/questions below,
(...)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 72428bd..c9bc3cf 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -24,6 +24,7 @@
#include linux/io.h
#include linux/module.h
#include linux/interrupt.h
+#include linux/mtd/nand.h
#include asm/mach-types.h
#include plat/gpmc.h
@@ -83,6 +84,18 @@
#define ENABLE_PREFETCH (0x1 7)
#define DMA_MPU_MODE 2
+/* GPMC ecc engine settings for read */
+#define BCH_WRAPMODE_1 1 /* BCH wrap mode 6 */
Comment should say mode 1.
(...)
/**
+ * gpmc_calculate_ecc_bch- Generate ecc bytes per block of 512 data
bytes for entire page
+ * @cs: chip select number
+ * @dat: The pointer to data on which ECC is computed
+ * @ecc: The ECC output buffer
+ */
+int gpmc_calculate_ecc_bch(int cs, const u_char *dat, u_char *ecc)
+{
+ int i, eccbchtsel;
+ u32 nsectors, reg, bch_val1, bch_val2, bch_val3, bch_val4;
+
+ if (gpmc_ecc_used != cs)
+ return -EINVAL;
+
+ /* read number of sectors for ecc to be calculated */
+ nsectors = ((gpmc_read_reg(GPMC_ECC_CONFIG) 4) 0x7) + 1;
+ /*
+ * find BCH scheme used
+ * 0 - BCH4
+ * 1 - BCH8
+ */
+ eccbchtsel = ((gpmc_read_reg(GPMC_ECC_CONFIG) 12) 0x3);
+
+ /* update ecc bytes for entire page */
+ for (i = 0; i nsectors; i++) {
+
+ reg = GPMC_ECC_BCH_RESULT_0 + 16 * i;
+
+ /* Read hw-computed remainder */
+ bch_val1 = gpmc_read_reg(reg + 0);
+ bch_val2 = gpmc_read_reg(reg + 4);
+ if (eccbchtsel) {
+ bch_val3 = gpmc_read_reg(reg + 8);
+ bch_val4 = gpmc_read_reg(reg + 12);
+ }
+
+ if (eccbchtsel) {
+ /* BCH8 ecc scheme */
+ *ecc++ = (bch_val4 0xFF);
+ *ecc++ = ((bch_val3 24) 0xFF);
+ *ecc++ = ((bch_val3 16) 0xFF);
+ *ecc++ = ((bch_val3 8) 0xFF);
+ *ecc++ = (bch_val3 0xFF);
+ *ecc++ = ((bch_val2 24) 0xFF);
+ *ecc++ = ((bch_val2 16) 0xFF);
+ *ecc++ = ((bch_val2 8) 0xFF);
+ *ecc++ = (bch_val2 0xFF);
+ *ecc++ = ((bch_val1 24) 0xFF);
+ *ecc++ = ((bch_val1 16) 0xFF);
+ *ecc++ = ((bch_val1 8) 0xFF);
+ *ecc++ = (bch_val1 0xFF);
+ /* 14th byte of ecc not used */
+ *ecc++ = 0;
+ } else {
+ /* BCH4 ecc scheme */
+ *ecc++ = ((bch_val2 12) 0xFF);
+ *ecc++ = ((bch_val2 4) 0xFF);
+ *ecc++ = (((bch_val2 0xF) 4) |
+ ((bch_val1 28) 0xF));
+ *ecc++ = ((bch_val1 20) 0xFF);
+ *ecc++ = ((bch_val1 12) 0xFF);
+ *ecc++ = ((bch_val1 4) 0xFF);
+ *ecc++ = ((bch_val1 0xF) 4);
+ }
+ }
+
+ gpmc_ecc_used = -EINVAL;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(gpmc_calculate_ecc_bch);
Here you introduce a function very similar to gpmc_calculate_ecc_bch4 and
gpmc_calculate_ecc_bch8, but without the added benefit (IMHO) of the constant
polynomial that allows to get an ecc sequence of 0xFFs for a buffer filled with
0xFFs. Why ?
If using the ELM prevents you from reusing gpmc_calculate_ecc_bch[48], could
you explain in which way ?
Best regards,
--
Ivan
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Re: [PATCH 4/4] mtd: nand: omap2: Add data correction support
On Wed, Oct 03, 2012 at 03:29:49PM +0100, Philip, Avinash wrote:
ELM module can be used for error correction of BCH 4 8 bit. Also
support read write page in one shot by adding custom read_page
write_page methods. This helps in optimizing code.
New structure member is_elm_used is added to know the status of
whether the ELM module is used for error correction or not.
Note:
ECC layout of BCH8 uses 14 bytes for 512 byte of data to make compatible
with RBL ECC layout, even though the requirement was only 13 byte. This
results a common ecc layout across RBL, U-boot Linux.
See a few comments below,
(...)
+static int omap_elm_correct_data(struct mtd_info *mtd, u_char *dat,
+ u_char *read_ecc, u_char *calc_ecc)
+{
+ struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
+ mtd);
+ int eccsteps = info-nand.ecc.steps;
+ int i , j, stat = 0;
+ int eccsize, eccflag, size;
+ struct elm_errorvec err_vec[ERROR_VECTOR_MAX];
+ u_char *ecc_vec = calc_ecc;
+ enum bch_ecc type;
+ bool is_error_reported = false;
+
+ /* initialize elm error vector to zero */
+ memset(err_vec, 0, sizeof(err_vec));
+ if (info-nand.ecc.strength == BCH8_MAX_ERROR) {
+ size = BCH8_SIZE;
+ eccsize = BCH8_ECC_OOB_BYTES;
+ type = BCH8_ECC;
+ } else {
+ size = BCH4_SIZE;
+ eccsize = BCH4_SIZE;
+ type = BCH4_ECC;
+ }
+
+ for (i = 0; i eccsteps ; i++) {
+ eccflag = 0;/* initialize eccflag */
+
+ for (j = 0; (j eccsize); j++) {
+ if (read_ecc[j] != 0xFF) {
+ eccflag = 1;/* data area is flashed */
Just a reminder: this way of checking if a page has been programmed is not
robust to bitflips,
so you may get into trouble with UBIFS on a fairly recent device.
(...)
@@ -1039,14 +1180,45 @@ static void omap3_enable_hwecc_bch(struct mtd_info
*mtd, int mode)
nerrors = info-nand.ecc.strength;
dev_width = (chip-options NAND_BUSWIDTH_16) ? 1 : 0;
+#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ if (info-is_elm_used) {
+ /*
+* Program GPMC to perform correction on (steps * 512) byte
+* sector at a time.
+*/
+ gpmc_enable_hwecc_bch(info-gpmc_cs, mode, dev_width,
+ info-nand.ecc.steps, nerrors);
+ return;
+ }
+#endif
/*
-* Program GPMC to perform correction on one 512-byte sector at a
time.
-* Using 4 sectors at a time (i.e. ecc.size = 2048) is also possible
and
-* gives a slight (5%) performance gain (but requires additional
code).
+* Program GPMC to perform correction on one 512-byte sector at
+* a time.
Why removing the comment about 4-sector perf gain ? :-)
(...)
@@ -1146,35 +1402,62 @@ static int omap3_init_bch(struct mtd_info *mtd, int
ecc_opt)
goto fail;
}
- /* initialize GPMC BCH engine */
- ret = gpmc_init_hwecc_bch(info-gpmc_cs, 1, max_errors);
- if (ret)
- goto fail;
-
- /* software bch library is only used to detect and locate errors */
- info-bch = init_bch(13, max_errors, 0x201b /* hw polynomial */);
- if (!info-bch)
- goto fail;
+ info-nand.ecc.size = 512;
+ info-nand.ecc.hwctl = omap3_enable_hwecc_bch;
+ info-nand.ecc.mode = NAND_ECC_HW;
+ info-nand.ecc.strength = hw_errors;
- info-nand.ecc.size= 512;
- info-nand.ecc.hwctl = omap3_enable_hwecc_bch;
- info-nand.ecc.correct = omap3_correct_data_bch;
- info-nand.ecc.mode= NAND_ECC_HW;
+ if (info-is_elm_used (mtd-writesize = 4096)) {
+ enum bch_ecc bch_type;
- /*
-* The number of corrected errors in an ecc block that will trigger
-* block scrubbing defaults to the ecc strength (4 or 8).
-* Set mtd-bitflip_threshold here to define a custom threshold.
-*/
+ if (hw_errors == BCH8_MAX_ERROR) {
+ bch_type = BCH8_ECC;
+ info-nand.ecc.bytes = BCH8_SIZE;
+ } else {
+ bch_type = BCH4_ECC;
+ info-nand.ecc.bytes = BCH4_SIZE;
+ }
- if (max_errors == 8) {
- info-nand.ecc.strength = 8;
- info-nand.ecc.bytes = 13;
- info-nand.ecc.calculate = omap3_calculate_ecc_bch8;
+ info-nand.ecc.correct = omap_elm_correct_data;
+ info-nand.ecc.calculate = omap3_calculate_ecc_bch;
+ info-nand.ecc.read_page = omap_read_page_bch;
+ info-nand.ecc.write_page =
Re: [PATCH v2 8/9] ARM: OMAP: iommu: add device tree support
Hi Matt, On 2 October 2012 16:25, Matt Porter mpor...@ti.com wrote: ... I can see why you went this path with the iommu driver as it already had some integration code present here. I have some concerns going forward about how this should be long-term. Take any platform booting only with DT populated, we'd like to avoid having to use this approach where platform private APIs are called via pdata. In fact, it's going to makes thing ugly to carry any sort of pdata for a driver that's otherwise driven exclusively from DT. For AM335x, I can implement this approach, but it means adding some pruss specific integration code just to have it create the pdata for reset_name and assert/deassert. Yes I agree, it looks a bit ugly for devices that have more than one reset line name too, but right now there is no other way to keep the reset names and also provide flexibility to the driver to control them in a given order. From reading all the threads on hardresets and OMAP, it seems we may not be able to come up with a generic OMAP handler for these resets and that's really reflected in the fact that this API exists. So given that, it reasons that OMAP isn't the only one needing a reset API for drivers. I'm thinking that (as trivial as it may seem), this support may need to move to a reset subsystem such that drivers have a clean way to access reset resources in an SoC. Well, there was a point where the OMAP hwmod code contained the reset code and at least for me it was working fine, with iommu and ipu processor, just with a minor misleading warning print... however then this code got stripped out and since there appeared to be people needing to handle their reset lines in unknown ways it was advised that everybody should implement their own reset functions, but in my case I could reuse most of the disabled code at the expense of almost duplicating _enable (omap_hwmod) function while waiting all the reset line users started asking for changes. I'm curious if you or others have thought about where this needs to go next. I haven't planned for a reset subsystem or a more generic implementation, although I have been looking for a way to avoid using the pdata function pointers. When I first thought about a reset subsystem it seemed to trivial to bother with but looking at the reasoning behind the power_seq subsystem, it seems to have similar justification to get this machine specific logic out of the platform code and under standardized control of the driver. IMHO, the reset code even if made a subsystem or a library, would still need to interface with machine specific code and definitions (say omap_hwmod), so I don't see much difference in making the omap_device reset handlers as exported symbols for the time being, with acceptance of the owners of omap_device code. And then if power_seq makes it to mainline perhaps extending it to handle deassert, assert and softreset events, but then again this would have the same hooks to omap_hwmod which is the one with the prcm information. Regards, Omar -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: OMAP2+: PM: MPU DVFS: use generic CPU device for MPU-SS
From: Kevin Hilman khil...@ti.com
Currently, a dummy omap_device is created for the MPU sub-system so
that a device node exists for MPU DVFS. Specifically, for the
association of MPU OPPs to a device node, and so that a voltage
regulator can be mapped to a device node.
For drivers to get a handle to this device node, an OMAP-specific API
has been used. However, the kernel already has device nodes for the
CPU(s) in the system, so we can use those instead of an OMAP-specific
dummy device and then drivers (like OMAP CPUfreq) can use generic
APIs.
To use the existing CPU device nodes, modify the OPP creation and
regulator registration to use the CPU0 device node for registraion.
NOTE: this patch always uses CPU0 as the device node. On all
OMAPs today, MPU DVFS scales all CPUs together, so this will
not be a problem, but this assumption will need to be changed
if independently scalable CPUs are introduced.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
Applies on current Linus master.
Targetted for v3.7-rc1 so CPUfreq driver can be cleaned of plat includes
(follow on series)
arch/arm/mach-omap2/opp.c| 23 +--
arch/arm/mach-omap2/pm.c | 11 ++-
arch/arm/mach-omap2/twl-common.c |2 +-
3 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 45ad7f7..58e16ae 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -18,6 +18,7 @@
*/
#include linux/module.h
#include linux/opp.h
+#include linux/cpu.h
#include plat/omap_device.h
@@ -62,13 +63,23 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
__func__, i);
return -EINVAL;
}
- oh = omap_hwmod_lookup(opp_def-hwmod_name);
- if (!oh || !oh-od) {
- pr_debug(%s: no hwmod or odev for %s, [%d] cannot add
OPPs.\n,
-__func__, opp_def-hwmod_name, i);
- continue;
+
+ if (!strncmp(opp_def-hwmod_name, mpu, 3)) {
+ /*
+* All current OMAPs share voltage rail and
+* clock source, so CPU0 is used to represent
+* the MPU-SS.
+*/
+ dev = get_cpu_device(0);
+ } else {
+ oh = omap_hwmod_lookup(opp_def-hwmod_name);
+ if (!oh || !oh-od) {
+ pr_debug(%s: no hwmod or odev for %s, [%d]
cannot add OPPs.\n,
+__func__, opp_def-hwmod_name, i);
+ continue;
+ }
+ dev = oh-od-pdev-dev;
}
- dev = oh-od-pdev-dev;
r = opp_add(dev, opp_def-freq, opp_def-u_volt);
if (r) {
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 939bd6f..173c2be 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -16,6 +16,7 @@
#include linux/opp.h
#include linux/export.h
#include linux/suspend.h
+#include linux/cpu.h
#include asm/system_misc.h
@@ -168,7 +169,15 @@ static int __init omap2_set_init_voltage(char *vdd_name,
char *clk_name,
goto exit;
}
- dev = omap_device_get_by_hwmod_name(oh_name);
+ if (!strncmp(oh_name, mpu, 3))
+ /*
+* All current OMAPs share voltage rail and clock
+* source, so CPU0 is used to represent the MPU-SS.
+*/
+ dev = get_cpu_device(0);
+ else
+ dev = omap_device_get_by_hwmod_name(oh_name);
+
if (IS_ERR(dev)) {
pr_err(%s: Unable to get dev pointer for hwmod %s\n,
__func__, oh_name);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 45f7741..3f5eacc 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -158,7 +158,7 @@ static struct regulator_init_data omap3_vpll2_idata = {
};
static struct regulator_consumer_supply omap3_vdd1_supply[] = {
- REGULATOR_SUPPLY(vcc, mpu.0),
+ REGULATOR_SUPPLY(vcc, cpu0),
};
static struct regulator_consumer_supply omap3_vdd2_supply[] = {
--
1.7.9.2
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Re: [PATCH 09/17] serial/8250: Limit the omap workarounds to omap1
* Alan Cox a...@linux.intel.com [120911 12:02]: Even better would be if for other cases is_omap_port and friends returned 0... Yes it seems that those macros could be moved from plat-omap/serial.h to live in drivers/tty/serial/8250/8250.h? Or do you have some better place in mind? I've not looked at it enough to decide if it's doable or not. I'm happy either way - both patches are progress the right way! FYI, I'll send something along these lines as a separate patch as [PATCH] tty/serial/8250: Make omap hardware workarounds local to 8250.h Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4] cpufreq: OMAP: fixes for v3.7-rc2
From: Kevin Hilman khil...@ti.com Here's a series with a couple bug fixes and a couple fixes that make this driver support newer OMAP-based SoCs. The 'get_cpu_device' patch is needed due to a change in the OMAP OMAP PM core code which enforces use of get_cpu_device() instead of a deprecated OMAP-specific API. The usage of plat/*.h headers breaks single zImage, so platforms are cleaning up and/or removing plat/*.h so the driver needs to be fixed accordingly. This series is based on the merge of Rafael's pm-for-3.7-rc1 tag into Linus' master branch: commit 16642a2e7be23bbda013fc32d8f6c68982eab603. Tested CPUfreq on OMAP platforms: 3430/n900, 3530/Overo, 3730/OveroSTORM, 3730/Beagle-XM, 4430/Panda. Rafael, if you're OK with this series, I'll get a pull request ASAP so it can be included for v3.7-rc2. Kevin Hilman (3): cpufreq: OMAP: ensure valid clock rate before scaling cpufreq: OMAP: remove unused plat/omap-pm.h cpufreq: OMAP: use get_cpu_device() instead of omap_device API Paul Walmsley (1): cpufreq: OMAP: fix clock usage to be SoC independent, remove plat/ includes drivers/cpufreq/omap-cpufreq.c | 36 1 file changed, 12 insertions(+), 24 deletions(-) -- 1.7.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] cpufreq: OMAP: use get_cpu_device() instead of omap_device API
From: Kevin Hilman khil...@ti.com
OMAP PM core code has moved to using the existing, generic CPU devices
for attaching OPPs, so the CPUfreq driver can now use the generic
get_cpu_device() API instead of the OMAP-specific omap_device API.
This allows us to remove the last plat/* include from this driver.
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
drivers/cpufreq/omap-cpufreq.c |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 5d1f5e4..1f3417a 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -30,8 +30,6 @@
#include asm/smp_plat.h
#include asm/cpu.h
-#include plat/omap_device.h
-
/* OPP tolerance in percentage */
#defineOPP_TOLERANCE 4
@@ -255,10 +253,10 @@ static struct cpufreq_driver omap_driver = {
static int __init omap_cpufreq_init(void)
{
- mpu_dev = omap_device_get_by_hwmod_name(mpu);
- if (IS_ERR(mpu_dev)) {
+ mpu_dev = get_cpu_device(0);
+ if (!mpu_dev) {
pr_warning(%s: unable to get the mpu device\n, __func__);
- return PTR_ERR(mpu_dev);
+ return -EINVAL;
}
mpu_reg = regulator_get(mpu_dev, vcc);
--
1.7.9.2
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[PATCH 2/4] cpufreq: OMAP: remove unused plat/omap-pm.h
From: Kevin Hilman khil...@ti.com The plat/*.h headers are going away, and this one is not used. remove it. Signed-off-by: Kevin Hilman khil...@ti.com --- drivers/cpufreq/omap-cpufreq.c |1 - 1 file changed, 1 deletion(-) diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c index 0fe395a..7d4d455 100644 --- a/drivers/cpufreq/omap-cpufreq.c +++ b/drivers/cpufreq/omap-cpufreq.c @@ -31,7 +31,6 @@ #include asm/cpu.h #include plat/clock.h -#include plat/omap-pm.h #include plat/common.h #include plat/omap_device.h -- 1.7.9.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] cpufreq: OMAP: ensure valid clock rate before scaling
From: Kevin Hilman khil...@ti.com
Ensure the clock rate that will be used is a valid one before
attempting to scale the voltage. Currently the driver assumes it has
a valid frequency from the OPP table, but boards using different
system oscillators might not have exact matches with the OPP table,
and result in a failing call to clk_set_rate().
This is particularily bad because the voltage may be scaled even
though the frequency is not. This will obviously lead to some
unpredictable behavior, especially if the frequency is high and
the voltage is dropped.
Thanks to Joni Lapilainen for reporting crashes seen on 3430/n900.
Reported-by: Joni Lapilainen joni.lapilai...@gmail.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
drivers/cpufreq/omap-cpufreq.c |8
1 file changed, 8 insertions(+)
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 65f8e9a..0fe395a 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -108,6 +108,14 @@ static int omap_target(struct cpufreq_policy *policy,
}
freq = freqs.new * 1000;
+ ret = clk_round_rate(mpu_clk, freq);
+ if (IS_ERR_VALUE(ret)) {
+ dev_warn(mpu_dev,
+CPUfreq: Cannot find matching frequency for %lu\n,
+freq);
+ return ret;
+ }
+ freq = ret;
if (mpu_reg) {
opp = opp_find_freq_ceil(mpu_dev, freq);
--
1.7.9.2
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[PATCH 3/4] cpufreq: OMAP: fix clock usage to be SoC independent, remove plat/ includes
From: Paul Walmsley p...@pwsan.com
OMAP core code now has SoC-independent clock alias for the scalable
CPU clock. Using it means driver is SoC independent and will work for
AM3xxx SoCs as well as OMAP1/3/4.
While here, remove some unnecessary plat/ includes that are
interfering with multi-subarch ARM kernels.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rafael J. Wysocki r...@sisk.pl
[t...@atomide.com: updated already changed clock aliases]
Signed-off-by: Tony Lindgren t...@atomide.com
[khil...@ti.com: minor shortlog/changelog updates]
Signed-off-by: Kevin Hilman khil...@ti.com
---
drivers/cpufreq/omap-cpufreq.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 7d4d455..5d1f5e4 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -30,19 +30,14 @@
#include asm/smp_plat.h
#include asm/cpu.h
-#include plat/clock.h
-#include plat/common.h
#include plat/omap_device.h
-#include mach/hardware.h
-
/* OPP tolerance in percentage */
#defineOPP_TOLERANCE 4
static struct cpufreq_frequency_table *freq_table;
static atomic_t freq_table_users = ATOMIC_INIT(0);
static struct clk *mpu_clk;
-static char *mpu_clk_name;
static struct device *mpu_dev;
static struct regulator *mpu_reg;
@@ -179,7 +174,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy
*policy)
{
int result = 0;
- mpu_clk = clk_get(NULL, mpu_clk_name);
+ mpu_clk = clk_get(NULL, cpufreq_ck);
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
@@ -260,18 +255,6 @@ static struct cpufreq_driver omap_driver = {
static int __init omap_cpufreq_init(void)
{
- if (cpu_is_omap24xx())
- mpu_clk_name = virt_prcm_set;
- else if (cpu_is_omap34xx())
- mpu_clk_name = dpll1_ck;
- else if (cpu_is_omap44xx())
- mpu_clk_name = dpll_mpu_ck;
-
- if (!mpu_clk_name) {
- pr_err(%s: unsupported Silicon?\n, __func__);
- return -EINVAL;
- }
-
mpu_dev = omap_device_get_by_hwmod_name(mpu);
if (IS_ERR(mpu_dev)) {
pr_warning(%s: unable to get the mpu device\n, __func__);
--
1.7.9.2
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Re: [PATCH 1/2] ARM: OMAP: hwmod: align the SmartReflex fck names
Tony Lindgren t...@atomide.com writes:
* jean.pi...@newoldbits.com jean.pi...@newoldbits.com [121003 08:48]:
@@ -1036,8 +1036,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL, mmu_fck, mmu_fck, CK_AM33XX),
-CLK(NULL, smartreflex0_fck, smartreflex0_fck,
CK_AM33XX),
-CLK(NULL, smartreflex1_fck, smartreflex1_fck,
CK_AM33XX),
+CLK(NULL, smartreflex.0,smartreflex_mpu_fck,
CK_AM33XX),
+CLK(NULL, smartreflex.1,smartreflex_core_fck,
CK_AM33XX),
CLK(NULL, timer1_fck, timer1_fck,CK_AM33XX),
CLK(NULL, timer2_fck, timer2_fck,CK_AM33XX),
CLK(NULL, timer3_fck, timer3_fck,CK_AM33XX),
I think this should be something like this instead:
CLK(smartreflex.0,fck, smartreflex_mpu_fck, CK_AM33XX),
CLK(smartreflex.1,fck, smartreflex_core_fck, CK_AM33XX),
Where the first one is the dev name, the second one is the
alias you want to use in the client driver?
Actually, the omap_device creation will create this kind of alias for
you, with the device name populated etc, so adding device names here
isn't necessary.
For omap_devices where drivers are always using clk_get(dev, ...),
the name in the initial clkdev table here really doesn't matter.
However, for core code that needs to do a clk_get(NULL, name), then
this name matters. In chatting with Paul offline, he mentioned part of
the CCF conversion will be using clk_get(NULL, ...) on the main_clk
listed in each hwmod. For that reason, it's important that this string
match the name in the hwmod.
I belive the patch below should make this compatible with any future
use.
Jean, can you fold this into $SUBJECT patch?
Thanks,
Kevin
diff --git a/arch/arm/mach-omap2/clock33xx_data.c
b/arch/arm/mach-omap2/clock33xx_data.c
index 6de3dc7..8a16504 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1034,8 +1034,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(davinci-mcasp.1, NULL, mcasp1_fck,CK_AM33XX),
CLK(NULL, mmc2_fck, mmc2_fck, CK_AM33XX),
CLK(NULL, mmu_fck, mmu_fck, CK_AM33XX),
- CLK(NULL, smartreflex.0,smartreflex_mpu_fck,
CK_AM33XX),
- CLK(NULL, smartreflex.1,smartreflex_core_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex_mpu_fck, smartreflex_mpu_fck,
CK_AM33XX),
+ CLK(NULL, smartreflex_core_fck, smartreflex_core_fck,
CK_AM33XX),
CLK(NULL, timer1_fck, timer1_fck,CK_AM33XX),
CLK(NULL, timer2_fck, timer2_fck,CK_AM33XX),
CLK(NULL, timer3_fck, timer3_fck,CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index a197cf2..191d261 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3447,8 +3447,8 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(NULL, atclk_fck,atclk_fck, CK_3XXX),
CLK(NULL, traceclk_src_fck, traceclk_src_fck, CK_3XXX),
CLK(NULL, traceclk_fck, traceclk_fck, CK_3XXX),
- CLK(NULL, smartreflex.0,smartreflex_mpu_iva_fck,
CK_34XX | CK_36XX),
- CLK(NULL, smartreflex.1,smartreflex_core_fck, CK_34XX
| CK_36XX),
+ CLK(NULL, smartreflex_mpu_iva_fck, smartreflex_mpu_iva_fck,
CK_34XX | CK_36XX),
+ CLK(NULL, smartreflex_core_fck, smartreflex_core_fck, CK_34XX
| CK_36XX),
CLK(NULL, sr_l4_ick,sr_l4_ick, CK_34XX | CK_36XX),
CLK(NULL, secure_32k_fck, secure_32k_fck, CK_3XXX),
CLK(NULL, gpt12_fck,gpt12_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 9cc1112..19e0c1e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3224,8 +3224,8 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, slimbus2_fclk_0, slimbus2_fclk_0,
CK_443X),
CLK(NULL, slimbus2_slimbus_clk, slimbus2_slimbus_clk,
CK_443X),
CLK(NULL, slimbus2_fck, slimbus2_fck,
CK_443X),
- CLK(NULL, smartreflex.0,smartreflex_core_fck,
CK_443X),
- CLK(NULL, smartreflex.1,smartreflex_iva_fck,
CK_443X),
+ CLK(NULL, smartreflex_core_fck, smartreflex_core_fck,
CK_443X),
+ CLK(NULL, smartreflex_mpu_fck, smartreflex_iva_fck,
CK_443X),
CLK(NULL, smartreflex.2,smartreflex_mpu_fck,
[PATCH 3/5] ARM: omap: vc: .get_voltage callback
From: Mike Turquette mturque...@linaro.org
Implement the voltdm-get_voltage callback for the voltage controller
driver. This reads the DATA field corresponding to each VC and returns
the voltage, after converting it from vsel format.
If DATA is zero (the reset value) then the caller must interpret this as
the PMIC running at the default power-on voltage. In such a case DT
data for the PMIC is necessary to know the voltage.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/vc.c | 21 +
arch/arm/mach-omap2/vc.h |1 +
2 files changed, 22 insertions(+)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 2bcac64..90a9ea6 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -101,6 +101,27 @@ static int omap_vc_config_channel(struct voltagedomain
*voltdm)
}
/* Voltage scale and accessory APIs */
+unsigned long omap_vc_get_bypass_data(struct voltagedomain *voltdm)
+{
+ struct omap_vc_channel *vc = voltdm-vc;
+ u32 vc_bypass_value;
+ u8 vsel;
+ unsigned long volt;
+
+ /* sanity */
+ if (!voltdm-pmic || !voltdm-pmic-vsel_to_uv ||
+ !voltdm-read || !voltdm-write)
+ return 0;
+
+ vc_bypass_value = voltdm-read(vc-common-bypass_val_reg);
+ vc_bypass_value = vc-common-data_mask;
+ vsel = vc_bypass_value __ffs(vc-common-data_mask);
+
+ volt = voltdm-pmic-vsel_to_uv(vsel);
+
+ return volt;
+}
+
int omap_vc_pre_scale(struct voltagedomain *voltdm,
unsigned long target_volt,
u8 *target_vsel, u8 *current_vsel)
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 84a61b1..e7d4719 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -112,6 +112,7 @@ extern struct omap_vc_channel omap4_vc_iva;
extern struct omap_vc_channel omap4_vc_core;
void omap_vc_init_channel(struct voltagedomain *voltdm);
+unsigned long omap_vc_get_bypass_data(struct voltagedomain *voltdm);
int omap_vc_pre_scale(struct voltagedomain *voltdm,
unsigned long target_volt,
u8 *target_vsel, u8 *current_vsel);
--
1.7.9.5
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[PATCH 2/5] ARM: omap: introduce .get_voltage callback
From: Mike Turquette mturque...@linaro.org
Introduces a new callback to struct voltagedomain for retrieving the
voltage of the voltage domain from the hardware. This will be used to
populate voltdm-nominal_volt during initialization of the voltage code
instead of waiting for the first call to voltdm_scale.
In the event of an error or the inability to determine voltage the
callback must return zero. It is the callers responsibility to
gracefully degrade when presented with a voltage of zero.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/voltage.h |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 0ac2caf..0ded54f 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -85,6 +85,7 @@ struct voltagedomain {
u32 rate;
} sys_clk;
+ unsigned long (*get_voltage) (struct voltagedomain *voltdm);
int (*scale) (struct voltagedomain *voltdm,
unsigned long target_volt);
--
1.7.9.5
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[PATCH 5/5] ARM: omap: initialize voltdm-nominal_volt
From: Mike Turquette mturque...@linaro.org
Populate the .get_voltage callbacks for VC VP. Use these callbacks to
populate voltdm-nominal_volt during boot sequence.
This is useful for the Adaptive Body-Bias sequence coming in a
subsequent series. Without this patch voltdm-nominal will not be
populated until after the first call to voltdm_scale. This is too late
to be useful to the pre-scale sequence in the ABB series since that
sequence needs to know the voltage prior to the first transition.
Note that the .get_voltage callback will return zero for the corner case
wherein the bootloader has not scaling the voltage. In this case it is
safe to assume that we are running at the PMIC's default power-on
voltage. DT data providing the default voltage for each PMIC is needed
in this case.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/voltage.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4dc60e8..f45716c 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -244,9 +244,11 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
switch (voltscale_method) {
case VOLTSCALE_VPFORCEUPDATE:
voltdm-scale = omap_vp_forceupdate_scale;
+ voltdm-get_voltage = omap_vp_get_init_voltage;
return;
case VOLTSCALE_VCBYPASS:
voltdm-scale = omap_vc_bypass_scale;
+ voltdm-get_voltage = omap_vc_get_bypass_data;
return;
default:
pr_warning(%s: Trying to change the method of voltage scaling
@@ -288,13 +290,24 @@ int __init omap_voltage_late_init(void)
if (voltdm-vc) {
voltdm-scale = omap_vc_bypass_scale;
+ voltdm-get_voltage = omap_vc_get_bypass_data;
omap_vc_init_channel(voltdm);
}
if (voltdm-vp) {
voltdm-scale = omap_vp_forceupdate_scale;
+ voltdm-get_voltage = omap_vp_get_init_voltage;
omap_vp_init(voltdm);
}
+
+ /*
+* XXX If voltdm-nominal_volt is zero after calling
+* voltdm-get_voltage then we are likely running this
+* voltage domain at the default boot voltage of the
+* PMIC. In such a case it would be best to load this
+* value from DT.
+*/
+ voltdm-nominal_volt = voltdm-get_voltage(voltdm);
}
return 0;
--
1.7.9.5
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[PATCH 1/5] ARM: omap: vc: replace data_shift with data_mask
From: Mike Turquette mturque...@linaro.org
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/vc.c |2 +-
arch/arm/mach-omap2/vc.h |2 +-
arch/arm/mach-omap2/vc3xxx_data.c |2 +-
arch/arm/mach-omap2/vc44xx_data.c |2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 84da34f..2bcac64 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -171,7 +171,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
vc_valid = vc-common-valid;
vc_bypass_val_reg = vc-common-bypass_val_reg;
- vc_bypass_value = (target_vsel vc-common-data_shift) |
+ vc_bypass_value = (target_vsel __ffs(vc-common-data_mask)) |
(vc-volt_reg_addr vc-common-regaddr_shift) |
(vc-i2c_slave_addr vc-common-slaveaddr_shift);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 478bf6b..84a61b1 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -43,8 +43,8 @@ struct voltagedomain;
struct omap_vc_common {
u32 cmd_on_mask;
u32 valid;
+ u32 data_mask;
u8 bypass_val_reg;
- u8 data_shift;
u8 slaveaddr_shift;
u8 regaddr_shift;
u8 cmd_on_shift;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c
b/arch/arm/mach-omap2/vc3xxx_data.c
index 5d8eaf3..2b35e82 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -31,7 +31,7 @@
*/
static struct omap_vc_common omap3_vc_common = {
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
- .data_shift = OMAP3430_DATA_SHIFT,
+ .data_mask = OMAP3430_DATA_MASK,
.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
.regaddr_shift = OMAP3430_REGADDR_SHIFT,
.valid = OMAP3430_VALID_MASK,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c
b/arch/arm/mach-omap2/vc44xx_data.c
index d70b930..598edc9 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -32,7 +32,7 @@
*/
static const struct omap_vc_common omap4_vc_common = {
.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
- .data_shift = OMAP4430_DATA_SHIFT,
+ .data_mask = OMAP4430_DATA_MASK,
.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT,
.regaddr_shift = OMAP4430_REGADDR_SHIFT,
.valid = OMAP4430_VALID_MASK,
--
1.7.9.5
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[RFC][PATCH 0/5] Introduce .get_voltage callback into voltdm
From: Mike Turquette mturque...@linaro.org This series creates a new callback for struct voltagedomain, .get_voltage. This fetches the voltage from hardware, if possible, and returns it to the caller. We use this call to populate voltdm-nominal_volt at boot time. The need for this came out of the Adaptive Body-Bias patches. There is a corner case where voltdm-nominal_volt is zero at boot, but the ABB pre-scale function needs to know the current voltage as a part of its logic. Without this series voltdm-nominal_volt will be zero until after voltdm-scale completes, which is too late for the ABB pre-scale logic. It is possible to have ABB without this series. In the event that voltdm-nominal_volt is zero then the ABB pre-scale function can simply return early. However this opens up a condition that burns power needlessly: 1) The bootloader enables Forward Body-Bias mode on the ABB ldo and runs the voltage domain at a high OPP 2) Linux boots and the first transition of that voltage domain is to a lower OPP. 3) The voltage of that vdd is unknown so the ABB pre-scale function returns early and FBB is left enabled at an OPP that would otherwise not need it. This scenario is not validated and is best avoided. This series is one step towards that. Mike Turquette (5): ARM: omap: vc: replace data_shift with data_mask ARM: omap: introduce .get_voltage callback ARM: omap: vc: .get_voltage callback ARM: omap: vp: .get_voltage callback ARM: omap: initialize voltdm-nominal_volt arch/arm/mach-omap2/vc.c | 23 ++- arch/arm/mach-omap2/vc.h |3 ++- arch/arm/mach-omap2/vc3xxx_data.c |2 +- arch/arm/mach-omap2/vc44xx_data.c |2 +- arch/arm/mach-omap2/voltage.c | 13 + arch/arm/mach-omap2/voltage.h |1 + arch/arm/mach-omap2/vp.c | 22 ++ arch/arm/mach-omap2/vp.h |1 + 8 files changed, 63 insertions(+), 4 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/5] ARM: omap: vp: .get_voltage callback
From: Mike Turquette mturque...@linaro.org
Implement the voltdm-get_voltage callback for the voltage processor
driver. This reads the INITVOLTAGE field corresponding to each VP and
returns the voltage, after converting it from vsel format.
If INITVOLTAGE is zero (the reset value) then the caller must interpret
this as the PMIC running at the default power-on voltage. In such a
case DT data for the PMIC is necessary to know the voltage.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/vp.c | 22 ++
arch/arm/mach-omap2/vp.h |1 +
2 files changed, 23 insertions(+)
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f95c1ba..63dc03e 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -9,6 +9,28 @@
#include prm-regbits-44xx.h
#include prm44xx.h
+unsigned long omap_vp_get_init_voltage(struct voltagedomain *voltdm)
+{
+ struct omap_vp_instance *vp = voltdm-vp;
+ u32 vpconfig;
+ u8 vsel;
+ unsigned long volt;
+
+ /* sanity */
+ if (!voltdm-pmic || !voltdm-pmic-vsel_to_uv
+ || !voltdm-read || !voltdm-write)
+ return 0;
+
+ vpconfig = voltdm-read(vp-vpconfig);
+ vpconfig = vp-common-vpconfig_initvoltage_mask;
+
+ vsel = vpconfig __ffs(vp-common-vpconfig_initvoltage_mask);
+
+ volt = voltdm-pmic-vsel_to_uv(vsel);
+
+ return volt;
+}
+
static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
struct omap_vp_instance *vp = voltdm-vp;
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 7c155d2..0747a78 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -120,6 +120,7 @@ extern struct omap_vp_instance omap4_vp_core;
void omap_vp_init(struct voltagedomain *voltdm);
void omap_vp_enable(struct voltagedomain *voltdm);
void omap_vp_disable(struct voltagedomain *voltdm);
+unsigned long omap_vp_get_init_voltage(struct voltagedomain *voltdm);
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt);
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
--
1.7.9.5
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[RFC][PATCH v4? 0/7] Adaptive Body-Bias for OMAP
From: Mike Turquette mturque...@linaro.org Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. They have three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs This series adds the ABB code and per-voltage domain data for OMAP3630 and OMAP4430. Newer OMAP4 chips and OMAP5 will need this data populated once those platforms have OPP and voltage tables. The voltage domain scaling sequence is modified use these new functions. This series build on top my previous series, Introduce .get_voltage callback into voltdm[1]. While not strictly necessary that series does take some steps to eliminate one combination of ABB and VP/VC modes that is out-of-spec. [1] http://marc.info/?l=linux-omapm=134931341818379w=2 Mike Turquette (7): ARM: omap: add 3630 PRM register definitions ARM: omap: add ABB PRM_IRQSTATUS handlers ARM: omap: Adaptive Body-Bias structures data ARM: omap: opp: add ABB data to voltage tables ARM: omap: voltage: per-voltage domain ABB data ARM: omap: abb: init transition functions ARM: omap: voltage: add ABB to voltage scaling arch/arm/mach-omap2/Makefile |8 +- arch/arm/mach-omap2/abb.c | 322 + arch/arm/mach-omap2/abb.h | 94 arch/arm/mach-omap2/abb36xx_data.c| 39 +++ arch/arm/mach-omap2/abb44xx_data.c| 45 arch/arm/mach-omap2/omap_opp_data.h |5 +- arch/arm/mach-omap2/opp3xxx_data.c| 37 +-- arch/arm/mach-omap2/opp4xxx_data.c| 25 +- arch/arm/mach-omap2/prm-regbits-34xx.h| 34 +++ arch/arm/mach-omap2/prm2xxx_3xxx.c| 36 +++ arch/arm/mach-omap2/prm2xxx_3xxx.h|8 + arch/arm/mach-omap2/prm44xx.c | 44 arch/arm/mach-omap2/prm44xx.h |4 + arch/arm/mach-omap2/voltage.c | 28 ++- arch/arm/mach-omap2/voltage.h |1 + arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 + arch/arm/mach-omap2/voltagedomains44xx_data.c |3 + arch/arm/plat-omap/include/plat/voltage.h |1 + 18 files changed, 699 insertions(+), 37 deletions(-) create mode 100644 arch/arm/mach-omap2/abb.c create mode 100644 arch/arm/mach-omap2/abb.h create mode 100644 arch/arm/mach-omap2/abb36xx_data.c create mode 100644 arch/arm/mach-omap2/abb44xx_data.c -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/7] ARM: omap: add ABB PRM_IRQSTATUS handlers
Some PRM_IRQSTATUS registers contain a bit to signal that an ABB LDO
transition has completed. These tranxdone bits exist for every instance
of an ABB LDO; thus these tranxdone bits are supported on 36xx variants
for the MPU voltage domain, and on 44xx variants for the MPU and IVA
voltage domains.
This patch introduces some data structures and helper functions for
checking on and clearing the TRANXDONE bits. They are a copy-paste of
existing VP functions of similar nature and will be used in forthcoming
patches that control the ABB programming sequence during a DVFS
transition.
Some previous discussion on the design of the ABB PRM handlers can be
found here:
http://article.gmane.org/gmane.linux.ports.arm.omap/63609
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/prm2xxx_3xxx.c | 36 +
arch/arm/mach-omap2/prm2xxx_3xxx.h |4
arch/arm/mach-omap2/prm44xx.c | 44
arch/arm/mach-omap2/prm44xx.h |4
4 files changed, 88 insertions(+)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index a0309de..8d3c63f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -364,3 +364,39 @@ static int __init omap3xxx_prcm_init(void)
return ret;
}
subsys_initcall(omap3xxx_prcm_init);
+
+/* PRM ABB */
+
+/*
+ * struct omap36xx_abb - OMAP3 ABB register access description
+ * @tranxdone_status: ABB_xxx_DONE_ST bitmask in PRM_IRQSTATUS reg
+ */
+struct omap36xx_abb {
+ u32 tranxdone_status;
+};
+
+static struct omap36xx_abb omap36xx_abb[] = {
+ [OMAP3_VP_VDD_MPU_ID] = {
+ .tranxdone_status = OMAP3630_ABB_LDO_TRANXDONE_ST_MASK,
+ },
+};
+
+#define MAX_ABB_ID ARRAY_SIZE(omap36xx_abb);
+
+u32 omap3_prm_abb_check_txdone(u8 abb_id)
+{
+ struct omap36xx_abb *abb = omap36xx_abb[abb_id];
+ u32 irqstatus;
+
+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
+ OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+ return irqstatus abb-tranxdone_status;
+}
+
+void omap3_prm_abb_clear_txdone(u8 abb_id)
+{
+ struct omap36xx_abb *abb = omap36xx_abb[abb_id];
+
+ omap2_prm_write_mod_reg(abb-tranxdone_status,
+ OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h
b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index c9eea9a..c24c039 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -249,6 +249,10 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8
rst_shift, u8 st_shift);
u32 omap3_prm_vp_check_txdone(u8 vp_id);
void omap3_prm_vp_clear_txdone(u8 vp_id);
+/* OMAP36xx-specific ABB functions */
+u32 omap3_prm_abb_check_txdone(u8 vp_id);
+void omap3_prm_abb_clear_txdone(u8 vp_id);
+
/*
* OMAP3 access functions for voltage controller (VC) and
* voltage proccessor (VP) in the PRM.
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index bb727c2..9b820d4 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -301,3 +301,47 @@ static int __init omap4xxx_prcm_init(void)
return 0;
}
subsys_initcall(omap4xxx_prcm_init);
+
+/* PRM ABB */
+
+/*
+ * struct omap4_vp - OMAP4 VP register access description.
+ * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap4_abb {
+ u32 irqstatus_mpu;
+ u32 tranxdone_status;
+};
+
+static struct omap4_abb omap4_abb[] = {
+ [OMAP4_VP_VDD_MPU_ID] = {
+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
+ .tranxdone_status = OMAP4430_ABB_MPU_DONE_ST_MASK,
+ },
+ [OMAP4_VP_VDD_IVA_ID] = {
+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
+ .tranxdone_status = OMAP4430_ABB_IVA_DONE_ST_MASK,
+ },
+};
+
+u32 omap4_prm_abb_check_txdone(u8 abb_id)
+{
+ struct omap4_abb *abb = omap4_abb[abb_id];
+ u32 irqstatus;
+
+ irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+ OMAP4430_PRM_OCP_SOCKET_INST,
+ abb-irqstatus_mpu);
+ return irqstatus abb-tranxdone_status;
+}
+
+void omap4_prm_abb_clear_txdone(u8 abb_id)
+{
+ struct omap4_abb *abb = omap4_abb[abb_id];
+
+ omap4_prminst_write_inst_reg(abb-tranxdone_status,
+OMAP4430_PRM_PARTITION,
+OMAP4430_PRM_OCP_SOCKET_INST,
+abb-irqstatus_mpu);
+};
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index ee72ae6..6a0a00c 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -755,6 +755,10 @@ extern
[PATCH 1/7] ARM: omap: add 3630 PRM register definitions
OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts related to voltage control that are not present on OMAP34XX. This patch adds the offsets, register addresses, bitfield shifts and masks to support this feature. Signed-off-by: Mike Turquette mturque...@ti.com Signed-off-by: Mike Turquette mturque...@linaro.org --- arch/arm/mach-omap2/prm-regbits-34xx.h | 34 arch/arm/mach-omap2/prm2xxx_3xxx.h |4 2 files changed, 38 insertions(+) diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index 64c087a..0309ff6 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -216,6 +216,12 @@ /* PRM_SYSCONFIG specific bits */ /* PRM_IRQSTATUS_MPU specific bits */ +#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT28 +#define OMAP3630_VC_BYPASS_ACK_ST_MASK (1 28) +#define OMAP3630_VC_VP1_ACK_ST_SHIFT 27 +#define OMAP3630_VC_VP1_ACK_ST_MASK(1 27) +#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT26 +#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK (1 26) #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25 #define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK(1 25) #define OMAP3430_VC_TIMEOUTERR_ST_MASK (1 24) @@ -248,6 +254,12 @@ #define OMAP3430_FS_USB_WKUP_ST_MASK (1 1) /* PRM_IRQENABLE_MPU specific bits */ +#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT28 +#define OMAP3630_VC_BYPASS_ACK_EN_MASK (1 28) +#define OMAP3630_VC_VP1_ACK_EN_SHIFT 27 +#define OMAP3630_VC_VP1_ACK_EN_MASK(1 27) +#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT26 +#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK (1 26) #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25 #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK (1 25) #define OMAP3430_VC_TIMEOUTERR_EN_MASK (1 24) @@ -587,6 +599,28 @@ /* PRM_VP2_STATUS specific bits */ +/* PRM_LDO_ABB_SETUP specific bits */ +#define OMAP3630_SR2_IN_TRANSITION_SHIFT 6 +#define OMAP3630_SR2_IN_TRANSITION_MASK(1 6) +#define OMAP3630_SR2_STATUS_SHIFT 3 +#define OMAP3630_SR2_STATUS_MASK (3 3) +#define OMAP3630_OPP_CHANGE_SHIFT 2 +#define OMAP3630_OPP_CHANGE_MASK (1 2) +#define OMAP3630_OPP_SEL_SHIFT 0 +#define OMAP3630_OPP_SEL_MASK (3 0) + +/* PRM_LDO_ABB_CTRL specific bits */ +#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8 +#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff 8) +#define OMAP3630_SLEEP_RBB_SEL_SHIFT 3 +#define OMAP3630_SLEEP_RBB_SEL_MASK(1 3) +#define OMAP3630_ACTIVE_FBB_SEL_SHIFT 2 +#define OMAP3630_ACTIVE_FBB_SEL_MASK (1 2) +#define OMAP3630_ACTIVE_RBB_SEL_SHIFT 1 +#define OMAP3630_ACTIVE_RBB_SEL_MASK (1 1) +#define OMAP3630_SR2EN_SHIFT 0 +#define OMAP3630_SR2EN_MASK(1 0) + /* RM_RSTST_NEON specific bits */ /* PM_WKDEP_NEON specific bits */ diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index c19d249..c9eea9a 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h @@ -167,6 +167,10 @@ #define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) #define OMAP3_PRM_VP2_STATUS_OFFSET0x00e4 #define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) +#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0x00f0 +#define OMAP3630_PRM_LDO_ABB_SETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0) +#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0x00f4 +#define OMAP3630_PRM_LDO_ABB_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4) #define OMAP3_PRM_CLKSEL_OFFSET0x0040 #define OMAP3430_PRM_CLKSELOMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/7] ARM: omap: opp: add ABB data to voltage tables
The operating mode of the Adaptive Body-Bias ldo is a function of the
voltage at which the VDD is operating and silicon characteristics.
NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage.
FAST_OPP causes the ldo to operate in Forward Body-Bias mode. SLOW_OPP
puts the ldo in Reverse Body-Bias mode.
This patch models this relationship by adding an opp_sel paramter to
struct omap_volt_data and populates this data in the 3630 and 4430
voltage tables.
Not all voltage domains have an ABB ldo and 3430 doesn't have one at
all. In such cases voltages are marked with OMAP_ABB_NO_LDO.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/omap_opp_data.h |5 ++--
arch/arm/mach-omap2/opp3xxx_data.c| 37 +++--
arch/arm/mach-omap2/opp4xxx_data.c| 25 +--
arch/arm/plat-omap/include/plat/voltage.h |1 +
4 files changed, 36 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_opp_data.h
b/arch/arm/mach-omap2/omap_opp_data.h
index c784c12..1facc52 100644
--- a/arch/arm/mach-omap2/omap_opp_data.h
+++ b/arch/arm/mach-omap2/omap_opp_data.h
@@ -71,12 +71,13 @@ struct omap_opp_def {
* Initialization wrapper used to define SmartReflex process data
* XXX Is this needed? Just use C99 initializers in data files?
*/
-#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \
+#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain,
_opp_sel) \
{ \
.volt_nominal = _v_nom, \
.sr_efuse_offs = _efuse_offs, \
.sr_errminlimit = _errminlimit,\
- .vp_errgain = _errgain \
+ .vp_errgain = _errgain,\
+ .opp_sel= _opp_sel,\
}
/* Use this to initialize the default table */
diff --git a/arch/arm/mach-omap2/opp3xxx_data.c
b/arch/arm/mach-omap2/opp3xxx_data.c
index d95f3f9..12fc2da 100644
--- a/arch/arm/mach-omap2/opp3xxx_data.c
+++ b/arch/arm/mach-omap2/opp3xxx_data.c
@@ -24,6 +24,7 @@
#include control.h
#include omap_opp_data.h
#include pm.h
+#include abb.h
/* 34xx */
@@ -36,12 +37,12 @@
#define OMAP3430_VDD_MPU_OPP5_UV 135
struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV,
OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV,
OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV,
OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV,
OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
- VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV,
OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
- VOLT_DATA_DEFINE(0, 0, 0, 0),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV,
OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV,
OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV,
OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV,
OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV,
OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
};
/* VDD2 */
@@ -51,10 +52,10 @@ struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
#define OMAP3430_VDD_CORE_OPP3_UV 115
struct omap_volt_data omap34xx_vddcore_volt_data[] = {
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV,
OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV,
OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
- VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV,
OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
- VOLT_DATA_DEFINE(0, 0, 0, 0),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV,
OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV,
OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV,
OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO),
+ VOLT_DATA_DEFINE(0, 0, 0, 0, 0),
};
/* 36xx */
@@ -67,11 +68,11 @@ struct omap_volt_data omap34xx_vddcore_volt_data[] = {
#define OMAP3630_VDD_MPU_OPP1G_UV 1375000
struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
- VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV,
OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
-
[PATCH 3/7] ARM: omap: Adaptive Body-Bias structures data
Starting with OMAP36XX, some voltage domains have an ldo for biasing
voltage to the transistors within that domain.
This ldo has three modes of operation. The first is Forward Body-Bias
mode (FBB) which boosts performance of transistors at high OPPs by
providng a positive voltage bias. This comes at a cost of power.
The second mode is Reverse Body-Bias or RBB. This mode provides a
negative voltage bias which saves on static leakage at lower OPPs.
Finally ABB can also be bypassed (the default state) in which case it
will just follow the voltage of the VP/VC.
This patch introduces the data structures needed to represent the ABB
ldo's in the voltage layer, and populates the appropriate data for 3630
and OMAP4.
Not all voltage domains have an ABB ldo; on OMAP36XX the CORE voltage
domain does not have an ABB ldo, and there are none on OMAP34xx. In
such cases the voltage data will be marked with OMAP_ABB_NO_LDO.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/Makefile |6 ++-
arch/arm/mach-omap2/abb.h | 85
arch/arm/mach-omap2/abb36xx_data.c | 39 +
arch/arm/mach-omap2/abb44xx_data.c | 45 +++
4 files changed, 173 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-omap2/abb.h
create mode 100644 arch/arm/mach-omap2/abb36xx_data.c
create mode 100644 arch/arm/mach-omap2/abb44xx_data.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 34c2c7f..57e053e 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -95,11 +95,13 @@ endif
# PRCM
omap-prcm-4-5-common = prcm.o cminst44xx.o cm44xx.o \
prcm_mpu44xx.o prminst44xx.o \
- vc44xx_data.o vp44xx_data.o
+ vc44xx_data.o vp44xx_data.o \
+ abb44xx_data.o
obj-y += prm_common.o
obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o
-obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o \
+ abb36xx_data.o
obj-$(CONFIG_SOC_AM33XX) += prcm.o prm33xx.o cm33xx.o
obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) prm44xx.o
obj-$(CONFIG_SOC_OMAP5)+= $(omap-prcm-4-5-common)
diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h
new file mode 100644
index 000..2acc187
--- /dev/null
+++ b/arch/arm/mach-omap2/abb.h
@@ -0,0 +1,85 @@
+/*
+ * OMAP Adaptive Body-Bias structure and macro definitions
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette mturque...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H
+#define __ARCH_ARM_MACH_OMAP2_ABB_H
+
+#include linux/kernel.h
+
+#include voltage.h
+
+/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */
+#define OMAP_ABB_NOMINAL_OPP 0
+#define OMAP_ABB_FAST_OPP 1
+#define OMAP_ABB_NO_LDO(~0)
+
+/* Time for the ABB ldo to settle after transition (in micro-seconds) */
+#define ABB_TRANXDONE_TIMEOUT 50
+
+/*
+ * struct omap_abb_ops - per-OMAP operations needed for ABB transition
+ *
+ * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS
+ * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS
+ */
+struct omap_abb_ops {
+ u32 (*check_tranxdone)(u8 irq_id);
+ void (*clear_tranxdone)(u8 irq_id);
+};
+
+/*
+ * struct omap_abb_common - ABB data common to an OMAP family
+ *
+ * @opp_sel_mask: CTRL reg uses this to program next state of ldo
+ * @opp_change_mask: CTRL reg uses this to initiate ldo state change
+ * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time
+ * @sr2en_mask: SETUP reg uses this to enable/disable ldo
+ * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB operation
+ * @settling_time: number of micro-seconds it takes for ldo to transition
+ * @clock_cycles: settling_time is counted in multiples of clock cycles
+ * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits
+ */
+struct omap_abb_common {
+ u32 opp_sel_mask;
+ u32 opp_change_mask;
+ u32 sr2_wtcnt_value_mask;
+ u32 sr2en_mask;
+ u32 active_fbb_sel_mask;
+ unsigned long settling_time;
+ unsigned long clock_cycles;
+ const struct omap_abb_ops *ops;
+};
+
+/*
+ * struct omap_abb_instance - data for each instance of ABB ldo
+ *
[PATCH 5/7] ARM: omap: voltage: per-voltage domain ABB data
This patch adds struct omap_abb_instance to struct voltagedomain and
populates the data for those voltage domains that have an ABB ldo on
both 36xx and 44xx silicon.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/voltage.h |1 +
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +++
3 files changed, 6 insertions(+)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 0ded54f..546b3d7 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -73,6 +73,7 @@ struct voltagedomain {
struct omap_vc_channel *vc;
const struct omap_vfsm_instance *vfsm;
struct omap_vp_instance *vp;
+ struct omap_abb_instance *abb;
struct omap_voltdm_pmic *pmic;
/* VC/VP register access functions: SoC specific */
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index d0103c8..f6c8a59 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -26,6 +26,7 @@
#include voltage.h
#include vc.h
#include vp.h
+#include abb.h
/*
* VDD data
@@ -112,6 +113,7 @@ void __init omap3xxx_voltagedomains_init(void)
if (cpu_is_omap3630()) {
omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data;
omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data;
+ omap3_voltdm_mpu.abb = omap36xx_abb_mpu;
} else {
omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data;
omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data;
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index c3115f6..da4c70b 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -31,6 +31,7 @@
#include omap_opp_data.h
#include vc.h
#include vp.h
+#include abb.h
static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = {
.voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET,
@@ -53,6 +54,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
.vc = omap4_vc_mpu,
.vfsm = omap4_vdd_mpu_vfsm,
.vp = omap4_vp_mpu,
+ .abb = omap4_abb_mpu,
};
static struct voltagedomain omap4_voltdm_iva = {
@@ -64,6 +66,7 @@ static struct voltagedomain omap4_voltdm_iva = {
.vc = omap4_vc_iva,
.vfsm = omap4_vdd_iva_vfsm,
.vp = omap4_vp_iva,
+ .abb = omap4_abb_iva,
};
static struct voltagedomain omap4_voltdm_core = {
--
1.7.9.5
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[PATCH 7/7] ARM: omap: voltage: add ABB to voltage scaling
Adaptive Body-Bias ldo state should be transitioned (if necessary)
during any voltage scaling operation.
This patch initializes ABB LDO's as a part of the greater voltage domain
initialization sequence and adds the ABB transition callbacks to the
primary voltage domain scaling function, voltdm_scale().
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/voltage.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index f45716c..9cac9fe 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -41,6 +41,7 @@
#include vc.h
#include vp.h
+#include abb.h
static LIST_HEAD(voltdm_list);
@@ -101,10 +102,30 @@ int voltdm_scale(struct voltagedomain *voltdm,
return -EINVAL;
}
+ ret = omap_abb_pre_scale(voltdm, volt);
+ if (ret) {
+ pr_err(%s: abb prescale failed for vdd%s: %d\n,
+ __func__, voltdm-name, ret);
+ goto out;
+ }
+
ret = voltdm-scale(voltdm, volt);
- if (!ret)
- voltdm-nominal_volt = volt;
+ if (ret) {
+ pr_err(%s: vdd_%s failed to scale: %d\n,
+ __func__, voltdm-name, ret);
+ goto out;
+ }
+
+ voltdm-nominal_volt = volt;
+ ret = omap_abb_post_scale(voltdm, volt);
+ if (ret) {
+ pr_err(%s: abb postscale failed for vdd%s: %d\n,
+ __func__, voltdm-name, ret);
+ goto out;
+ }
+
+out:
return ret;
}
@@ -300,6 +321,9 @@ int __init omap_voltage_late_init(void)
omap_vp_init(voltdm);
}
+ if (voltdm-abb)
+ omap_abb_init(voltdm);
+
/*
* XXX If voltdm-nominal_volt is zero after calling
* voltdm-get_voltage then we are likely running this
--
1.7.9.5
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[PATCH 6/7] ARM: omap: abb: init transition functions
The Adaptive Body-Bias ldo can be set to bypass, Forward Body-Bias or
Reverse Body-Bias during a voltage transition. The ABB programming
sequence depends on whether voltage is scaling up or down.
This patch implements the Adaptive Body-Bias ldo initialization routine
and the transition sequence which is needed after any voltage scaling
operation.
Note that this sequence will need to be revisited someday when the
various SmartReflex AVS features, fixes and improvements are upstreamed
and enabled for OMAP2+ kernels.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/abb.c| 322 ++
arch/arm/mach-omap2/abb.h|9 ++
3 files changed, 332 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-omap2/abb.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 57e053e..a262aaa 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -107,7 +107,7 @@ obj-$(CONFIG_ARCH_OMAP4)+=
$(omap-prcm-4-5-common) prm44xx.o
obj-$(CONFIG_SOC_OMAP5)+= $(omap-prcm-4-5-common)
# OMAP voltage domains
-voltagedomain-common := voltage.o vc.o vp.o
+voltagedomain-common := voltage.o vc.o vp.o abb.o
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common)
obj-$(CONFIG_ARCH_OMAP2) += voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common)
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
new file mode 100644
index 000..e8a3ae0
--- /dev/null
+++ b/arch/arm/mach-omap2/abb.c
@@ -0,0 +1,322 @@
+/*
+ * OMAP Adaptive Body-Bias core
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette mturque...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/init.h
+#include linux/delay.h
+
+#include abb.h
+#include voltage.h
+
+/**
+ * omap_abb_set_opp - program ABB ldo based on new voltage
+ *
+ * @voltdm - voltage domain that just finished scaling voltage
+ * @opp_sel - target ABB ldo operating mode
+ *
+ * Program the ABB ldo to the new state (if necessary), clearing the
+ * PRM_IRQSTATUS bit before and after the transition. Returns 0 on
+ * success, -ETIMEDOUT otherwise.
+ */
+int omap_abb_set_opp(struct voltagedomain *voltdm, u8 opp_sel)
+{
+ struct omap_abb_instance *abb = voltdm-abb;
+ int ret, timeout;
+
+ /* bail early if no transition is necessary */
+ if (opp_sel == abb-_opp_sel)
+ return 0;
+
+ /* clear interrupt status */
+ timeout = 0;
+ while (timeout++ ABB_TRANXDONE_TIMEOUT) {
+ abb-common-ops-clear_tranxdone(abb-prm_irq_id);
+
+ ret = abb-common-ops-check_tranxdone(abb-prm_irq_id);
+ if (!ret)
+ break;
+
+ udelay(1);
+ }
+
+ if (timeout = ABB_TRANXDONE_TIMEOUT) {
+ pr_warn(%s: vdd_%s ABB TRANXDONE timeout\n,
+ __func__, voltdm-name);
+ return -ETIMEDOUT;
+ }
+
+ /* program the setup register */
+ switch (opp_sel) {
+ case OMAP_ABB_NOMINAL_OPP:
+ voltdm-rmw(abb-common-active_fbb_sel_mask,
+ 0x0,
+ abb-setup_offs);
+ break;
+ case OMAP_ABB_FAST_OPP:
+ voltdm-rmw(abb-common-active_fbb_sel_mask,
+ abb-common-active_fbb_sel_mask,
+ abb-setup_offs);
+ break;
+ }
+
+ /* program next state of ABB ldo */
+ voltdm-rmw(abb-common-opp_sel_mask,
+ opp_sel __ffs(abb-common-opp_sel_mask),
+ abb-ctrl_offs);
+
+ /* initiate ABB ldo change */
+ voltdm-rmw(abb-common-opp_change_mask,
+ abb-common-opp_change_mask,
+ abb-ctrl_offs);
+
+ /* clear interrupt status */
+ timeout = 0;
+ while (timeout++ ABB_TRANXDONE_TIMEOUT) {
+ abb-common-ops-clear_tranxdone(abb-prm_irq_id);
+
+ ret = abb-common-ops-check_tranxdone(abb-prm_irq_id);
+ if (!ret)
+ break;
+
+ udelay(1);
+ }
+
+ if (timeout = ABB_TRANXDONE_TIMEOUT) {
+ pr_warn(%s: vdd_%s ABB TRANXDONE timeout\n,
+ __func__, voltdm-name);
+ return -ETIMEDOUT;
+ }
+
+ /* track internal state */
+ abb-_opp_sel = opp_sel;
+
+ return 0;
+}
+
+/**
+ * omap_abb_pre_scale - ABB transition pre-voltage scale, if needed
+ *
+ * @voltdm - voltage domain that
Re: [PATCH 0/6] OMAPDSS: remove cpu_is_* calls
On Friday, September 28, 2012 7:35 PM Tomi Valkeinen wrote Hi, This series adds an omapdss_version enum that is passed via platform data to omapdss driver. This version identifier is then used instead of cpu_is_*() calls. Hi Tomi, As you mentioned, cpu_is_*() is not preferable in driver. Actually, I thought so, when I saw the OMAPDSS driver a few months ago. Anyway, it looks good. :) Best regards, Jingoo Han After these, omapdss no longer contains any plat/ or mach/ includes. omapfb, vrfb and vram still do, though. Tomi Tomi Valkeinen (6): OMAPDSS: add omapdss_version OMAPDSS: use omapdss_version in dss_features.c OMAPDSS: DISPC: use omapdss_version OMAPDSS: DSS: use omapdss_version OMAPDSS: HDMI: use omapdss_version OMAPDSS: remove plat/cpu.h includes arch/arm/mach-omap2/display.c | 38 +++ drivers/video/omap2/dss/core.c |2 +- drivers/video/omap2/dss/dispc.c| 41 +--- drivers/video/omap2/dss/dss.c | 39 +-- drivers/video/omap2/dss/dss_features.c | 64 ++-- drivers/video/omap2/dss/dss_features.h |5 ++- drivers/video/omap2/dss/hdmi.c |3 +- include/video/omapdss.h| 14 +++ 8 files changed, 157 insertions(+), 49 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-fbdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 6/7] ARM: omap: abb: init transition functions
On Wed, Oct 3, 2012 at 6:26 PM, Mike Turquette mturque...@ti.com wrote:
The Adaptive Body-Bias ldo can be set to bypass, Forward Body-Bias or
Reverse Body-Bias during a voltage transition. The ABB programming
sequence depends on whether voltage is scaling up or down.
This patch implements the Adaptive Body-Bias ldo initialization routine
and the transition sequence which is needed after any voltage scaling
operation.
Note that this sequence will need to be revisited someday when the
various SmartReflex AVS features, fixes and improvements are upstreamed
and enabled for OMAP2+ kernels.
Signed-off-by: Mike Turquette mturque...@ti.com
Signed-off-by: Mike Turquette mturque...@linaro.org
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/abb.c| 322
++
arch/arm/mach-omap2/abb.h|9 ++
3 files changed, 332 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-omap2/abb.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 57e053e..a262aaa 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -107,7 +107,7 @@ obj-$(CONFIG_ARCH_OMAP4)+=
$(omap-prcm-4-5-common) prm44xx.o
obj-$(CONFIG_SOC_OMAP5)+= $(omap-prcm-4-5-common)
# OMAP voltage domains
-voltagedomain-common := voltage.o vc.o vp.o
+voltagedomain-common := voltage.o vc.o vp.o abb.o
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common)
obj-$(CONFIG_ARCH_OMAP2) += voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common)
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
new file mode 100644
index 000..e8a3ae0
--- /dev/null
+++ b/arch/arm/mach-omap2/abb.c
@@ -0,0 +1,322 @@
+/*
+ * OMAP Adaptive Body-Bias core
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc.
+ * Mike Turquette mturque...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/init.h
+#include linux/delay.h
+
+#include abb.h
+#include voltage.h
+
+/**
+ * omap_abb_set_opp - program ABB ldo based on new voltage
+ *
+ * @voltdm - voltage domain that just finished scaling voltage
+ * @opp_sel - target ABB ldo operating mode
+ *
+ * Program the ABB ldo to the new state (if necessary), clearing the
+ * PRM_IRQSTATUS bit before and after the transition. Returns 0 on
+ * success, -ETIMEDOUT otherwise.
+ */
+int omap_abb_set_opp(struct voltagedomain *voltdm, u8 opp_sel)
+{
+ struct omap_abb_instance *abb = voltdm-abb;
+ int ret, timeout;
+
+ /* bail early if no transition is necessary */
+ if (opp_sel == abb-_opp_sel)
+ return 0;
+
+ /* clear interrupt status */
+ timeout = 0;
+ while (timeout++ ABB_TRANXDONE_TIMEOUT) {
+ abb-common-ops-clear_tranxdone(abb-prm_irq_id);
+
+ ret = abb-common-ops-check_tranxdone(abb-prm_irq_id);
+ if (!ret)
+ break;
+
+ udelay(1);
+ }
+
+ if (timeout = ABB_TRANXDONE_TIMEOUT) {
+ pr_warn(%s: vdd_%s ABB TRANXDONE timeout\n,
+ __func__, voltdm-name);
+ return -ETIMEDOUT;
+ }
+
+ /* program the setup register */
+ switch (opp_sel) {
+ case OMAP_ABB_NOMINAL_OPP:
+ voltdm-rmw(abb-common-active_fbb_sel_mask,
+ 0x0,
+ abb-setup_offs);
+ break;
+ case OMAP_ABB_FAST_OPP:
+ voltdm-rmw(abb-common-active_fbb_sel_mask,
+ abb-common-active_fbb_sel_mask,
+ abb-setup_offs);
+ break;
+ }
+
+ /* program next state of ABB ldo */
+ voltdm-rmw(abb-common-opp_sel_mask,
+ opp_sel __ffs(abb-common-opp_sel_mask),
+ abb-ctrl_offs);
+
+ /* initiate ABB ldo change */
+ voltdm-rmw(abb-common-opp_change_mask,
+ abb-common-opp_change_mask,
+ abb-ctrl_offs);
+
+ /* clear interrupt status */
+ timeout = 0;
+ while (timeout++ ABB_TRANXDONE_TIMEOUT) {
+ abb-common-ops-clear_tranxdone(abb-prm_irq_id);
+
+ ret = abb-common-ops-check_tranxdone(abb-prm_irq_id);
+ if (!ret)
+ break;
+
+ udelay(1);
+ }
+
+ if (timeout = ABB_TRANXDONE_TIMEOUT) {
+ pr_warn(%s: vdd_%s ABB TRANXDONE timeout\n,
+ __func__, voltdm-name);
+ return -ETIMEDOUT;
+ }
Re: [PATCH 1/1] usb: Include generic_interrupt for OMAP2_PLUS
On Wed, Oct 3, 2012 at 7:15 PM, Philippe De Swert
philippe.desw...@jollamobile.com wrote:
So any comments on the approach here (see patch kept below)? Or should I
immediately send it as a new patch to get the comments? I sent it in this
thread as it also solves the issue I have.
Patch is fine for me. Not sure if Felipe has some comments.
BTW: CONFIG_SOC_OMAP3430 could be easily removed as it only changes minor
things in the musb stack. It would clean up the code and get rid of this very
misleading option as it has nothing to do with any OMAP3430 soc specific
handling.
It would be better if some OMAP3430 users can comment on this.
From deae78e1084749f340ae8b8aaeca51818d5bfc55 Mon Sep 17 00:00:00 2001
From: Philippe De Swert philippe.desw...@jollamobile.com
Date: Wed, 26 Sep 2012 17:00:46 +0300
Subject: [PATCH 1/1] musb: Move generic_interrupt out of the way
Have all musb drivers define their own isr.
Signed-off-by: Philippe De Swert philippe.desw...@jollamobile.com
---
drivers/usb/musb/musb_core.c | 33 ++---
drivers/usb/musb/omap2430.c | 22 ++
drivers/usb/musb/ux500.c | 21 +
3 files changed, 45 insertions(+), 31 deletions(-)
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 26f1bef..1d5ee34 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1496,35 +1496,6 @@ static int __devinit musb_core_init(u16 musb_type,
struct musb *musb)
return 0;
}
-/*-*/
-
-#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \
- defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500)
-
-static irqreturn_t generic_interrupt(int irq, void *__hci)
-{
- unsigned long flags;
- irqreturn_t retval = IRQ_NONE;
- struct musb *musb = __hci;
-
- spin_lock_irqsave(musb-lock, flags);
-
- musb-int_usb = musb_readb(musb-mregs, MUSB_INTRUSB);
- musb-int_tx = musb_readw(musb-mregs, MUSB_INTRTX);
- musb-int_rx = musb_readw(musb-mregs, MUSB_INTRRX);
-
- if (musb-int_usb || musb-int_tx || musb-int_rx)
- retval = musb_interrupt(musb);
-
- spin_unlock_irqrestore(musb-lock, flags);
-
- return retval;
-}
-
-#else
-#define generic_interruptNULL
-#endif
-
/*
* handle all the irqs defined by the HDRC core. for now we expect: other
* irq sources (phy, dma, etc) will be handled first, musb-int_* values
@@ -1907,7 +1878,8 @@ musb_init_controller(struct device *dev, int nIrq,
void __iomem *ctrl)
musb-ops = plat-platform_ops;
/* The musb_platform_init() call:
- * - adjusts musb-mregs and musb-isr if needed,
+ * - adjusts musb-mregs if needed
+ * - sets the musb-isr
* - may initialize an integrated tranceiver
* - initializes musb-xceiv, usually by otg_get_phy()
* - stops powering VBUS
@@ -1917,7 +1889,6 @@ musb_init_controller(struct device *dev, int nIrq,
void __iomem *ctrl)
* external/discrete ones in various flavors (twl4030 family,
* isp1504, non-OTG, etc) mostly hooking up through ULPI.
*/
- musb-isr = generic_interrupt;
status = musb_platform_init(musb);
if (status 0)
goto fail1;
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 5fdb9da..5461619d 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -306,6 +306,26 @@ static void omap_musb_mailbox_work(struct work_struct
*mailbox_work)
omap_musb_set_mailbox(glue);
}
+static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
+{
+unsigned long flags;
+irqreturn_t retval = IRQ_NONE;
+struct musb *musb = __hci;
+
+spin_lock_irqsave(musb-lock, flags);
+
+musb-int_usb = musb_readb(musb-mregs, MUSB_INTRUSB);
+musb-int_tx = musb_readw(musb-mregs, MUSB_INTRTX);
+musb-int_rx = musb_readw(musb-mregs, MUSB_INTRRX);
+
+if (musb-int_usb || musb-int_tx || musb-int_rx)
+retval = musb_interrupt(musb);
+
+spin_unlock_irqrestore(musb-lock, flags);
+
+return retval;
+}
+
static int omap2430_musb_init(struct musb *musb)
{
u32 l;
@@ -325,6 +345,8 @@ static int omap2430_musb_init(struct musb *musb)
return -ENODEV;
}
+ musb-isr = omap2430_musb_interrupt;
+
status = pm_runtime_get_sync(dev);
if (status 0) {
dev_err(dev, pm_runtime_get_sync FAILED %d\n, status);
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c
index a8c0fad..ec9aaec 100644
--- a/drivers/usb/musb/ux500.c
+++ b/drivers/usb/musb/ux500.c
@@ -36,6 +36,26 @@ struct ux500_glue {
};
#define glue_to_musb(g) platform_get_drvdata(g-musb)
+static irqreturn_t
