On Wednesday 31 July 2013 12:13 AM, Nishanth Menon wrote:
On 07/30/2013 01:37 PM, Sricharan R wrote:
Hi,
On Tuesday 30 July 2013 09:02 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 08:06:31PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On
Hi,
On Wed, Jul 31, 2013 at 11:14:32AM +0530, Kishon Vijay Abraham I wrote:
IMHO we need a lookup method for PHYs, just like for clocks,
regulators, PWMs or even i2c busses because there are complex cases
when passing just a name using platform data will not work. I would
second what
* Nishanth Menon n...@ti.com [130730 13:26]:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-3xxx.c now contains the clock init functionality for omap3, including
DT clock registration and adding of static clkdev entries.
This patch also splits the OMAP3 clock registration code under
* Rajendra Nayak rna...@ti.com [130730 23:09]:
Tony, what do you suggest we do for this series? Since we have just an es1.0
and one board
at this point for dra7xx, things would be fine even if we do a dt based
parsing to identify
the device, and I am fine with it if thats what we feel is
On Wednesday 31 July 2013 12:12 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [130730 23:09]:
Tony, what do you suggest we do for this series? Since we have just an es1.0
and one board
at this point for dra7xx, things would be fine even if we do a dt based
parsing to identify
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
You can also use Linus's kernel with the above clk data branch.( OMAP5 uEVM
boots)
Please let me know if you need more info.
And the ethernet driver is not available by default?
Cheers,
Baozi--
To unsubscribe from this
Hi,
On Wed, Jul 31, 2013 at 11:17:52AM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
new file mode 100644
index 000..3d10b69
--- /dev/null
+++ b/drivers/spi/spi-ti-qspi.c
@@ -0,0 +1,545 @@
snip
+/* Device Control */
+#define
* Paul Walmsley p...@pwsan.com [130721 22:02]:
Hi Tony,
Sorry for the delay on this - wanted to make sure it passed the local
testbed before sending it upstream.
The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
Hi Chen,
On Wednesday 31 July 2013 01:19 PM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
You can also use Linus's kernel with the above clk data branch.( OMAP5 uEVM
boots)
Please let me know if you need more info.
And the ethernet driver is
On 07/31/2013 01:44 AM, Linus Walleij wrote:
On Tue, Jul 30, 2013 at 6:30 AM, Grant Likely grant.lik...@linaro.org wrote:
On Mon, Jul 29, 2013 at 6:36 AM, Linus Walleij linus.wall...@linaro.org
wrote:
To solve this dilemma, perform an interrupt consistency check
when adding a GPIO chip: if
On 07/30/2013 06:04 PM, Nishanth Menon wrote:
On 07/23/2013 02:19 AM, Tero Kristo wrote:
clk_get_sys / clk_get can now find clocks from device-tree. If a DT clock
is found, an entry is added to the clk_lookup list also for subsequent
searches.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc:
On 07/30/2013 06:21 PM, Nishanth Menon wrote:
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Parses OMAP clock data from DT and registers those clocks with the clock
framework. dt_omap_clk_init must be called early during boot for timer
initialization so it is exported and called from the existing
HI,
On Wednesday 31 July 2013 01:19 PM, Felipe Balbi wrote:
Hi,
On Wed, Jul 31, 2013 at 11:17:52AM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
new file mode 100644
index 000..3d10b69
--- /dev/null
+++ b/drivers/spi/spi-ti-qspi.c
@@ -0,0
On Wednesday 31 July 2013 10:19 AM, Joel Fernandes wrote:
Hi Sekhar,
On 07/30/2013 02:05 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using Scatter gather lists of any size with
EDMA as discussed at [1] instead of placing limitations
Hi,
On Wed, Jul 31, 2013 at 02:40:51PM +0530, Sourav Poddar wrote:
+#defineQSPI_FRAME_MAX 0xfff
Frame max is 4096, 0x1000, right ?
Yes,
this macro was used initially to fill the register bits, where 4095 =
4096 words.
Will change it to now.
you can make this something
On Wednesday 31 July 2013 10:35 AM, Joel Fernandes wrote:
On 07/30/2013 03:29 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
We certainly don't want error conditions to be cleared anywhere
'anywhere' is a really loaded term.
as this will make us 'forget' about
On Wednesday 31 July 2013 02:50 PM, Felipe Balbi wrote:
Hi,
On Wed, Jul 31, 2013 at 02:40:51PM +0530, Sourav Poddar wrote:
+#defineQSPI_FRAME_MAX 0xfff
Frame max is 4096, 0x1000, right ?
Yes,
this macro was used initially to fill the register bits, where 4095 =
4096
On 07/30/2013 07:23 PM, Nishanth Menon wrote:
This patch probably was submitted in the wrong sequence - fails build
and few other issues below.
Yeah, I'll double check the build sequence for these.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
The OMAP clock driver now supports DPLL clock
Hi,
On Wed, Jul 31, 2013 at 03:10:40PM +0530, Sourav Poddar wrote:
words can be of any length (1, 2 or 4) bytes. So, I think it should be
decremented by 1 only.
this is wrong.
hmm..got the point.
I will pass the count address also to ti_qspi_read_data/write_data and make
use of the switch
On Mon, Jul 29, 2013 at 01:40:28PM -0700, Dmitry Torokhov wrote:
On Monday, July 29, 2013 11:36:05 PM Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 12:59:23PM -0700, Dmitry Torokhov wrote:
@@ -439,12 +444,50 @@ static const struct of_device_id
omap_keypad_dt_match[] = {
On Wednesday 31 July 2013 03:18 PM, Felipe Balbi wrote:
Hi,
On Wed, Jul 31, 2013 at 03:10:40PM +0530, Sourav Poddar wrote:
words can be of any length (1, 2 or 4) bytes. So, I think it should be
decremented by 1 only.
this is wrong.
hmm..got the point.
I will pass the count address also to
On 07/30/2013 09:22 PM, Nishanth Menon wrote:
this patch should be 3/33 to allow dpll.c to build.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Some of the clock.h contents are needed by the new OMAP clock driver,
including dpll_data and clk_hw_omap. Thus, move these to the generic
omap header
On 07/30/2013 09:40 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
Some devices require their clocks to be available with a specific
dev-id con-id mapping. With DT, the clocks can be found by default
only with their name, or alternatively through the device node of
the
On 07/30/2013 09:56 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node properties and adds autoidle support
if
Hi Luciano,
On Tuesday 30 July 2013 23:21:08 Luciano Coelho wrote:
Add device tree bindings documentation for the TI WiLink modules.
Currently only the WLAN part of the WiLink6, WiLink7 and WiLink8
modules is supported.
Signed-off-by: Luciano Coelho coe...@ti.com
Reviewed-by: Laurent
On 07/31/2013 11:31 AM, Lokesh Vutla wrote:
Hi Chen,
On Wednesday 31 July 2013 01:19 PM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
You can also use Linus's kernel with the above clk data branch.( OMAP5 uEVM
boots)
Please let me know if you
The new IP version has a minor changes and the offsets are same as the previous
version, so instead of adding CPSW version number in the driver, make the driver
to fall through to the latest versions so that the new version of CPSW which has
the same register offsets will work directly without
Hi Chen,
On 07/31/2013 02:31 PM, Roger Quadros wrote:
On 07/31/2013 11:31 AM, Lokesh Vutla wrote:
Hi Chen,
On Wednesday 31 July 2013 01:19 PM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
You can also use Linus's kernel with the above clk data
Hi Roger,
On Jul 31, 2013, at 8:16 PM, Roger Quadros rog...@ti.com wrote:
Hi Chen,
On 07/31/2013 02:31 PM, Roger Quadros wrote:
On 07/31/2013 11:31 AM, Lokesh Vutla wrote:
Hi Chen,
On Wednesday 31 July 2013 01:19 PM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla
On Wednesday 31 July 2013 02:45 AM, Luciano Coelho wrote:
Add regulator, pin muxing and MMC5 configuration to be used by the
on-board WiLink6 module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 31 ++-
1 file
On 07/30/2013 10:17 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This node adds support for a clock node which allows control to the
clockdomain enable / disable.
Dont we have clkdm_enable/disable for the same? should we model
clockdomain as a clock node?
There was
On 07/30/2013 10:27 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
On Wed, Jul 31, 2013 at 05:42:26PM +0530, Mugunthan V N wrote:
The new IP version has a minor changes and the offsets are same as the
previous
version, so instead of adding CPSW version number in the driver, make the
driver
to fall through to the latest versions so that the new version of
On 07/30/2013 10:33 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-44xx.c now contains the clock init functionality for omap4, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
On 07/30/2013 10:42 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c
b/arch/arm/mach-omap2/cclock44xx_data.c
deleted file mode 100644
index 88e37a4..000
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ /dev/null
[...]
On 07/30/2013 10:18 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
AM335x has DPLL clocks that should never be attempted to be gated. Adding
ti,dpll-no-gate property for them handles this situation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/dpll.c
On 07/30/2013 10:49 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
AM33xx series SoCs do not have autoidle support, and for these the
autoidle register is marked as NULL. Check against a NULL pointer and
do not attempt to of_iomap in this case, as this just creates a bogus
On 07/30/2013 11:00 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-33xx.c now contains the clock init functionality for am33xx,
including
DT clock registration and adding of static clkdev entries.
This patch also moves the omap2_clk_enable_init_clocks declaration to
On 07/30/2013 11:08 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 has slightly different DPLLs from those compared to OMAP4. Modified
code for the same.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/dpll.c | 96
On 07/30/2013 11:13 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 gate clocks are handled through the clk driver now. Basic gate
clock can't be used as the OMAP3 gate clocks have some special features,
namely the idle status linkage which is on separate register.
On 07/30/2013 11:23 PM, Nishanth Menon wrote:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP3 has interface clocks in addition to functional clocks, which
is it just OMAP3?
Yea, only omap3 is using this code. Basically because there is control
for the module specific interface clocks which
On 07/31/2013 09:35 AM, Tony Lindgren wrote:
* Nishanth Menon n...@ti.com [130730 13:26]:
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-3xxx.c now contains the clock init functionality for omap3, including
DT clock registration and adding of static clkdev entries.
This patch also splits the
* Grant Likely | 2013-07-24 15:19:58 [+0100]:
Was there more breakage than imx6 and amba devices? Your first version
had a fallback case for powerpc. Couldn't we do just allow that for more
than just powerpc? I'd much rather see some work-around within the core
DT code with a warning to
On Wed, Jul 31, 2013 at 04:49:59PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 05:42:26PM +0530, Mugunthan V N wrote:
The new IP version has a minor changes and the offsets are same as the
previous
version, so instead of adding CPSW version number in the driver, make the
On 07/29/2013 04:33 AM, Benjamin Herrenschmidt wrote:
On Mon, 2013-07-22 at 00:44 +0100, Grant Likely wrote:
BTW, it looks like Grant has attempted this already:
Yup, things broke badly. Unfortunately the of_platform_device and
platform_device history doesn't treat resources in the same way.
On Wed, Jul 31, 2013 at 06:28:27PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at 04:49:59PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 05:42:26PM +0530, Mugunthan V N wrote:
The new IP version has a minor changes and the offsets are same as the
previous
version, so
On 07/31/2013 12:46 AM, Tony Lindgren wrote:
* Stephen Warren swar...@wwwdotorg.org [130730 16:08]:
On 07/30/2013 04:52 PM, Russell King - ARM Linux wrote:
On Tue, Jul 30, 2013 at 04:49:18PM -0600, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
DEBUG_UNCOMPRESS was previously
On Tue, Jul 30, 2013 at 10:47 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Test details:
-
Tested this on dra7 board.
Test1: Ran mtd_stesstest for 4 iterations.
- All iterations went through without failure.
Test2: Use mtd utilities:
- flash_erase to erase the flash
Hi,
On Wed, Jul 31, 2013 at 06:38:46PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 06:28:27PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at 04:49:59PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 05:42:26PM +0530, Mugunthan V N wrote:
The new IP version has a
On Wed, Jul 31, 2013 at 09:45:25PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at 06:38:46PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 06:28:27PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at 04:49:59PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 05:42:26PM
Hi,
On Wed, Jul 31, 2013 at 09:22:29PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 09:45:25PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at 06:38:46PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 06:28:27PM +0300, Felipe Balbi wrote:
On Wed, Jul 31, 2013 at
Hi,
On Wed, Jul 31, 2013 at 10:43:32PM +0300, Felipe Balbi wrote:
The new IP version has a minor changes and the offsets are same
as the previous
version, so instead of adding CPSW version number in the driver,
make the driver
to fall through to the latest
On Wed, Jul 31, 2013 at 10:45:23PM +0300, Felipe Balbi wrote:
one more thing, why do you consider a new revision to be an error ?
Okay, so why don't you go and remove the version checking code
altogether?
Thanks,
Richard
--
To unsubscribe from this list: send the line unsubscribe linux-omap
Hi,
On Wed, Jul 31, 2013 at 10:04:28PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 10:45:23PM +0300, Felipe Balbi wrote:
one more thing, why do you consider a new revision to be an error ?
Okay, so why don't you go and remove the version checking code
altogether?
if you need
On Wed, Jul 31, 2013 at 11:07:56PM +0300, Felipe Balbi wrote:
what I'm saying is that we can give new IP revision a chance to work if
they have no programming model differences (except for, perhaps, new
features and different erratas).
But it also has a chance to fail when there are
Hi,
On Wed, Jul 31, 2013 at 10:20:07PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 11:07:56PM +0300, Felipe Balbi wrote:
what I'm saying is that we can give new IP revision a chance to work if
they have no programming model differences (except for, perhaps, new
features and
On Wed, Jul 31, 2013 at 11:26:17PM +0300, Felipe Balbi wrote:
oh well, we can go on and on with this. Unfortunately we (SW team) don't
have control over the HW folks. We strongly suggest that they don't
break SW compatibility, and that's starting to become true.
You can very well expect
On Wed, Jul 31, 2013 at 10:34:06PM +0200, Richard Cochran wrote:
On Wed, Jul 31, 2013 at 11:26:17PM +0300, Felipe Balbi wrote:
oh well, we can go on and on with this. Unfortunately we (SW team) don't
have control over the HW folks. We strongly suggest that they don't
break SW
From: Mugunthan V N mugunthan...@ti.com
Date: Wed, 31 Jul 2013 17:42:26 +0530
The new IP version has a minor changes and the offsets are same as the
previous
version, so instead of adding CPSW version number in the driver, make the
driver
to fall through to the latest versions so that the
On Fri, Jul 26, 2013 at 12:29:13PM +0530, Lokesh Vutla wrote:
This patch series adds support for SHA348 and SHA512 in addition to MD5,
SHA1, SHA224 SHA256 that the omap sha module supports. Also adding the pdata
for OMAP5 and AM43xx Soc's.
And using devm_* calls to make cleanup paths simpler.
On 07/31/2013 04:35 AM, Sekhar Nori wrote:
On Wednesday 31 July 2013 10:35 AM, Joel Fernandes wrote:
On 07/30/2013 03:29 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
We certainly don't want error conditions to be cleared anywhere
'anywhere' is a really loaded
On 07/31/2013 04:18 AM, Sekhar Nori wrote:
On Wednesday 31 July 2013 10:19 AM, Joel Fernandes wrote:
Hi Sekhar,
On 07/30/2013 02:05 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using Scatter gather lists of any size with
EDMA as
We found a problem when we removed a working sd card that the irqaction
of omap_hsmmc can sleep to 3.6s. This cause our watchdog to work.
In func omap_hsmmc_reset_controller_fsm, it should watch a 0-1
transition.It used loops_per_jiffy as the timer.
The code is:
while
On 07/31/2013 09:27 PM, Joel Fernandes wrote:
On 07/31/2013 04:18 AM, Sekhar Nori wrote:
On Wednesday 31 July 2013 10:19 AM, Joel Fernandes wrote:
Hi Sekhar,
On 07/30/2013 02:05 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using
On Thursday 01 August 2013 12:09 AM, Trent Piepho wrote:
On Tue, Jul 30, 2013 at 10:47 PM, Sourav Poddarsourav.pod...@ti.com wrote:
Test details:
-
Tested this on dra7 board.
Test1: Ran mtd_stesstest for 4 iterations.
- All iterations went through without failure.
Test2:
On 07/31/2013 09:27 PM, Joel Fernandes wrote:
On 07/31/2013 04:18 AM, Sekhar Nori wrote:
On Wednesday 31 July 2013 10:19 AM, Joel Fernandes wrote:
Hi Sekhar,
On 07/30/2013 02:05 AM, Sekhar Nori wrote:
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using
On Thu, Aug 01, 2013 at 12:11:00AM +0300, Felipe Balbi wrote:
that's the point, there is no known V3. Once it has, surely we will add
such macros, but until then, we let the driver assume the highest known
revision if it finds a register with an unknown revision.
I am confused. The patch
On Wed, Jul 31, 2013 at 10:43:32PM +0300, Felipe Balbi wrote:
right, now go check on the archives what Linus (and many others, for
that matter) have said about version checking. If it's not the version
you expect, you assume the latest.
If you are talking about his essay about user space
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