The DMM/Tiler block can used by omapdrm to allocate frame buffers. With the
removal of address and irq data from the omap4 hwmods, the probe of DMM driver
fails and omapdrm isn't able to utilize the DMM hardware.
Add DMM bindings for omap4 and omap5.
Changes in v3:
- Fix mistakes in
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.
Add documentation for the DMM bindings.
Originally worked on by Andy Gross andy...@gmail.com
Cc: Andy Gross andy...@gmail.com
Signed-off-by: Archit Taneja arc...@ti.com
---
Enable use of DT for DMM/Tiler.
Originally worked on by Andy Gross andy...@gmail.com
Cc: Andy Gross andy...@gmail.com
Cc: DRI Development dri-de...@lists.freedesktop.org
Signed-off-by: Archit Taneja arc...@ti.com
---
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 11 +++
1 file changed, 11
On 10/09/2013 09:59 PM, Paul Walmsley wrote:
Eh, one correction:
On Wed, 9 Oct 2013, Paul Walmsley wrote:
We could easily wind up with kernels that won't boot at all when used
with newer DT data.
This is a misstatement of the issue: the concern here is that newer
kernels may not boot at all
From: R Sricharan r.sricha...@ti.com
The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote the frequency of the counter.
Currently the frequency value is passed from the
DT file, but
The arm arch timers frequency are now programmed in the CNTFREQ
per-cpu register by the timer code using the secure API [1].
So remove the redundant entry from the dts.
[1] http://marc.info/?l=linux-omapm=138139106312786w=2
Cc: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Sricharan R
On Mon, Oct 07, 2013 at 01:41:59PM +0300, Taras Kondratiuk wrote:
Initially commit cb527ede1bf6ff2008a025606f25344b8ed7b4ac
i2c-omap: Double clear of ARDY status in IRQ handler
added a workaround for undocumented errata ProDB0017052.
But then commit 1d7afc95946487945cc7f5019b41255b72224b70
Hey Paul,
My dibs on this below.
On 10/09/2013 09:55 PM, Paul Walmsley wrote:
On Mon, 7 Oct 2013, Tony Lindgren wrote:
And assuming Paul is OK with these patches in general.
Actually, I have several concerns with this series, as you and I
discussed. Some of us have been talking them over
Hi,
On 10/10/13 00:08, Marek Belisko wrote:
For communicating with driver is used gpio bitbanging because TD028 does
not have a standard compliant SPI interface. It is a 3-wire thing with
direction reversal.
Isn't that SPI_3WIRE?
Communication with display is used only during panel
On 10/09/2013 06:15 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [131009 00:19]:
Hi Tony,
On 10/08/2013 01:06 PM, Roger Quadros wrote:
This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
The proper clock reference is provided in device tree so we
no longer need this.
Hi Samuel,
Could you please pick this one for 3.13 if OK? Thanks.
cheers,
-roger
On 10/08/2013 01:06 PM, Roger Quadros wrote:
This should fix the following warning at boot on OMAP5 uEVM
[8.783155] WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:883
__clk_enable+0x94/0xa4()
CC: Samuel
Hi Tomi,
Am 10.10.2013 um 10:19 schrieb Tomi Valkeinen:
Hi,
On 10/10/13 00:08, Marek Belisko wrote:
For communicating with driver is used gpio bitbanging because TD028 does
not have a standard compliant SPI interface. It is a 3-wire thing with
direction reversal.
Isn't that SPI_3WIRE?
On Thu, Oct 10, 2013 at 07:36:33AM +0100, Archit Taneja wrote:
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.
Add documentation for the DMM bindings.
Originally worked on by Andy Gross andy...@gmail.com
Cc: Andy
On Thursday 12 September 2013 03:57 PM, Vivek Gautam wrote:
On Thu, Sep 12, 2013 at 3:40 PM, Kishon Vijay Abraham I kis...@ti.com wrote:
On Thursday 12 September 2013 02:57 PM, Vivek Gautam wrote:
Hi Kishon,
On Mon, Sep 2, 2013 at 9:13 PM, Kishon Vijay Abraham I kis...@ti.com
wrote:
Hi,
On Thursday 10 October 2013 03:38 PM, Mark Rutland wrote:
On Thu, Oct 10, 2013 at 07:36:33AM +0100, Archit Taneja wrote:
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.
Add documentation for the DMM bindings.
smps10 should be enabled only in the case of host mode. So stop
doing always_on, boot_on from smps10_out1. The driver will enable it in host
mode.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts |2 --
1 file changed, 2 deletions(-)
diff --git
From: George Cherian george.cher...@ti.com
Added dr_mode property in dwc3 and set its default mode to device.
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |1 +
1 file changed, 1 insertion(+)
diff
On 10/10/13 12:34, Dr. H. Nikolaus Schaller wrote:
Hi Tomi,
Am 10.10.2013 um 10:19 schrieb Tomi Valkeinen:
Hi,
On 10/10/13 00:08, Marek Belisko wrote:
For communicating with driver is used gpio bitbanging because TD028 does
not have a standard compliant SPI interface. It is a 3-wire
Hi Tomi,
Am 10.10.2013 um 13:10 schrieb Tomi Valkeinen:
On 10/10/13 12:34, Dr. H. Nikolaus Schaller wrote:
Hi Tomi,
Am 10.10.2013 um 10:19 schrieb Tomi Valkeinen:
Hi,
On 10/10/13 00:08, Marek Belisko wrote:
For communicating with driver is used gpio bitbanging because TD028 does
not
On 10/10/13 14:52, Dr. H. Nikolaus Schaller wrote:
Yes, I agree and I am willing to help if someone comes up with such a SoC.
At the moment we have connected it to the OMAP3 only.
True, but even without that kind of SoC, SPI bitbanging should be
handled by an SPI driver, not by the drivers
On 10/10/2013 02:13 PM, Tomi Valkeinen wrote:
On 10/10/13 14:52, Dr. H. Nikolaus Schaller wrote:
Yes, I agree and I am willing to help if someone comes up with such a SoC.
At the moment we have connected it to the OMAP3 only.
True, but even without that kind of SoC, SPI bitbanging should
On Thursday 10 October 2013 03:43 AM, Sricharan R wrote:
From: R Sricharan r.sricha...@ti.com
The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote the frequency of the counter.
On Thursday 10 October 2013 03:50 AM, Sricharan R wrote:
The arm arch timers frequency are now programmed in the CNTFREQ
per-cpu register by the timer code using the secure API [1].
So remove the redundant entry from the dts.
[1] http://marc.info/?l=linux-omapm=138139106312786w=2
Cc:
Hi Tony,
On 10/03/2013 08:42 AM, Tony Lindgren wrote:
The pin control registers can have interrupts for example
for device wake-up. These interrupts can be treated as a
chained interrupt controller as suggested earlier by
Linus Walleij linus.wall...@linaro.org.
This patch adds support for
On 00:32-20131010, Joel Fernandes wrote:
On 10/09/2013 06:24 PM, Nishanth Menon wrote:
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson bcous...@baylibre.com
Cc
Hi Joel.
On Thu, Oct 10, 2013 at 1:32 AM, Joel Fernandes jo...@ti.com wrote:
On 10/09/2013 06:24 PM, Nishanth Menon wrote:
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Am 10.10.2013 um 14:26 schrieb Lars-Peter Clausen:
On 10/10/2013 02:13 PM, Tomi Valkeinen wrote:
On 10/10/13 14:52, Dr. H. Nikolaus Schaller wrote:
Yes, I agree and I am willing to help if someone comes up with such a SoC.
At the moment we have connected it to the OMAP3 only.
True, but
On Thu, Oct 10, 2013 at 3:24 PM, Roger Quadros rog...@ti.com wrote:
I think pcs_irq_set_wake() is where need to control system wakeup behaviour
for the irq.
This is where we should be able to change WAKEUP_EN bit of the pad
to enable/disable system wakeup for that pad and also call
On Thursday 26 September 2013 08:24 PM, Ulf Hansson wrote:
Suspend and resume of cards are being handled from the protocol layer
and consequently the mmc_suspend|resume_host APIs are deprecated.
This means we can simplify the suspend|resume callbacks by removing the
use of the deprecated APIs.
On Wed, Oct 09, 2013 at 05:43:13AM +, Paul Walmsley wrote:
On Sun, 6 Oct 2013, Sebastian Reichel wrote:
This patch adds Synchronous Serial Interface (SSI) hwmod support for
OMAP34xx SoCs.
Signed-off-by: Sebastian Reichel s...@debian.org
Thanks, queued this one for v3.13. You
On 16:19-20131010, Kishon Vijay Abraham I wrote:
smps10 should be enabled only in the case of host mode. So stop
doing always_on, boot_on from smps10_out1. The driver will enable it in host
mode.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts
On 10/10/2013 05:04 PM, Linus Walleij wrote:
On Thu, Oct 10, 2013 at 3:24 PM, Roger Quadros rog...@ti.com wrote:
I think pcs_irq_set_wake() is where need to control system wakeup behaviour
for the irq.
This is where we should be able to change WAKEUP_EN bit of the pad
to enable/disable
On 10/10/2013 08:32 AM, Nishanth Menon wrote:
On 00:32-20131010, Joel Fernandes wrote:
On 10/09/2013 06:24 PM, Nishanth Menon wrote:
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit
On 10/10/2013 10:20 AM, Joel Fernandes wrote:
On 10/10/2013 08:32 AM, Nishanth Menon wrote:
On 00:32-20131010, Joel Fernandes wrote:
On 10/09/2013 06:24 PM, Nishanth Menon wrote:
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations
On Thu, Oct 10, 2013 at 4:35 PM, Roger Quadros rog...@ti.com wrote:
On 10/10/2013 05:04 PM, Linus Walleij wrote:
As an innocent bystander who has no clue what the _reconfigure_io_chain()
is about can you tell me what this is all about?
The OMAP SoC has a mechanism to monitor and wakeup from
On Mon, Oct 07, 2013 at 01:46:50PM +0300, Roger Quadros wrote:
The generic PHY framewrok expects different properties than the
old USB PHY framework. Supply those properties.
Fixes USB OTG port on beagle after the Generic PHY framework was
merged in greg/usb-next. [1]
[1] -
On Mon, Oct 07, 2013 at 04:28:13PM +0300, Roger Quadros wrote:
The generic PHY framewrok expects different properties than the
old USB PHY framework. Supply those properties.
Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was
merged in greg/usb-next. [1]
[1] -
On Wed, Oct 9, 2013 at 5:10 PM, Tony Lindgren t...@atomide.com wrote:
I was thinking I'll set up an immutable branch for the three
pinctrl patches against -rc4 then both you and I can merge
them in as needed. Does that work for you?
Hm it's fair enough to have them in your tree if they do
not
On 10/10/2013 10:45 AM, Nishanth Menon wrote:
On Thu, Oct 10, 2013 at 10:23 AM, Joel Fernandes jo...@ti.com wrote:
I see a function of that name already exists. I guess you can leave your
patch
as is then and not have to do this.
Can I consider that as an Acked-by :) ?
Yes, sure, for
* Roger Quadros rog...@ti.com [131010 06:32]:
I tried testing this with the USB EHCI driver, but I'm not getting wake up
interrupts
while the system is still running and only the EHCI controller is runtime
suspended.
It seems we need to somehow call _reconfigure_io_chain() to update the
On Thu, Oct 10, 2013 at 10:23 AM, Joel Fernandes jo...@ti.com wrote:
I see a function of that name already exists. I guess you can leave your patch
as is then and not have to do this.
Can I consider that as an Acked-by :) ?
Regards,
Nishanth Menon
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On Thu, Oct 10, 2013 at 6:00 PM, Tony Lindgren t...@atomide.com wrote:
* Roger Quadros rog...@ti.com [131010 06:32]:
I tried testing this with the USB EHCI driver, but I'm not getting wake up
interrupts
while the system is still running and only the EHCI controller is runtime
suspended.
* Linus Walleij linus.wall...@linaro.org [131010 08:40]:
On Thu, Oct 10, 2013 at 4:35 PM, Roger Quadros rog...@ti.com wrote:
On 10/10/2013 05:04 PM, Linus Walleij wrote:
As an innocent bystander who has no clue what the _reconfigure_io_chain()
is about can you tell me what this is all
* Linus Walleij linus.wall...@linaro.org [131010 09:19]:
On Thu, Oct 10, 2013 at 6:00 PM, Tony Lindgren t...@atomide.com wrote:
* Roger Quadros rog...@ti.com [131010 06:32]:
I tried testing this with the USB EHCI driver, but I'm not getting wake up
interrupts
while the system is still
* Tony Lindgren t...@atomide.com [131010 09:09]:
* Roger Quadros rog...@ti.com [131010 06:32]:
I tried testing this with the USB EHCI driver, but I'm not getting wake up
interrupts
while the system is still running and only the EHCI controller is runtime
suspended.
It seems we
* Rajendra Nayak rna...@ti.com [131009 22:33]:
On Tuesday 08 October 2013 11:45 PM, Tony Lindgren wrote:
* Rajendra Nayak rna...@ti.com [131003 23:50]:
On Tuesday 01 October 2013 12:34 PM, Afzal Mohammed wrote:
Hi Paul, Benoit, Tony,
This series adds PRCM support (except clock tree) for
Do not reset GPIO1 at boot-up because GPIO 7 in GPIO1 block is used on
OMAP4460 PandaBoard-ES to select voltage register in TPS62361 which
supplies VDD_MPU.
Without this, OMAP4460 PandaBoard-ES boards fail to boot-up because
MPU voltage switches over to VSET0 voltage value (boot voltage) which
is
* Nishanth Menon n...@ti.com [131010 09:53]:
Do not reset GPIO1 at boot-up because GPIO 7 in GPIO1 block is used on
OMAP4460 PandaBoard-ES to select voltage register in TPS62361 which
supplies VDD_MPU.
Without this, OMAP4460 PandaBoard-ES boards fail to boot-up because
MPU voltage switches
On Tue, Oct 08, 2013 at 01:46:41AM +0100, Mark Brown wrote:
On Mon, Oct 07, 2013 at 10:47:18PM +0100, Mark Rutland wrote:
On Thu, Sep 26, 2013 at 08:18:28PM +0100, Jyri Sarha wrote:
- interrupts : Interrupt number for McASP
The device also seems to be able to generate multiple
* Santosh Shilimkar santosh.shilim...@ti.com [131010 06:20]:
On Thursday 10 October 2013 03:43 AM, Sricharan R wrote:
From: R Sricharan r.sricha...@ti.com
The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ
Hi,
On Tue, Oct 08, 2013 at 10:28:15AM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@debian.org [131006 13:36]:
Here is the third round of the OMAP SSI driver patches.
Thanks for updating these, they look good to me now:
Acked-by: Tony Lindgren t...@atomide.com
Ok. I guess it's
On 10/10/2013 07:59 PM, Mark Rutland wrote:
No, they're not actually of much practical use to us at the minute but
it was generally felt better to include the information and not use it
so that if someone does come up with a use for them then the trees for
deployed systems already have the
* Sebastian Reichel s...@debian.org [131010 10:30]:
Hi,
On Tue, Oct 08, 2013 at 10:28:15AM -0700, Tony Lindgren wrote:
* Sebastian Reichel s...@debian.org [131006 13:36]:
Here is the third round of the OMAP SSI driver patches.
Thanks for updating these, they look good to me now:
Today's linux-next merge of the omap_dss2 tree got conflicts in
drivers/video/omap2/dss/hdmi4_core.[ch] caused by ef26958a (omapdss:
HDMI: Rename hdmi driver files to nicer names) interacting with a range
of commits from Ricardo Neri in the fbdev tree and possibly some other
stuff. git is
Hi,
On Thu, Oct 10, 2013 at 07:21:30PM +0200, Sebastian Reichel wrote:
Any issues with this or any other suggestions how to proceed?
Maybe you could provide some brief instructions/description of how this
was tested?
Thanks,
A.
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On 10/10/2013 03:42 PM, Dr. H. Nikolaus Schaller wrote:
Am 10.10.2013 um 14:26 schrieb Lars-Peter Clausen:
On 10/10/2013 02:13 PM, Tomi Valkeinen wrote:
On 10/10/13 14:52, Dr. H. Nikolaus Schaller wrote:
Yes, I agree and I am willing to help if someone comes up with such a SoC.
At the
On 10/10/2013 11:47 AM, Tony Lindgren wrote:
* Nishanth Menon n...@ti.com [131010 09:53]:
Do not reset GPIO1 at boot-up because GPIO 7 in GPIO1 block is used on
OMAP4460 PandaBoard-ES to select voltage register in TPS62361 which
supplies VDD_MPU.
Without this, OMAP4460 PandaBoard-ES boards
Populate nodes for l2-cache-controller, EDMA, mailbox,
mmc, sham.
And also updating dt properties for epwmss, aes, des.
Few nodes are taken from a different tree that are added by
Suman Anna s-a...@ti.com (Mailbox)
Balaji T K balaj...@ti.com (MMC)
Mugunthan V N mugunthan...@ti.com (Pinmux,
This patch series add nodes for l2-cache-controller, EDMA, mailbox, mmc, sham,
and updates the properties for cpsw, i2c0, matrix-keypad.
These patches are applied on top of Benoit's for_3.13/dts branch
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git
for_3.13/dts
From: Mugunthan V N mugunthan...@ti.com
- Adding pinmux for cpsw, i2c0.
- Enabling the modules that are present in AM4372 EPOS EVM
These modules are tested on AM4372 EPOS EVM.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Signed-off-by:
Hi,
On Fri, Oct 11, 2013 at 12:44:52AM +0530, Lokesh Vutla wrote:
This patch series add nodes for l2-cache-controller, EDMA, mailbox,
mmc, sham, and updates the properties for cpsw, i2c0, matrix-keypad.
These patches are applied on top of Benoit's for_3.13/dts branch
On Thu, Oct 10, 2013 at 09:28:01PM +0300, Aaro Koskinen wrote:
On Thu, Oct 10, 2013 at 07:21:30PM +0200, Sebastian Reichel wrote:
Any issues with this or any other suggestions how to proceed?
Maybe you could provide some brief instructions/description of how this
was tested?
Sure. I used
On Thu, Oct 10, 2013 at 10:02:36PM +0200, Sebastian Reichel wrote:
P.S.: You can get a mainline kernel status matrix for the Nokia
N900 on this page: http://elinux.org/N900
Thanks for summary, and the above page looks very useful. I wonder
would it make sense to add also N9/N950 there
Hi Mark,
On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the
The number of hwspinlocks are determined based on the value read
from the IP block's SYSSTATUS register. However, the module may
not be enabled and clocked, and the read may result in a bus error.
This particular issue is seen rather easily on AM33XX, since the
module wakeup is software
Add the hwspinlock device tree node for OMAP4 family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 45708e1..74db751 100644
---
Add the hwspinlock device tree node for OMAP5 SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 86295d2..2a98a59 100644
---
This patch adds the necessary documentation and OF helpers to
represent a hwlock device and use/request locks in a device-tree
build.
All the platform-specific hwlock driver implementations need the
number of locks and associated base id for registering the locks
present within the device with
Add the hwspinlock device tree node for AM33xx family
of SoCs.
Signed-off-by: Suman Anna s-a...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 8692490..49dfb86 100644
---
Hi,
This is an updated series addressing the review comments from the
v2 series. The hwmod patches have been dropped from the repost
as per Paul's request, they have already been queued.
The series is tested on top of v3.12-rc4 + Benoit's 3.13 DTS branch and
Tero's clock series, along with the
HwSpinlock IP is present only on OMAP4 and other newer SoCs,
which are all device-tree boot only. This patch adds the
base support for parsing the DT nodes, and removes the code
dealing with the traditional platform device instantiation.
Signed-off-by: Suman Anna s-a...@ti.com
---
AM33XX device family also supports hwspinlocks. The IP
is identical to that of OMAP4/OMAP5, except for the
number of locks.
Signed-off-by: Suman Anna s-a...@ti.com
---
drivers/hwspinlock/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/hwspinlock/Kconfig
The hwspinlock_device structure is used for registering a bank of
locks with the driver core. The structure already contains the
necessary members to identify the bank of locks. The core does not
maintain the hwspinlock_devices itself, but maintains only a radix
tree for all the registered locks.
Tony Lindgren t...@atomide.com writes:
Here's a respin of the pinctrl-single related patches to use chained
irq as suggested by Linus W earlier. This series does not try to
provide any generic automated solution yet, but works by doing a
request_irq() for the wake-up pin, so it should be
Hi all,
Now that we have the remaining omap3 PM related wake-up
events mostly resolved, it's time to start making omap3
to be device tree only.
These are the boards that I'm using for testing in my
rack setup, so I've verified that the basic features work
well enough for me so we can make them
Looks like the main difference between the TMDSEVM3530 and
TMDSEVM3730 is just the omap processor:
http://www.ti.com/tool/tmdsevm3530
http://www.ti.com/tool/tmdsevm3730
So let's add a common file for the EVMs, and fix the description
for the omap3-evm.dst as that's clearly for the TMDSEVM3530
We now have pretty decent device tree based support for
zoom platforms. It's not complete, but basics work for
me so adding more features should be quite trivial.
Looks like also 3630 sdp is zoom based, and looking
at it's board file should also be trivial to support
with the device tree based
I've tested the serial, MMC, smsc911x, wl12xx, and off-idle support
with the pinctrl patches, so it probably works better than the
board-*.c files ever did. Also the board-omap3evm.c file is broken
for the DSS, and has been for a while. Patches are welcome to fix
it in this .dts file, let's just
Just initialize things using the bootloader timings like
we've been doing for the legacy booting too. It should be
possible to patch in the GPMC timings for the based on the
TL16CP743C/TL16C754C manual at:
http://www.ti.com/lit/ds/slls644g/slls644g.pdf
Signed-off-by: Tony Lindgren
I've tested serial, MMC, smsc911x and wl12xx on zoom3. As my
omap is an early ES revision, I have not been able to test
off-idle on this one. But anyways, I'd say we have enough
device tree support for the zoom to be able to drop the
board-zoom files. Patches are welcome to add further features
to
As the wl12xx bindings are still pending, this way we can
get things working for omap3 evm and zoom platforms.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/pdata-quirks.c | 12
1 file changed, 12 insertions(+)
diff --git
Looks like at least Igep, Zoom and EVM boards can use a
common file for the GPMC connected smsc911x.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/omap-gpmc-smsc911x.dtsi | 52 +
arch/arm/boot/dts/omap3-igep0020.dts | 45
We now have pretty decent support with the device tree
based booting. Patches to add more features are welcome.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/Kconfig |6
arch/arm/mach-omap2/Makefile |1
arch/arm/mach-omap2/board-omap3evm.c |
On Thu, Oct 10, 2013 at 11:19:14PM +0300, Aaro Koskinen wrote:
On Thu, Oct 10, 2013 at 10:02:36PM +0200, Sebastian Reichel wrote:
P.S.: You can get a mainline kernel status matrix for the Nokia
N900 on this page: http://elinux.org/N900
Thanks for summary,
You're welcome.
and the
* Linus Walleij linus.wall...@linaro.org [131010 08:43]:
On Wed, Oct 9, 2013 at 5:10 PM, Tony Lindgren t...@atomide.com wrote:
I was thinking I'll set up an immutable branch for the three
pinctrl patches against -rc4 then both you and I can merge
them in as needed. Does that work for you?
* Kevin Hilman khil...@linaro.org [131010 14:55]:
Tony Lindgren t...@atomide.com writes:
Here's a respin of the pinctrl-single related patches to use chained
irq as suggested by Linus W earlier. This series does not try to
provide any generic automated solution yet, but works by doing a
Hi all,
As it's currently a bit of a pain to patch omap2plus_defconfig, let's
run make savedefconfig on it as that also gets rid of about 30 lines
from it. And let's add some WLAN modules and support for of_serial.
Regards,
Tony
---
Tony Lindgren (2):
ARM: OMAP2+: Run make savedefconfig
We can save few tens of lines this way, and it is easier
to generate minimal patches against omap2plus_defconfig.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/configs/omap2plus_defconfig | 92 +++---
1 file changed, 30 insertions(+), 62 deletions(-)
Many boards have either WL12XX or MWIFIEX, so let's
build modules for those by default. This also makes it
easier to test WLAN on pandaboard to avoid regressions
like we had with the move to device tree based booting.
And at least the zoom boards need the of_serial for the
UARTs connected to the
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On Thursday 10 October 2013 06:04 PM, Tony Lindgren wrote:
-CONFIG_TI_DAVINCI_MDIO=y
-CONFIG_TI_DAVINCI_CPDMA=y
-CONFIG_TI_CPSW=y
-CONFIG_AT803X_PHY=y
Can you keep the above defines as AM335x EVM, Beagle bone, Beagle bone
black can use ethernet with omap2plus_defconfig
Regards
Mugunthan V N
* Mugunthan V N mugunthan...@ti.com [131010 17:15]:
On Thursday 10 October 2013 06:04 PM, Tony Lindgren wrote:
-CONFIG_TI_DAVINCI_MDIO=y
-CONFIG_TI_DAVINCI_CPDMA=y
-CONFIG_TI_CPSW=y
-CONFIG_AT803X_PHY=y
Can you keep the above defines as AM335x EVM, Beagle bone, Beagle bone
black can use
On 10/10/13 21:58, Lars-Peter Clausen wrote:
According to the datasheet the the panel as a dedicated dout pin. Maybe
you did not connect it in your design, which means you won't be able to
read any data from the panel at all.
I don't see a dedicated dout in the datasheet...
Hi Mark, Jean-Christophe,
On 10/10/13 20:50, Mark Brown wrote:
Today's linux-next merge of the omap_dss2 tree got conflicts in
drivers/video/omap2/dss/hdmi4_core.[ch] caused by ef26958a (omapdss:
HDMI: Rename hdmi driver files to nicer names) interacting with a range
of commits from Ricardo
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