On 06/04/2014 10:45 PM, Yegor Yefremov wrote:
On Wed, Jun 4, 2014 at 12:52 PM, Sekhar Nori nsek...@ti.com wrote:
On Wednesday 04 June 2014 04:00 PM, Yegor Yefremov wrote:
On Wed, Jun 4, 2014 at 12:20 PM, Sekhar Nori nsek...@ti.com wrote:
On Wednesday 04 June 2014 03:11 PM, Yegor Yefremov
On Thu, Jun 5, 2014 at 12:02 PM, Roger Quadros rog...@ti.com wrote:
On 06/04/2014 10:45 PM, Yegor Yefremov wrote:
On Wed, Jun 4, 2014 at 12:52 PM, Sekhar Nori nsek...@ti.com wrote:
On Wednesday 04 June 2014 04:00 PM, Yegor Yefremov wrote:
On Wed, Jun 4, 2014 at 12:20 PM, Sekhar Nori
Hi Roger, Yegor,
From: Quadros, Roger
On 06/04/2014 10:45 PM, Yegor Yefremov wrote:
[...]
The 0x8000 address seems to be the beginning of NAND region:
ranges = 0 0 0x0800 0x1000; /* CS0: NAND */
I've taken this example from am335x_evm.dts. I have tried to change
the mapping
Hi Yegor,
From: Gupta, Pekon
However, I don't suspect XIP boot here because even if CPU is detecting
garbage data while reading from 0x8000 it won't find a valid image
header there, and so XIP boot should have failed, and boot sequence
should fall back to MMC. It shouldn't have hung.
I
On Wed, Jun 04, 2014 at 02:53:25PM -0500, Nishanth Menon wrote:
With commit 064d5cd110f94ce41ca5681dcda8b77fa63d5b95
(regulator: core: Fix the init of DT defined fixed regulators)
We ensure that regulator must be capable of providing it's current
voltage when constraints are used, however
On Wed, Jun 04, 2014 at 02:34:31PM -0500, Nishanth Menon wrote:
Seems to help my OMAP5uevm.
If this makes sense, I will repost it as a formal patch.
Actually I just went ahead and applied this - thanks!
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Full thread in opensuse mailing list:
http://lists.opensuse.org/archive/opensuse-arm/2014-06/msg4.html
Moving this thread out of opensuse to kernel public lists +CC of
maintainers relevant to the control module/clk.
On 06/05/2014 11:17 AM, Nishanth Menon wrote:
On 06/05/2014 10:56 AM,
On 01:30-20140605, Grazvydas Ignotas wrote:
On Wed, Jun 4, 2014 at 4:01 PM, Nishanth Menon n...@ti.com wrote:
On 06/04/2014 05:04 AM, Grazvydas Ignotas wrote:
On Thu, May 29, 2014 at 12:46 AM, Nishanth Menon n...@ti.com wrote:
Attempt to power off in case of critical events such as battery
2014-06-05 20:47 GMT+04:00 Nishanth Menon n...@ti.com:
Full thread in opensuse mailing list:
http://lists.opensuse.org/archive/opensuse-arm/2014-06/msg4.html
Moving this thread out of opensuse to kernel public lists +CC of
maintainers relevant to the control module/clk.
Full build log
Hi Nishanth,
On Thursday 05 June 2014 11:47:19 Nishanth Menon wrote:
Full thread in opensuse mailing list:
http://lists.opensuse.org/archive/opensuse-arm/2014-06/msg4.html
Moving this thread out of opensuse to kernel public lists +CC of
maintainers relevant to the control module/clk.
The MMC host driver should not select the pmic driver, since that
may have other dependencies, notably i2c in this case. It's not
clear what the exact requirement of the driver is, but to preserve
the behavior, this patch changes the 'select' into 'depends on',
meaning you now have to turn on
Hi Chris, Ulf,
These are small fixes from my randconfig testing, almost all for
older bugs, please apply to a tree you see appropriate.
Arnd
Arnd Bergmann (4):
mmc: atmel-mci: incude asm/cacheclush.h
mmc: mvsdio: avoid compiler warning
mmc: omap: don't select TPS65010
mmc:
As per the Final production Data Manual for OMAP5432,
SWPS050F(APRIL 2014)
There are only two OPPs - 1GHz and 1.5GHz. the older OPP_LOW has been
completely descoped. The Nominal voltages are still correct though.
However, expectation for final production configuration is operation
with Adaptive
From: Andrii.Tseglytskyi andrii.tseglyts...@ti.com
Add ABB device nodes for OMAP5 family of devices. Data is based on
final production OMAP543x Technical Reference Manual revision Z (April 2013).
Final production Data Manual for OMAP5432 SWPS050F(APRIL 2014).
[n...@ti.com: co-developer and
Provide OMAP4 interrupt number for PRM
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/omap4.dtsi |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 7e26d22..6d2827f 100644
--- a/arch/arm/boot/dts/omap4.dtsi
use the generic function to pick up the prm_instance for a generic logic
which can be reused from OMAP4+
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/prm44xx.c | 47 +
1 file changed, 38 insertions(+), 9 deletions(-)
diff --git
Hi,
The following series is a minimal set of cleanups and generalization
in the direction of supporting daisychain wakeup on all OMAP4+
platforms. We cannot still add IO_WAKEUP ability for OMAP5/DRA7/AM437x
yet pending further pinctrl patches.
These do have a few cosmetic issues, but hope is to
Allow the PRM interrupt information to be picked up from device tree.
the only exception is for OMAP4 which uses values pre-populated and allows
compatibility with older dtb.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/prm44xx.c | 41
PRM device instance can vary depending on SoC. We already handle the
same during reset of the device, However, this is also needed
for other logic instances. So, first abstract this out to a generic
function.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/prminst44xx.c | 41
Provide OMAP5 interrupt number for PRM
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3bfda16..ccced95 100644
--- a/arch/arm/boot/dts/omap5.dtsi
Provide default DRA7 crossbar mapped interrupt for prm interrupt
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c29945e..38e8097 100644
---
wkup event at bit offset 0 exists only on OMAP3.
OMAP4430/60 PRM_IRQSTATUS_A9, OMAP5/DRA7 PRM_IRQSTATUS_MPU
register bit 0 is DPLL_CORE_RECAL_ST not wakeup event like OMAP3.
The same applies to AM437x as well.
Remove the wrong definition.
Signed-off-by: Nishanth Menon n...@ti.com
---
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