On 07/16/2014 03:29 PM, Peter Ujfalusi wrote:
Hi,
After this series clients can ask to not receive notifications after each
period.
In this case we can disable the completion interrupt since the position
reporting
does not rely on it for cyclic mode.
Patchset for ASoC part has been sent
On 07/08/2014 01:46 PM, Peter Ujfalusi wrote:
Hi,
It is preferred that audio is served with the highest priority queue in order
to
avoid delays in data transfer between memory and audio IP.
The following series will add an API to arch code to assign a channel to a
given
queue.
The
The patch series adds i2c1 and tps65917 and related nodes.
The patch series is boot tested on DRA72-EVM.
Thanks to Lokesh lokeshvu...@ti.com for testing the series.
Keerthy J (2):
ARM: dts: dra72-evm: Enable I2C1 node
ARM: dts: dra72-evm: Add tps65917 PMIC node
From: Keerthy J j-keer...@ti.com
DRA72x-evm uses TPS65917 PMIC. Add the node.
NOTE: LDO2 is actually unused, but the usage if any is expected to be
between 1.8 to 3.3v IO voltage. So define the node.
NOTE: Interrupt used is crossbar number based.
Tested-by: Lokesh Vutla lokeshvu...@ti.com
From: Keerthy J j-keer...@ti.com
I2C1 bus is used for the following peripherals
P8 connector (MLB)
TLV320AIC3106 Audio codec
J15 LCD header
24WC256 eeprom
TMP102AIDRLT temperature sensor
PCF8575 GPIO expander
PCA9306 i2c voltage translator -
On Monday 28 July 2014 11:48 AM, Keerthy wrote:
The patch series adds i2c1 and tps65917 and related nodes.
The patch series is boot tested on DRA72-EVM.
Thanks to Lokesh lokeshvu...@ti.com for testing the series.
For booting, this is dependent on recent hwmod fix patch series posted by me:
On Monday 28 July 2014 11:42 AM, Peter Ujfalusi wrote:
On 07/08/2014 01:46 PM, Peter Ujfalusi wrote:
Hi,
It is preferred that audio is served with the highest priority queue in
order to
avoid delays in data transfer between memory and audio IP.
The following series will add an API to arch
Hi Dmitry,
Gentle ping. Would be nice to get these into 3.17. Thanks :).
cheers,
-roger
On 07/03/2014 12:34 PM, Roger Quadros wrote:
Hi Dmitry,
Gentle reminder to pick this series for -next. Thanks :).
cheers,
-roger
On 06/17/2014 12:31 PM, Roger Quadros wrote:
Hi Dmitry,
These
On Monday 28 July 2014 12:00 PM, Lokesh Vutla wrote:
On Monday 28 July 2014 11:48 AM, Keerthy wrote:
The patch series adds i2c1 and tps65917 and related nodes.
The patch series is boot tested on DRA72-EVM.
Thanks to Lokesh lokeshvu...@ti.com for testing the series.
Correcting the 'to' list.
On Monday 28 July 2014 11:48 AM, Keerthy wrote:
From: Keerthy J j-keer...@ti.com
DRA72x-evm uses TPS65917 PMIC. Add the node.
NOTE: LDO2 is actually unused, but the usage if any is expected to be
between 1.8 to 3.3v IO voltage. So define the node.
NOTE: Interrupt used is crossbar number
On Monday 28 July 2014 11:48 AM, Keerthy wrote:
From: Keerthy J j-keer...@ti.com
I2C1 bus is used for the following peripherals
P8 connector (MLB)
TLV320AIC3106 Audio codec
J15 LCD header
24WC256 eeprom
TMP102AIDRLT temperature sensor
PCF8575 GPIO
This driver is needed by SATA, PCIe and USB modules on TI SoCs.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 5348364..e411a37
On Wed, Jul 16, 2014 at 03:29:19PM +0300, Peter Ujfalusi wrote:
Hi,
After this series clients can ask to not receive notifications after each
period.
In this case we can disable the completion interrupt since the position
reporting
does not rely on it for cyclic mode.
Patchset for ASoC
On Tue, Jul 08, 2014 at 01:46:35PM +0300, Peter Ujfalusi wrote:
Hi,
It is preferred that audio is served with the highest priority queue in order
to
avoid delays in data transfer between memory and audio IP.
The following series will add an API to arch code to assign a channel to a
On 07/23/2014 11:54 AM, Tony Lindgren wrote:
* Daniel Mack zon...@gmail.com [140712 03:57]:
This is needed to instanciate fixed clocks in the DT.
Makes sense to me. Does this fix some regression or hang
that's needed for the -rc series?
Also would like to get an ack from Tero on this as the
On Thu, 12 Jun 2014 19:53:43 +0300, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Use clkops-clocks property to specify clocks handled by
clock_ops domain PM domain. Only clocks defined in clkops-clocks
set of clocks will be handled by Runtime PM through clock_ops
Pm domain.
Hi Grant.
On 07/28/2014 05:05 PM, Grant Likely wrote:
On Thu, 12 Jun 2014 19:53:43 +0300, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Use clkops-clocks property to specify clocks handled by
clock_ops domain PM domain. Only clocks defined in clkops-clocks
set of clocks will be handled
On Mon, Jul 28, 2014 at 12:57:39PM -0500, Michael Welling wrote:
On Mon, Jul 28, 2014 at 10:57:18AM -0500, Felipe Balbi wrote:
Hi,
On Mon, Jul 28, 2014 at 10:29:49AM -0500, Michael Welling wrote:
On Mon, Jul 28, 2014 at 11:02:47AM -0400, Alan Stern wrote:
On Fri, 25 Jul 2014,
This small patchset move omap3-gta04.dts to omap3-gta04.dtsi which then share
common parts with a3,a4 and a5 models. Models a3 and a5 have only small
additions
to gta04a4 model.
Marek Belisko (3):
arm: dts: omap3-gta04: Rename gta04.dts to gta04.dtsi and add a4 model
arm: dts: Add gta04a3
Add model a5 which have additional jack detection.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/omap3-gta04a5.dts | 17 +
2 files changed, 18 insertions(+)
create mode 100644
Add gta04a3 model with additional acceleromer.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/omap3-gta04a3.dts | 48 +
2 files changed, 49 insertions(+)
create mode 100644
This patch is preparation of adding more boards which have common moved
to omap3-gta04.dtsi. Other boards have only small additions to omap3-gta04a4.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
arch/arm/boot/dts/Makefile | 2 +-
Hi Michael,
On Mon, Jul 28, 2014 at 9:56 PM, Michael Trimarchi
mich...@amarulasolutions.com wrote:
Hi Marek
Il 28/lug/2014 21:54 Marek Belisko ma...@goldelico.com ha scritto:
Add model a5 which have additional jack detection.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
On Mon, Jul 28, 2014 at 10:04 PM, Michael Trimarchi
mich...@amarulasolutions.com wrote:
Hi
Il 28/lug/2014 22:02 Belisko Marek marek.beli...@gmail.com ha scritto:
Hi Michael,
On Mon, Jul 28, 2014 at 9:56 PM, Michael Trimarchi
mich...@amarulasolutions.com wrote:
Hi Marek
Il
We have a single bank in that array, this patch
is in preparation to remove that array. It just
shifts everything to a new set of functions
for register IO while also removing old ones.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 64
we don't need the ifdef if we have omap_nr_pending
telling us how many pending registers we have
on current platform. This solves a possible
problem where we could try to handle bogus
interrupts on OMAP2 and OMAP3 if using single
zImage kernel, because we would end up reading
the following pending
we don't need that anymore since specific
devices are passing correct compatible flags.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 7a4ead3..e70c26e 100644
nobody uses that function outside of this file,
so we don't need to expose it.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/common.h | 10 --
arch/arm/mach-omap2/irq.c| 2 +-
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git
We want .init_irq to call set_irq_handle() for
legacy platforms. Note that this code will also
be dropped once omap2/3 devices are completely
moved to DT.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 30 +++---
1 file changed, 15 insertions(+),
Just move the code over as it has no dependencies
on arch/arm/ anymore.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/Makefile | 3 +--
drivers/irqchip/Kconfig
we can set our global omap_nr_irqs early on
and drop the extra argument to omap_init_irq().
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c
hi,
On Mon, Jul 28, 2014 at 04:15:48PM -0500, Felipe Balbi wrote:
Hi folks,
here's another rebase of the original series moving INTC
to drivers.
There aren't many changes, only some fixes here and there
because of recent changes to irq_domain and irqchip.
I have also added a patch to
that was just a no-op wrapper around omap_intc_handle_irq
anyway.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/common.h | 1 -
arch/arm/mach-omap2/irq.c| 16 ++--
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/common.h
that way, our intc driver can figure out how
many IRQ lines INTC has.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 2 +-
arch/arm/boot/dts/omap3.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi
no functional changes, just moving code around.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 133 +++---
1 file changed, 66 insertions(+), 67 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index
When PROTECTION bit in enabled in PROTECTION
register, INTC's registers are only accessible
from privileged mode.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/irqchip/irq-omap-intc.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
no functional changes, just making sure comment
follows Coding Style.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/irqchip/irq-omap-intc.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index
OMAP INTC irqchip driver will be moved under
drivers/irqchip/ soon but we still have a dependency
with mach-omap2 when it comes to idle functions.
In order to make it easy to share those function
prototypes with OMAP PM code, we introduce this new
header.
Signed-off-by: Felipe Balbi ba...@ti.com
now we can safely drop those fields from our machine_desc.
While at that, also drop the now unused omap_intc_of_init()
definition.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 14 --
arch/arm/mach-omap2/common.h| 1 -
of_iomap(), which is called from omap_init_irq_of(),
already takes care of making sure we have a valid
resource to deal with. Because of that, we can
safely remove our explicit call to of_address_to_resource().
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/irqchip/irq-omap-intc.c | 6
now that we're calling set_handle_irq() from
init_irq(), we can safely drop all callers to
omap3_intc_handle_irq() and its definition.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c| 1 -
arch/arm/mach-omap2/board-am3517crane.c| 1 -
remove ifdef around omap3 INTC support. This
will make it easier to reuse code for PM.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 93fe0be..adc2d33 100644
We already hold the number of Pending registers
in omap_nr_pending. Let's use that instead.
Signed-off-by: Felipe Balbi ba...@ti.com
---
drivers/irqchip/irq-omap-intc.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-omap-intc.c
just to make it clearer that it can
be used on all omaps.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 38007b3..93fe0be 100644
---
now that we don't need to support legacy board-files,
we can completely switch over to a linear irq domain
and make use of irq_alloc_domain_generic_chips() to
allocate all generic irq chips for us.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 88
we are now infering number of IRQ lines based
on correct compatible flag, which renders this
binding completely useless.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi | 1 -
arch/arm/boot/dts/omap2.dtsi | 1 -
arch/arm/boot/dts/omap3.dtsi | 1 -
3 files changed, 3
so far, only am33xx has 128 lines, all other devices
have only 96.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 97845df..7a4ead3 100644
---
that variable will tell us how many INTC_PENDING_IRQn
registers we have. It'll be used on a following patch
to cleanup omap_intc_handle_irq() a bit.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git
the idea is that board-files won't need to set
.handle_irq on their machine_descs, which lets
us drop a little more pointless code.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/irq.c
There's no need for that header to be included.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 14716a8..a405b96 100644
--- a/arch/arm/mach-omap2/irq.c
+++
IRQCHIP_DECLARE macro is used to declare the same
of_device_id structure for irqchips, it's just
a helper. No functional changes.
Note that we're temporarily including irqchip.h
with its full path, until we move this driver
to drivers/irqchip/.
Signed-off-by: Felipe Balbi ba...@ti.com
---
this will let us drop .handle_irq and .init_irq fields
from our generic machine_descs.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index e6997c5..e452411 100644
This is in preparation for removing the pointless
irq_banks array.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 35b8590..7b2cf9a 100644
---
omap_intc_handle_irq now had an unnecessary
base_addr argument. Let's remove it and fix
all callers.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c
now we can finally remove the pointless irq_banks
array.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 128 +-
1 file changed, 47 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c
Hi folks,
here's another rebase of the original series moving INTC
to drivers.
There aren't many changes, only some fixes here and there
because of recent changes to irq_domain and irqchip.
I have also added a patch to enable INTC address space
protection so that only privileged modes can
no functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 8c85c39..8905ebb 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
this is currently used as a hardcoded 0x100
offset.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 7b2cf9a..96073a2 100644
--- a/arch/arm/mach-omap2/irq.c
+++
an almost blind conversion from readl_relaxed
to our newly introduced intc_readl().
While at that, also remove some hardcoded
register addresses.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff
this will cache number of irqs. Also in preparation
for removal of irq_banks array.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 83163d0..3870853 100644
with this, we can use a compatible flag to figure
out how many irq lines are wired up, no need for
our TI-specific ti,intc-size binding.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Hi,
On Mon, Jul 28, 2014 at 04:16:07PM -0500, Felipe Balbi wrote:
we don't need that anymore since specific
devices are passing correct compatible flags.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
Hi,
On Mon, Jul 28, 2014 at 04:16:01PM -0500, Felipe Balbi wrote:
this will let us drop .handle_irq and .init_irq fields
from our generic machine_descs.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/mach-omap2/irq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hi,
On Mon, Jul 28, 2014 at 04:15:48PM -0500, Felipe Balbi wrote:
here's another rebase of the original series moving INTC
to drivers.
There aren't many changes, only some fixes here and there
because of recent changes to irq_domain and irqchip.
I have also added a patch to enable INTC
Hi,
Am 28.07.2014 um 22:12 schrieb Michael Trimarchi:
Hi
Il 28/lug/2014 22:06 Belisko Marek marek.beli...@gmail.com ha scritto:
On Mon, Jul 28, 2014 at 10:04 PM, Michael Trimarchi
mich...@amarulasolutions.com wrote:
Hi
Il 28/lug/2014 22:02 Belisko Marek marek.beli...@gmail.com
On Mon, Jul 28, 2014 at 11:47 AM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Hi Grant.
On 07/28/2014 05:05 PM, Grant Likely wrote:
On Thu, 12 Jun 2014 19:53:43 +0300, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Use clkops-clocks property to specify clocks handled by
clock_ops
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