On Mon, Jan 19, 2015 at 09:43:56AM +, Marc Zyngier wrote:
> Tegra's LIC (Legacy Interrupt Controller) has been so far only
> supported as a weird extension of the GIC, which is not exactly
> pretty.
>
> The stacked IRQ domain framework fits this pretty well, and allows
> the LIC code to be tur
Hi Marc,
On Monday 19 January 2015 03:14 PM, Marc Zyngier wrote:
Document the fact that some Exynos PMUs are capable of acting as
an interrupt controller.
Signed-off-by: Marc Zyngier
---
Documentation/devicetree/bindings/arm/samsung/pmu.txt | 13 +
1 file changed, 13 insertions(
Hi Marc,
On Monday 19 January 2015 03:14 PM, Marc Zyngier wrote:
Exynos has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what
On Tue, 20 Jan 2015, Keerthy wrote:
> On Tuesday 13 January 2015 02:21 PM, Keerthy wrote:
> > This patch fixes: 'omap_hwmod: gpmc: _wait_target_disable failed'
> > error during suspend.
> >
> > This is because smart idle is broken.
> > Tested in dra7-evm D1 board.
>
> Ping on this.
>
> > Signed
Hi
On Thu, 18 Dec 2014, Lad, Prabhakar wrote:
> From: Benoit Parrot
>
> this patch adds VPFE HWMOD data for AM43xx.
>
> Signed-off-by: Benoit Parrot
> Signed-off-by: Darren Etheridge
> Signed-off-by: Felipe Balbi
> Signed-off-by: Lad, Prabhakar
...
> ---
> arch/arm/mach-omap2/omap_hwmod
Hi Tony
On Mon, 19 Jan 2015, Tony Lindgren wrote:
> * Paul Walmsley [150104 15:38]:
> > The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
> >
> > Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
> >
> > are available in the git repository at:
> >
> > git://git.kernel.
Hi Tony,
On Tuesday 13 January 2015 02:21 PM, Keerthy wrote:
This patch fixes: 'omap_hwmod: gpmc: _wait_target_disable failed'
error during suspend.
This is because smart idle is broken.
Tested in dra7-evm D1 board.
Ping on this.
Signed-off-by: Keerthy
---
arch/arm/mach-omap2/omap_hwmod_
On Fri, 19 Dec 2014, Lokesh Vutla wrote:
> Fixed pr_debug to pr_err when hwmod returns an error when enabling
> a module.
>
> Signed-off-by: Lokesh Vutla
Thanks, queued for v3.20 with Roger's ack.
- Paul
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To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a
On Fri, 5 Dec 2014, Felipe Balbi wrote:
> By exposing the details of hwmod structures
> to debugfs we can much more easily verify
> that changes to hwmod data is correct and won't
> cause regressions.
>
> The idea is that this can be used to check the
> state of one hwmod, verify hwmod sysc field
On Mon, Jan 19, 2015 at 03:09:51PM -0800, Tony Lindgren wrote:
> The following changes since commit 7ac72746aa9bb305fa74b44ec73eae99bbbe9b66:
>
> ARM: dts: Revert disabling of smc91x for n900 (2015-01-06 08:49:57 -0800)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub
Felipe Balbi wrote:
> Hi,
>
> On Mon, Jan 19, 2015 at 10:42:04AM -0600, Nishanth Menon wrote:
> > Most platforms seem broken intoday's next tag.
> >
> > https://github.com/nmenon/kernel-test-logs/tree/next-20150119
> > (defconfig: omap2plus_defconfig)
>
On 01/19, Tomeu Vizoso wrote:
> Adds a way for clock consumers to set maximum and minimum rates. This can be
> used for thermal drivers to set ceiling rates, or by misc. drivers to set
> floor rates to assure a minimum performance level.
>
> Changes the signature of the determine_rate callback by
The following changes since commit 7ac72746aa9bb305fa74b44ec73eae99bbbe9b66:
ARM: dts: Revert disabling of smc91x for n900 (2015-01-06 08:49:57 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.19/gic-regression-v
omap2plus_defconfig and omap1_defconfig are also
part of the OMAP Support maintained, because of
that it's best to list them under OMAP SUPPORT on
MAINTAINERS so people know to Cc linux-omap when
patching them.
Reported-by: Sjoerd Simons
Signed-off-by: Felipe Balbi
---
Add omap1_defconfig too
* Felipe Balbi [150119 13:59]:
> On Mon, Jan 19, 2015 at 10:52:56PM +0100, Javier Martinez Canillas wrote:
> > Hello Felipe,
> >
> > On Mon, Jan 19, 2015 at 10:45 PM, Felipe Balbi wrote:
> > > omap2plus_defconfig is also part of the OMAP Support
> > > maintained, because of that it's best to lis
On Mon, Jan 19, 2015 at 10:52:56PM +0100, Javier Martinez Canillas wrote:
> Hello Felipe,
>
> On Mon, Jan 19, 2015 at 10:45 PM, Felipe Balbi wrote:
> > omap2plus_defconfig is also part of the OMAP Support
> > maintained, because of that it's best to list it
> > under OMAP SUPPORT on MAINTAINERS s
Hello Felipe,
On Mon, Jan 19, 2015 at 10:45 PM, Felipe Balbi wrote:
> omap2plus_defconfig is also part of the OMAP Support
> maintained, because of that it's best to list it
> under OMAP SUPPORT on MAINTAINERS so people know
> to Cc linux-omap when patching that file.
>
> Reported-by: Sjoerd Simo
omap2plus_defconfig is also part of the OMAP Support
maintained, because of that it's best to list it
under OMAP SUPPORT on MAINTAINERS so people know
to Cc linux-omap when patching that file.
Reported-by: Sjoerd Simons
Signed-off-by: Felipe Balbi
---
MAINTAINERS | 1 +
1 file changed, 1 insert
On Mon, Jan 19, 2015 at 10:28:36PM +0100, Sjoerd Simons wrote:
> Enable CONFIG_USB_EHCI_HCD and CONFIG_USB_OHCI_HCD to get USB supports
> with omap2plus_defconfig.
>
> Signed-off-by: Sjoerd Simons
Reviewed-by: Felipe Balbi
> ---
> Changes in v2: Enable as modules rather then builtin
>
> arch
* Daniel Thompson [150105 04:49]:
> The omap1's debug-macro.S is similar to the generic 8250 code. Compared to
> the 8520 code the omap1 macro automatically determines what UART to use
> based on breadcrumbs left by the bootloader and automatically copes with
> the eccentric register layout on OMA
* Felipe Balbi [150102 10:50]:
> as it turns out the current IRQ number will
> *always* be available from SIR register which
> renders the reads of PENDING registers as plain
> unnecessary overhead.
>
> In order to catch any situation where SIR reads
> as zero, we're adding a WARN() to turn it in
* Tony Lindgren [150119 13:35]:
> * Nishanth Menon [150102 09:55]:
> > On 01/02/2015 11:38 AM, Tony Lindgren wrote:
> > > * Nishanth Menon [150102 09:20]:
> > >> Hi,
> > >>
> > >> OMAP4 and AM437x ROM code provides services to program PL310's latency
> > >> registers and AM437x provides service
Hi Pavel,
> Add HCI driver for H4 with Nokia extensions. This device is used on
> Nokia N900 cell phone.
>
> Older version of this driver lived in staging, before being reverted
> in a4102f90e87cfaa3fdbed6fdf469b23f0eeb4bfd .
>
> Signed-off-by: Pavel Machek
> Thanks-to: Sebastian Reichel
> Tha
* Nishanth Menon [150102 09:55]:
> On 01/02/2015 11:38 AM, Tony Lindgren wrote:
> > * Nishanth Menon [150102 09:20]:
> >> Hi,
> >>
> >> OMAP4 and AM437x ROM code provides services to program PL310's latency
> >> registers and AM437x provides service for programming Address filter
> >> registers.
Enable CONFIG_USB_EHCI_HCD and CONFIG_USB_OHCI_HCD to get USB supports
with omap2plus_defconfig.
Signed-off-by: Sjoerd Simons
---
Changes in v2: Enable as modules rather then builtin
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap
* Tony Lindgren [150119 12:26]:
> * Nishanth Menon [150119 12:17]:
> > On 10:21-20150117, Marc Zyngier wrote:
> > > Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
> > should have been
> > Commit 9a1091ef0017 ("irqchip: gic: Support hierarchy irq domain")
> >
> > > changed the G
This patch fixes faulty behaviour in a setup where the input clock for the
SRG is fed through the CLKR/CLKX pin but the McBSP is configured to be
master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR/CLKX must
not be configured as output pin. Otherwise the input clock is messed up
horribly.
On Mon, Jan 19, 2015 at 01:05:45PM -0800, Tony Lindgren wrote:
> * Felipe Balbi [150119 12:46]:
> > On Mon, Jan 19, 2015 at 11:18:34AM -0800, Tony Lindgren wrote:
> > > * Tony Lindgren [150114 16:14]:
> > > > * Sergei Shtylyov [150114 05:54]:
> > > > > Hello.
> > > > >
> > > > > On 1/14/2015 2:
* Felipe Balbi [150119 12:46]:
> On Mon, Jan 19, 2015 at 11:18:34AM -0800, Tony Lindgren wrote:
> > * Tony Lindgren [150114 16:14]:
> > > * Sergei Shtylyov [150114 05:54]:
> > > > Hello.
> > > >
> > > > On 1/14/2015 2:37 AM, Tony Lindgren wrote:
> > > >
> > > > >This allows booting ti81xx boar
On 01/19, Tomeu Vizoso wrote:
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 97f3425..f2a1ff3 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -694,32 +751,32 @@ long __clk_mux_determine_rate(struct clk_hw *hw,
> unsigned long rate,
> unsign
On Mon, Jan 19, 2015 at 11:18:34AM -0800, Tony Lindgren wrote:
> * Tony Lindgren [150114 16:14]:
> > * Sergei Shtylyov [150114 05:54]:
> > > Hello.
> > >
> > > On 1/14/2015 2:37 AM, Tony Lindgren wrote:
> > >
> > > >This allows booting ti81xx boards with with when a .dts
> > >
> > >So, wit
* Nishanth Menon [150119 12:17]:
> On 10:21-20150117, Marc Zyngier wrote:
> > Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
> should have been
> Commit 9a1091ef0017 ("irqchip: gic: Support hierarchy irq domain")
>
> > changed the GIC driver to use a non-legacy IRQ domain on DT
On 10:21-20150117, Marc Zyngier wrote:
> Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
should have been
Commit 9a1091ef0017 ("irqchip: gic: Support hierarchy irq domain")
> changed the GIC driver to use a non-legacy IRQ domain on DT
> platforms. This patch assumes that DT-driven
On Mon, Jan 19, 2015 at 07:45:31PM +, John Youn wrote:
> > -Original Message-
> > From: Felipe Balbi [mailto:ba...@ti.com]
> > Sent: Monday, January 19, 2015 6:47 AM
> >
> > looking at Synopsys Solvnet for this IP, it shows that current version
> > is 2.90a. There's no 3.00a. Paul,
> -Original Message-
> From: Felipe Balbi [mailto:ba...@ti.com]
> Sent: Monday, January 19, 2015 6:47 AM
>
> looking at Synopsys Solvnet for this IP, it shows that current version
> is 2.90a. There's no 3.00a. Paul, John, is there a 3.00a version of the
> DWC USB3 IP ?
Yes there is,
* Paul Walmsley [150104 15:38]:
> Hi Tony
>
> The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
>
> Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
> ta
From: Felipe Balbi
Date: Mon, 19 Jan 2015 11:52:36 -0600
> Commit c03abd84634d (net: ethernet: cpsw: don't requests IRQs we don't
> use) left one build breakage when NET_POLL_CONTROLLER is enabled.
>
> Fix this build break by referring to the correct irqs_table array.
>
> Fixes: c03abd84634d (n
* Tony Lindgren [150119 10:52]:
> * Roger Quadros [150119 09:55]:
> > Both are needed for USB cable type detection on dra7-evm.
> >
> > Signed-off-by: Roger Quadros
> > ---
> > arch/arm/configs/omap2plus_defconfig | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm/confi
* Tony Lindgren [150114 16:14]:
> * Sergei Shtylyov [150114 05:54]:
> > Hello.
> >
> > On 1/14/2015 2:37 AM, Tony Lindgren wrote:
> >
> > >This allows booting ti81xx boards with with when a .dts
> >
> >So, with, with or when? :-)
>
> Heh thanks will updated to:
>
> This allows booting ti
* Tony Lindgren [150113 15:29]:
> From: Aida Mynzhasova
>
> This patch adds required definitions and structures for clockdomain
> initialization, so omap3xxx_clockdomains_init() was substituted by
> new ti81xx_clockdomains_init() while early initialization of
> TI81XX platform.
Looks like this
On 1/16/15 5:00 PM, Tony Lindgren wrote:
* santosh shilimkar [150116 16:23]:
On 1/16/2015 2:50 PM, Tony Lindgren wrote:
Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid de
* Roger Quadros [150119 09:55]:
> Both are needed for USB cable type detection on dra7-evm.
>
> Signed-off-by: Roger Quadros
> ---
> arch/arm/configs/omap2plus_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/configs/omap2plus_defconfig
> b/arch/arm/configs/omap2p
On 01/19/2015 01:55 AM, Tomeu Vizoso wrote:
> On 17 January 2015 at 02:02, Stephen Boyd wrote:
>> On 01/12, Tomeu Vizoso wrote:
>>
>>> +}
>>> EXPORT_SYMBOL_GPL(__clk_get_rate);
>>>
>>> @@ -630,7 +656,12 @@ out:
>>> return !!ret;
>>> }
>>>
>>> -bool __clk_is_enabled(struct clk *clk)
>>> +bo
* Jason Cooper [150106 19:03]:
> On Tue, Jan 06, 2015 at 02:38:08PM -0600, Felipe Balbi wrote:
> > commit 55601c9f2467 (arm: omap: intc: switch over
> > to linear irq domain) introduced a regression with
> > SDMA legacy driver because that driver strictly depends
> > on INTC's IRQs starting at NR_
Some omaps have NOR flash as the rootfs but we're missing
physmap and physmap_of to properly support it.
Signed-off-by: Tony Lindgren
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_
We have pcf857x at least several boards. Let's enable it
as a loadable module.
Cc: Brian Hutchinson
Signed-off-by: Tony Lindgren
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defcon
We have this on at least 3517-evm and dm8168-evm. Let's
enable davinci_emac so those can be booted with NFSroot.
Cc: Brian Hutchinson
Signed-off-by: Tony Lindgren
---
arch/arm/configs/omap2plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b
Hi,
Let's add davinci_emac, and fix the NOR configuration. And let's also
add pcf857x as a loadable module.
Regards,
Tony
Tony Lindgren (3):
ARM: omap2plus_defconfig: Enable support for davinci_emac
ARM: omap2plus_defconfig: Enable pcf857x
ARM: omap2plus_defconfig: Add NOR flash support
On this EVM, the USB cable state has to be determined via the
ID pin tied to a GPIO line. We use the gpio-usb-extcon driver
to read the ID pin and the extcon framework to forward
the USB cable state information to the USB driver so the
controller can be configured in the right mode (host/peripheral
The recommended name for USB-Host cable state is "USB-Host" and not
"USB-HOST" as per drivers/extcon/extcon-class.c extcon_cable_name.
Change all instances of "USB-HOST" to "USB-Host".
Signed-off-by: Roger Quadros
---
drivers/extcon/extcon-palmas.c | 18 +-
drivers/usb/dwc3/dwc3
Commit c03abd84634d (net: ethernet: cpsw: don't requests IRQs we don't
use) left one build breakage when NET_POLL_CONTROLLER is enabled.
Fix this build break by referring to the correct irqs_table array.
Fixes: c03abd84634d (net: ethernet: cpsw: don't requests IRQs we don't use)
Reported-by: kbui
Both are needed for USB cable type detection on dra7-evm.
Signed-off-by: Roger Quadros
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index c2c3a85..bc23b90 100644
--- a/a
On this EVM, the USB cable state has to be determined via the
ID pin tied to a GPIO line. We use the gpio-usb-extcon driver
to read the ID pin and the extcon framework to forward
the USB cable state information to the USB driver so the
controller can be configured in the right mode (host/peripheral
Hi,
On DRA7 EVMs the USB ID pin is connected to a GPIO line. The USB drivers
(dwc3 + dwc3-omap) depend on extcon framework to get the USB cable state
(USB or USB-Host) to put the controller in the right mode.
There were earlier attempts [1] to get this working by trying to patch up
the existing G
This driver observes the USB ID pin connected over a GPIO and
updates the USB cable extcon states accordingly.
The existing GPIO extcon driver is not suitable for this purpose
as it needs to be taught to understand USB cable states and it
can't handle more than one cable per instance.
For the USB
Hi,
On Mon, Jan 19, 2015 at 10:42:04AM -0600, Nishanth Menon wrote:
> Most platforms seem broken intoday's next tag.
>
> https://github.com/nmenon/kernel-test-logs/tree/next-20150119
> (defconfig: omap2plus_defconfig)
>
> > [7.166600] [ cut here ]
From: Felipe Balbi
Date: Mon, 19 Jan 2015 08:40:17 -0600
> On Sun, Jan 18, 2015 at 01:07:50AM -0500, David Miller wrote:
>> From: Felipe Balbi
>> Date: Fri, 16 Jan 2015 10:11:12 -0600
>>
>> > CPSW never uses RX_THRESHOLD or MISC interrupts. In
>> > fact, they are always kept masked in their app
* Matthijs van Duin [150117 14:41]:
> On 17 January 2015 at 19:14, Tony Lindgren wrote:
> > Oh OK. And looks like dm814x trm claims to have PINCNTL[7:0]
> > bits for MUXMODE instead of just bits [2:0]?
>
> However, the datasheet's table of possible mux modes per pin has as
> column headers: 0x1,
Adds a way for clock consumers to set maximum and minimum rates. This can be
used for thermal drivers to set ceiling rates, or by misc. drivers to set
floor rates to assure a minimum performance level.
Changes the signature of the determine_rate callback by adding the
parameters floor_rate and cei
Moves clock state to struct clk_core, but takes care to change as little API as
possible.
struct clk_hw still has a pointer to a struct clk, which is the
implementation's per-user clk instance, for backwards compatibility.
The struct clk that clk_get_parent() returns isn't owned by the caller, bu
On 19 January 2015 at 09:04, Nishanth Menon wrote:
>
> On 01/19/2015 10:59 AM, Tyler Baker wrote:
>> I can confirm, I am observing the same issue in my lab. 15 platforms
>> failed to boot on next-20150119.
>>
>> http://kernelci.org/boot/?next-20150119&fail
&g
* Matthijs van Duin [150118 12:35]:
> > --- a/arch/arm/mach-omap2/usb-musb.c
> > +++ b/arch/arm/mach-omap2/usb-musb.c
> > @@ -82,16 +82,8 @@ void __init usb_musb_init(struct omap_musb_board_data
> > *musb_board_data)
> > musb_plat.mode = board_data->mode;
> > musb_plat.extvbus = board_data->e
On 01/19/2015 10:59 AM, Tyler Baker wrote:
> I can confirm, I am observing the same issue in my lab. 15 platforms
> failed to boot on next-20150119.
>
> http://kernelci.org/boot/?next-20150119&fail
http://kernelci.org/boot/all/job/next/kernel/next-20150119/
I see many platform
On 17 January 2015 at 02:57, Stephen Boyd wrote:
> On 01/12, Tomeu Vizoso wrote:
>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>> index 7eddfd8..2793bd7 100644
>> --- a/drivers/clk/clk.c
>> +++ b/drivers/clk/clk.c
>> @@ -1013,8 +1015,8 @@ static unsigned long clk_core_round_rate_nolock(str
Hi,
Most platforms seem broken intoday's next tag.
https://github.com/nmenon/kernel-test-logs/tree/next-20150119
(defconfig: omap2plus_defconfig)
> [7.166600] [ cut here ]
> [7.171676] WARNING: CPU: 0 PID: 54 at mm/mmap.c:2859
> exit_mm
Quoting Mike Turquette (2015-01-14 14:06:49)
> Quoting Tony Lindgren (2015-01-13 14:51:26)
> > Hi all,
> >
> > Here's a minimal support for the FAPLL (Flying Adder PLL) on dm816x
> > which is a omap variant.
>
> Tony,
>
> Patches look fine to me. I'll give it a few days for Paul or Tero to
> com
On Mon, Jan 19, 2015 at 03:56:48PM +0800, Sneeker Yeh wrote:
> If an xhci platform has Synopsis device disconnection errata then enable
> XHCI_DISCONNECT_QUIRK quirk flag.
>
> Signed-off-by: Sneeker Yeh
> ---
> drivers/usb/host/xhci-plat.c |3 +++
> include/linux/usb/xhci_pdriver.h |
Hi,
On Mon, Jan 19, 2015 at 03:56:47PM +0800, Sneeker Yeh wrote:
> Synopsis Designware USB3 IP earlier than v3.00a which is configured in silicon
> with DWC_USB3_SUSPEND_ON_DISCONNECT_EN=1, would need a specific quirk to
> prevent
> xhci host controller from dying when device is disconnected.
>
On Mon, Jan 19, 2015 at 03:56:45PM +0800, Sneeker Yeh wrote:
> This patch adds support for Synopsis DesignWare USB3 IP Core found
> on Fujitsu Socs.
>
> Signed-off-by: Sneeker Yeh
if this is moved after patch 3, you don't need to patch it again to add
the quirk ;-)
--
balbi
signature.asc
Des
Hi,
On Mon, Jan 19, 2015 at 03:56:46PM +0800, Sneeker Yeh wrote:
> Add the contstant for v3.00a dwc3 IP detection
>
> Signed-off-by: Sneeker Yeh
> ---
> drivers/usb/dwc3/core.h |1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index
On Sun, Jan 18, 2015 at 09:52:14AM +, Lee Jones wrote:
> On Fri, 26 Dec 2014, Felipe Balbi wrote:
>
> > STATUS register can be modified by the HW, so we
> > should bypass cache because of that.
> >
> > In the case of INT[12] registers, they are the ones
> > that actually clear the IRQ source
On Sun, Jan 18, 2015 at 01:07:50AM -0500, David Miller wrote:
> From: Felipe Balbi
> Date: Fri, 16 Jan 2015 10:11:12 -0600
>
> > CPSW never uses RX_THRESHOLD or MISC interrupts. In
> > fact, they are always kept masked in their appropriate
> > IRQ Enable register.
> >
> > Instead of allocating a
On 19/01/15 10:47, Lucas Stach wrote:
> Am Montag, den 19.01.2015, 09:44 + schrieb Marc Zyngier:
>> IMX6 has been (ab)using the gic_arch_extn to provide
>> wakeup from suspend, and it makes a lot of sense to convert
>> this code to use stacked domains instead.
>>
>> This patch does just this, u
Am Montag, den 19.01.2015, 09:44 + schrieb Marc Zyngier:
> IMX6 has been (ab)using the gic_arch_extn to provide
> wakeup from suspend, and it makes a lot of sense to convert
> this code to use stacked domains instead.
>
> This patch does just this, updating the DT files to actually
> reflect w
On 17 January 2015 at 02:02, Stephen Boyd wrote:
> On 01/12, Tomeu Vizoso wrote:
>> Moves clock state to struct clk_core, but takes care to change as little API
>> as
>> possible.
>>
>> struct clk_hw still has a pointer to a struct clk, which is the
>> implementation's per-user clk instance, for
These add device tree entry for qspi device on dra72-evm.
Signed-off-by: Mugunthan V N
---
This patch is tested on linux-next and the boot logs is here [1]
[1] - http://pastebin.ubuntu.com/9783555/
---
arch/arm/boot/dts/dra72-evm.dts | 77 +
1 file cha
OMAP4/5 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far lyi
Now that the users of gic_arch_extn have been fixed, drop the
"feature" for good. This leads to the removal of some now useless
locking.
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic.c | 54 -
include/linux/irqchip/arm-gic.h | 2 --
2 file
shmobile only uses gic_arch_extn.irq_set_wake to prevent the GIC
from returning -ENXIO when receiving a wake-up configuration request.
It is a lot simpler to tell the irq layer that we don't need any
configuration by using the IRQCHIP_SKIP_SET_WAKE, thanks to the
new gic_set_irqchip_flags function
Instead of directly touching gic_arch_extn, which is about to
be removed, use gic_set_irqchip_flags instead.
Acked-by: Linus Walleij
Signed-off-by: Marc Zyngier
---
arch/arm/mach-ux500/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm
Instead of directly touching gic_arch_extn, which is about to
be removed, use gic_set_irqchip_flags instead.
Signed-off-by: Marc Zyngier
---
arch/arm/mach-zynq/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
i
Signed-off-by: Marc Zyngier
---
.../interrupt-controller/ti,omap4-wugen-mpu| 33 ++
1 file changed, 33 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu
diff --git
a/Documentation/devicetree/bindings/interrup
A common use of gic_arch_extn is to set up additional flags
to the GIC irqchip. It looks like a benign enough hack that
doesn't really require the users of that feature to be converted
to stacked domains.
Add a gic_set_irqchip_flags() function that platform code can
call instead of using the dread
The only user of the so called "routable domain" functionality
now being fixed, let's clean up the GIC.
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic.c | 59 -
include/linux/irqchip/arm-gic.h | 6 -
2 files changed, 5 insertions(+), 60
Exynos has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far lyin
IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.
This patch does just this, updating the DT files to actually
reflect what the HW provides.
BIG FAT WARNING: because the DTs were so far lying
Make it look like a real interrupt controller.
Signed-off-by: Marc Zyngier
---
.../devicetree/bindings/arm/omap/crossbar.txt | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/d
Document the fact that some Exynos PMUs are capable of acting as
an interrupt controller.
Signed-off-by: Marc Zyngier
---
Documentation/devicetree/bindings/arm/samsung/pmu.txt | 13 +
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt
Nobody will regret it.
Signed-off-by: Marc Zyngier
---
Documentation/devicetree/bindings/arm/gic.txt | 6 --
1 file changed, 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/gic.txt
b/Documentation/devicetree/bindings/arm/gic.txt
index 8112d0c..631cb71 100644
--- a/Documen
This proves to be useful with stacked domains, when the current
domain doesn't implement wake-up, but expect the parent to do so.
Signed-off-by: Marc Zyngier
---
include/linux/irq.h | 1 +
kernel/irq/chip.c | 16
2 files changed, 17 insertions(+)
diff --git a/include/linux/i
The GIC is now always initialized from DT on tegra, and there is
no point in keeping non-DT init code.
Acked-by: Thierry Reding
Signed-off-by: Marc Zyngier
---
arch/arm/mach-tegra/irq.c | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/ir
Describe the legacy interrupt controller in every tegra DTSI files,
and make it the parent of most interrupts.
Signed-off-by: Marc Zyngier
---
arch/arm/boot/dts/tegra114.dtsi | 16 +++-
arch/arm/boot/dts/tegra124.dtsi | 16 +++-
arch/arm/boot/dts/tegra20.dtsi | 15 ++
Now that all DTs have been updated, entierely drop support for
the non-DT code.
This is likely to break platforms that do not update their DT,
so print a warning at boot time.
Signed-off-by: Marc Zyngier
---
arch/arm/mach-tegra/iomap.h | 15
arch/arm/mach-tegra/irq.c | 201 +
Signed-off-by: Marc Zyngier
---
.../interrupt-controller/nvidia,tegra-ictlr.txt| 43 ++
1 file changed, 43 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra-ictlr.txt
diff --git
a/Documentation/devicetree/bindings/inte
If we detect that our DT has a LIC node, don't setup gic_arch_extn,
and skip tegra_legacy_irq_syscore_init as well.
This is only a temporary measure until that code is removed for good.
Acked-by: Thierry Reding
Signed-off-by: Marc Zyngier
---
arch/arm/mach-tegra/irq.c | 12
arch
The gic_arch_extn hack that a number of platform use has been nagging
me for too long. It is only there for the benefit of a few platform,
and yet it impacts all GIC users. Moreover, it gives people the wrong
idea ("let's use it to put some new custom hack in there"...).
But now that stacked irq d
Support for the TI crossbar used on the DRA7 family of chips
is implemented as an ugly hack on the side of the GIC.
Converting it to stacked domains makes it slightly more
palatable, as it results in a cleanup.
Unfortunately, as the DT bindings failed to acknowledge the
fact that this is actually
Tegra's LIC (Legacy Interrupt Controller) has been so far only
supported as a weird extension of the GIC, which is not exactly
pretty.
The stacked IRQ domain framework fits this pretty well, and allows
the LIC code to be turned into a standalone irqchip. In the process,
make the driver DT aware, s
On Sun, Jan 18, 2015 at 06:38:46PM +0100, Geert Uytterhoeven wrote:
>
> The boot loader copied the DT to the end of real RAM, not to the end of
> the 256 MiB block? Hence the kernel accesses unmapped memory
> when checking the FDT header?
actually everything is below 256M since physical memory st
Synopsis Designware USB3 IP earlier than v3.00a which is configured in silicon
with DWC_USB3_SUSPEND_ON_DISCONNECT_EN=1, would need a specific quirk to prevent
xhci host controller from dying when device is disconnected.
Since DWC_USB3_SUSPEND_ON_DISCONNECT_EN is an IP configuration whose state
ca
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