On 13/08/2015 at 12:37:48 +0530, Keerthy wrote :
Configure the clock source to either internal clock
or external clock based on the availability of the clocks.
External clock is preferred as it can be ticking during suspend.
Signed-off-by: Keerthy j-keer...@ti.com
---
On 13/08/2015 at 20:17:23 +, Paul Walmsley wrote :
I'd say that I don't really care. I'd say the best would be to make a
decision based on clock-accuracy but maybe that is an information you
don't have yet. Anyway, this could be added at a later date.
Either the clock mux logic is
On Friday 14 August 2015 02:03 PM, Alexandre Belloni wrote:
On 13/08/2015 at 12:37:48 +0530, Keerthy wrote :
Configure the clock source to either internal clock
or external clock based on the availability of the clocks.
External clock is preferred as it can be ticking during suspend.
On 13/08/15 17:58, Grygorii Strashko wrote:
Since IRQ chip helpers were introduced drivers lose ability to
register separate lockdep classes for each registered GPIO IRQ
chip and the gpiolib now is using shared lockdep class for
all GPIO IRQ chips (gpiochip_irq_lock_class).
As result, lockdep
Add HDMI audio support. Adds mcasp0_pins, clk_mcasp0_fixed,
clk_mcasp0, mcasp0, sound node, and updates the tda19988 node to
follow the new binding.
Signed-off-by: Jyri Sarha jsa...@ti.com
---
arch/arm/boot/dts/am335x-boneblack.dts | 90 --
1 file changed, 86
From: Jean-Francois Moine moin...@free.fr
Two kinds of ports may be declared in a DT graph of ports: video and audio.
This patch accepts the port value from a video port as an alternative
to the video-ports property.
It also accepts audio ports in the case the transmitter is not used as
a slave
This is my third RFC patch series on the subject. This time also the
tda998x driver patches are a serious attempt to come up with an
initial implementation for HDMI audio ASoC support.
Russell's drm/edid: add function to help find SADs is here just to
produce a working patch-set on top of
Register ASoC HDMI codec for audio functionality. This is an initial
ASoC audio implementation for tda998x driver and it does not use all
the features provided by hdmi-codec.
HDMI audio info-frame and audio stream header is generated by the ASoC
HDMI codec. The codec also applies constraints for
Move struct tda998x_audio definition to tda998x_drv.c and remove
include/sound/tda998x.h. There is no external use for struct
tda998x_audio.
Fix graph parsing to allow ports to be inside a separate ports-node as
specified in Documentation/devicetree/bindings/graph.txt.
Signed-off-by: Jyri Sarha
The hdmi stub codec has not been used since refactoring of OMAP HDMI
audio support.
Signed-off-by: Jyri Sarha jsa...@ti.com
---
sound/soc/codecs/Kconfig | 4 --
sound/soc/codecs/Makefile | 2 -
sound/soc/codecs/hdmi.c | 109 --
3 files changed,
IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively. However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata
Hi!
Maybe some power management problem? Something is not always initialized
correctly?
I remember that there is some problem (maybe in NoLo - Nokia bootloader)
that sometimes chainloaded U-Boot (booted via NoLo) is not able to
initialize mmc chip (all read operation fails). In U-Boot I
On Friday 14 August 2015 22:46:49 Pavel Machek wrote:
Hi!
Maybe some power management problem? Something is not always
initialized correctly?
I remember that there is some problem (maybe in NoLo - Nokia
bootloader) that sometimes chainloaded U-Boot (booted via NoLo) is
not able to
On Tue, May 26, 2015 at 09:59:07PM +0300, Jyri Sarha wrote:
+
+ mutex_lock(hcp-current_stream_lock);
+ if (hcp-current_stream hcp-current_stream-runtime
+ snd_pcm_running(hcp-current_stream)) {
+ dev_info(dev, HDMI audio playback aborted\n);
Does this really
On Fri, Aug 14, 2015 at 12:30:40PM +0300, Jyri Sarha wrote:
The hdmi stub codec has not been used since refactoring of OMAP HDMI
audio support.
grep tells me that the OMAP HDMI4 and HDMI5 drivers are still
registering this device in -next...
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On Fri, Aug 14, 2015 at 12:30:41PM +0300, Jyri Sarha wrote:
+struct hdmi_codec_ops {
+ /* For runtime clock configuration from ASoC machine driver.
+ * A direct forward from set_sysclk in struct snd_soc_dai_ops.
+ * Optional */
+ int (*set_clk)(struct device *dev, int
On Mon, Jul 27, 2015 at 04:54:09PM +0530, Kishon Vijay Abraham I wrote:
vsel_reg and enable_reg of the pbias regulator descriptor should actually
have the offset from syscon. However after the pbias device tree node
I'm having a hard time understanding this statement, sorry. What makes
you
The 8250-omap driver requires the DMA-engine driver to support the pause
command in order to properly turn off programmed RX transfer before the
driver stars manually reading from the FIFO.
The lacking support of the requirement has been discovered recently. In
order to stay safe here we disable
The function tty_insert_flip_string() returns an int and as such it
might fail. So the result is that I kindly asked to insert 48 bytes and
the function only insterted 32.
I have no idea what to do with the remaining 16 so I think dropping them
is the only option. I also increase the buf_overrun
From: John Ogness john.ogn...@linutronix.de
That bitfield is modified by read + or + write operation. If someone
sets any of the other two bits it might render the lock useless.
While at it, remove other bitfields as well to avoid more such
errors.
Cc: Greg Kroah-Hartman
It has been observed on DRA7-evm that the UART triggers the interrupt and
reading IIR says IIR_NO_INT. It seems that we receive data via RX-DMA
but the interrupt is triggered anyway. I have hardly observed it on
AM335x and not in *that* quantity. On DRA7-evm with continuous transfers
at 3MBaud and
On 14/08/15 11:18, Grygorii Strashko wrote:
On 08/13/2015 03:58 PM, Grygorii Strashko wrote:
On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
On Thu, Aug 13, 2015 at 12:37:48PM +0530, Keerthy wrote:
Configure the clock source to either internal clock
or external clock based on the availability of the clocks.
External clock is preferred as it can be ticking during suspend.
Signed-off-by: Keerthy j-keer...@ti.com
@@ -627,6 +642,17
It's expected to use this helper when the current
domain doesn't implement .irq_set_type(), but expect
the parent to do so.
Cc: Sudeep Holla sudeep.ho...@arm.com
Signed-off-by: Grygorii Strashko grygorii.stras...@ti.com
---
include/linux/irq.h | 1 +
kernel/irq/chip.c | 17 +
It's observed that ARM GIC IRQ triggering type is not configured
properly when IRQ is routed through IRQ domain hierarchy and
system started using DT. As result, system will start using default
ARM GIC configuration, ignore DT IRQ triggering configuration,
and value of
Hi All,
I've had able to identify and reproduce four issues related to switching on
using IRQ domain hierarchy on TI OMAP DRA7 (dra7-evm). Most of them were
discovered during testing of Suspend to RAM and IRQ wakeup functionality.
In my opinion, most of these issue could also affect on other ARM
On Thu, Aug 13, 2015 at 4:58 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
Since IRQ chip helpers were introduced drivers lose ability to
register separate lockdep classes for each registered GPIO IRQ
chip and the gpiolib now is using shared lockdep class for
all GPIO IRQ chips
On 08/14/2015 02:34 PM, Linus Walleij wrote:
[...]
Every chip will get their own lock class on the heap.
But I think it is a bit kludgy.
Is it not possible to have the lock key in struct gpio_chip
be a real member instead of a pointer and get a per-chip
lock that way?
(...)
struct
It's observed that ARM GIC IRQ triggering type is not configured
properly when IRQ is routed through IRQ domain hierarchy and
system started using DT. As result, system will start using default
ARM GIC configuration, ignore DT IRQ triggering configuration,
and value of
Now irq_chip_retrigger_hierarchy() returns -ENOSYS if it
was not able to find at least one .irq_retrigger() callback
implemented in IRQ domain hierarchy. As result, IRQ
re-triggering is not working now on ARM (TI OMAP) where
ARM GIC is not implemented this callback.
The .irq_retrigger() is
The TI crossbar doesn't provides any facility to configure the wakeup
sources, but it implements .irq_set_wake() callback:
.irq_set_wake = irq_chip_set_wake_parent
As result, the irq_chip_set_wake_parent() will try to execute
.irq_set_wake() callback for parent IRQ domain, which
All ARM GIC IRQs have to masked during suspend if they are not
wakeup source - this is expected behavior.Now this is not happen, since
switching to use IRQ domain hierarchy, because suspend_device_irq()
only checks flags in the last IRQ chip in hierarchy for
IRQCHIP_MASK_ON_SUSPEND bit set. And in
Power and clock domains can now be registered from DT based layout. Some
data is retained in the kernel for initialization purposes. The platforms
that require DT based domain support, shall have their DT and the
clock/powerdomainxyz_data.c files updated.
The template clock/powerdomain data
Clock and powerdomain data can now be moved partially to DT. Some init
data is still left to the existing data files, to act as templates for
the DT based data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains44xx_data.c | 327 +++
The PRCM core code contains a notion of PRCM partition and instances, and
all PRCM driver register accesses are done through the partitions.
The APIs provided in this patch make it possible for PRCM child nodes
to map their register spaces against proper PRCM partition, and access
the correct
All the OMAP4+ boards are DT based only, so the prcm_mpu base address
can be parsed from DT.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c |4
arch/arm/mach-omap2/prm_common.c | 18 ++
2 files changed, 18 insertions(+), 4 deletions(-)
This avoids the need to use memblock_virt_alloc in the code. Done in
preparation of adding generic PM domains to OMAP platform codebase;
generic PM domain registration doesn't work during early_init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c | 180
PRCM has a local instance directly under the MPU domain, for controlling
local MPU powerdomains and clockdomains. Add a DT node for this for
omap4, omap5 and dra7.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |8
arch/arm/boot/dts/omap4.dtsi |8
Hi,
This series provides DT based support for clock/powerdomain data. Some
parts of the data is retained under the existing *_data.c files to act
as templates. Also, minimal support for generic power domains is added,
but without power_off / power_on support at this point (should be
relatively
Clockdomain / powerdomain nodes with corresponding register addresses
and PRCM hierarchy is added to the DT. This data can be parsed to
create the clock/powerdomain data required by the kernel.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 32 +++-
The hdmi-codec is a platform device driver to be registered from
drivers of external HDMI encoders with I2S and/or spdif interface. The
driver in turn registers an ASoC codec for the HDMI encoder's audio
functionality.
The structures and definitions in the API header are mostly redundant
copies
From: Russell King - ARM Linux li...@arm.linux.org.uk
Add a function to find the start of the SADs in the ELD. This
complements the helper to retrieve the SAD count.
Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk
This should already be coming in from drm-next.
Signed-off-by: Jyri
Hi Peter,
On 13/07/15 13:20, Roger Quadros wrote:
On 13/07/15 05:14, Peter Chen wrote:
On Wed, Jul 08, 2015 at 01:19:33PM +0300, Roger Quadros wrote:
The OTG core instantiates the OTG Finite State Machine
per OTG controller and manages starting/stopping the
host and gadget controllers based
On Fri, Aug 14, 2015 at 12:30:41PM +0300, Jyri Sarha wrote:
+static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct hdmi_codec_priv *hcp =
On Fri, Aug 14, 2015 at 12:30:44PM +0300, Jyri Sarha wrote:
+static int tda998x_write_aif(struct tda998x_priv *priv,
+ struct hdmi_audio_infoframe *cea)
+{
+ uint8_t buf[HDMI_INFOFRAME_SIZE(AUDIO)];
+ int len;
+
+ len = hdmi_audio_infoframe_pack(cea,
On Fri, Aug 14, 2015 at 12:42:38PM +0300, Roger Quadros wrote:
Hi Peter,
On 13/07/15 13:20, Roger Quadros wrote:
On 13/07/15 05:14, Peter Chen wrote:
On Wed, Jul 08, 2015 at 01:19:33PM +0300, Roger Quadros wrote:
The OTG core instantiates the OTG Finite State Machine
per OTG controller
On 08/13/2015 03:58 PM, Grygorii Strashko wrote:
On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
On 12/08/15 18:45, Grygorii Strashko wrote:
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ
On 08/14/2015 03:40 PM, Lars-Peter Clausen wrote:
On 08/14/2015 02:34 PM, Linus Walleij wrote:
[...]
Every chip will get their own lock class on the heap.
But I think it is a bit kludgy.
Is it not possible to have the lock key in struct gpio_chip
be a real member instead of a pointer and
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