On Wed, Sep 30, 2015 at 11:58:16PM +0200, Arnd Bergmann wrote:
> On Wednesday 30 September 2015 09:12:09 Felipe Balbi wrote:
> > On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
> > > On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
> > > > All devices should have a default
On 10/05/2015 11:58 AM, Tony Lindgren wrote:
> * Suman Anna [151005 09:47]:
>> Tony,
>>
>> On 10/03/2015 12:29 PM, kbuild test robot wrote:
>>> Hi Suman,
>>>
>>> [auto build test results on v4.3-rc3 -- if it's inappropriate base, please
>>> ignore]
>>>
>>> config:
On Mon, Oct 05, 2015 at 10:11:56AM -0700, Tony Lindgren wrote:
> * Tony Lindgren [151005 07:57]:
> > * Tony Lindgren [151005 07:44]:
> > > * Tony Lindgren [151005 04:28]:
> > >
> > > Based on some tests it seems that the duovero unpaired
On Monday, October 05, 2015 04:45:28 PM Tomeu Vizoso wrote:
> Hi,
>
> this is v9 of an attempt to make it easier for devices to remain in
> runtime PM when the system goes to sleep, mainly to reduce the time
> spent resuming devices.
>
> For this, we interpret the absence of all PM callback
drivers/iio/adc/palmas_gpadc.c:798:3-8: No need to set .owner here. The core
will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
CC: H. Nikolaus Schaller
Signed-off-by: Fengguang Wu
Hi Nikolaus,
[auto build test WARNING on v4.3-rc4 -- if it's inappropriate base, please
ignore]
coccinelle warnings: (new ones prefixed by >>)
>> drivers/iio/adc/palmas_gpadc.c:798:3-8: No need to set .owner here. The core
>> will do it.
Please review and possibly fold the followup patch.
This driver code was found as:
https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc
Fixed various compilation issues and test this driver on omap5 evm.
Signed-off-by: Pradeep Goudagunta
Signed-off-by: H.
Signed-off-by: H. Nikolaus Schaller
---
arch/arm/boot/dts/omap5-uevm.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 3b16e8f..c78ee2f 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++
From: Marek Belisko
Code was found at:
https://android.googlesource.com/kernel/tegra/+/a90856a6626d502d42c6e7abccbdf9d730b36270%5E%21/#F1
Signed-off-by: Laxman Dewangan
[Fixed minor typos + add channels list to documentation]
Signed-off-by: Marek
V2 changes:
- worked in review comments by Peter Meerwald
- made channels 1 and 3 report (raw) temperature values
- moved PALMAS_GPADC_TRIMINVALID to driver core
- worked in review comments by Jonathan Cameron
- iio_map removed
Add iio driver for the TI Palmas (twl6035, 6037) including device
We actually want these devices to be created because
we will be moving timers to drivers/clocksource and
this will prevent them from probing.
The only situation where we want secure timers to be
actually disabled is when we *know* we're running on
non-GP (read: HS or EMU) chips, because the
Suman Anna writes:
> Add the DT node for Timer12 present on DRA7 family of
> SoCs. Timer12 is present in PD_WKUPAON power domain, and
> has the same capabilities as the other timers, except for
> the fact that it serves as a secure timer on HS devices
> and is clocked only from
Suman Anna writes:
> Hi Felipe,
>
>>>
>>> On 10/05/2015 02:48 PM, Balbi, Felipe wrote:
We actually want these devices to be created because
we will be moving timers to drivers/clocksource and
this will prevent them from probing.
>>>
>>> This logic is also used to
Hi,
Sebastian Reichel writes:
> On Mon, Oct 05, 2015 at 06:41:37PM -0500, Suman Anna wrote:
>> We will gain a user from OMAP remoteproc driver as well (out of tree at
>> the moment, but it does follow the DT phandle and
>> omap_dm_timer_request_by_node semantics). I do not
Hi Felipe,
On 10/05/2015 02:48 PM, Balbi, Felipe wrote:
> We actually want these devices to be created because
> we will be moving timers to drivers/clocksource and
> this will prevent them from probing.
This logic is also used to remove the secure timer from being
registered to the kernel on HS
On 5 October 2015 at 16:45, Tomeu Vizoso wrote:
> Hi,
>
> this is v9 of an attempt to make it easier for devices to remain in
> runtime PM when the system goes to sleep, mainly to reduce the time
> spent resuming devices.
>
> For this, we interpret the absence of all
Hi Felipe,
>>
>> On 10/05/2015 02:48 PM, Balbi, Felipe wrote:
>>> We actually want these devices to be created because
>>> we will be moving timers to drivers/clocksource and
>>> this will prevent them from probing.
>>
>> This logic is also used to remove the secure timer from being
>> registered
Felipe Balbi writes:
> On Wed, Sep 30, 2015 at 11:58:16PM +0200, Arnd Bergmann wrote:
>> On Wednesday 30 September 2015 09:12:09 Felipe Balbi wrote:
>> > On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
>> > > On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
We actually want these devices to be created because
we will be moving timers to drivers/clocksource and
this will prevent them from probing.
Signed-off-by: Felipe Balbi
---
Tony, I wonder if you can get merged as a fix, or do you
prefer receiving it together with my timer series
Hi,
On Mon, Oct 05, 2015 at 06:41:37PM -0500, Suman Anna wrote:
> We will gain a user from OMAP remoteproc driver as well (out of tree at
> the moment, but it does follow the DT phandle and
> omap_dm_timer_request_by_node semantics). I do not think ir-rx51.c is
> converted to DT, and also some of
Timer 12 on DRA7 SoCs is reserved for secure usage on high-secure (HS)
devices. The timer cannot be used by the kernel on HS devices, but is
available on regular general purpose (GP) devices. This is similar to the
behavior on OMAP3 devices, so extend the logic used in commit ad24bde8f102
("ARM:
Add the DT node for Timer12 present on DRA7 family of
SoCs. Timer12 is present in PD_WKUPAON power domain, and
has the same capabilities as the other timers, except for
the fact that it serves as a secure timer on HS devices
and is clocked only from the secure 32K clock.
The node is marked
The omap_dm_timer_set_source() function provides a means for client
users to configure the mux parent for a GPTimer's functional clock.
However, not all timers are configurable (Eg: Timer12 on DRA7 is fed
by an internal 32k oscillator clock, and does not have configurable
parent clocks). So, check
Hi Tony,
This is a revised version of the DRA7 Timer12 support patch series [1].
The series mainly is respun to fix a build issue caused by Patch1 [2]
with omap1_defconfig due to the absence of Common Clock framework for
OMAP1.
Only Patch 1 is modified from the previous series. I have also
Add the hwmod data for GPTimer 12. GPTimer 12 is present in
WKUPAON power domain and is clocked from a secure 32K clock.
GPTimer 12 serves as a secure timer on HS devices, but is
available for kernel on regular GP devices.
The hwmod link is registered only on GP devices. The hwmod data
also
Suman Anna writes:
> Hi Felipe,
>
> On 10/05/2015 02:48 PM, Balbi, Felipe wrote:
>> We actually want these devices to be created because
>> we will be moving timers to drivers/clocksource and
>> this will prevent them from probing.
>
> This logic is also used to remove the secure
* Felipe Balbi [150929 13:48]:
> since now we can reuse __omap_sync32k_timer_init()
> for OMAP3-like devices, we can safely remove
> __omap_gptimer_init().
There are tons of boards out there that need to use the
high frequency ocillator source with gptimer because of the
* Arnd Bergmann [151005 04:08]:
> On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> > * Daniel Lezcano [151001 15:16]:
> > > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > > >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > > >>
On Monday 05 October 2015 04:13:41 Tony Lindgren wrote:
> * Arnd Bergmann [151005 04:08]:
> > On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> > > * Daniel Lezcano [151001 15:16]:
> > > > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > > > >On
* Ben Dooks [150929 06:14]:
> On 25/09/15 06:42, Tero Kristo wrote:
> > On 09/23/2015 08:30 PM, Tony Lindgren wrote:
> >> * Ben Dooks [150923 07:53]:
> >>> On the OMAP AM3517 platform the uart4_ick gets registered
> >>> twice, causing any
* Felipe Balbi [150929 13:48]:
> All devices should have a default status. Ignoring
> the arguments if it should be 'okay' or 'disabled'
> by default, let's set them all the 'disabled' and
> have boards enable 32k counter.
We should not use "disabled" really at all. That means
no
* Tony Lindgren [151005 03:56]:
> * Daniel Lezcano [151001 15:04]:
> > >+ clocks_calc_mult_shift(_mult, _shift,
> > >+ 32768, NSEC_PER_SEC, 12);
> > >+
> > >+ ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
>
On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> * Daniel Lezcano [151001 15:16]:
> > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > >>
> > >>TEGRA folks: the tegra_read_persistent_clock()
On 10/05/2015 01:17 PM, Tony Lindgren wrote:
* Ben Dooks [150929 06:14]:
On 25/09/15 06:42, Tero Kristo wrote:
On 09/23/2015 08:30 PM, Tony Lindgren wrote:
* Ben Dooks [150923 07:53]:
On the OMAP AM3517 platform the uart4_ick gets
* Daniel Lezcano [151001 15:04]:
> >+clocks_calc_mult_shift(_mult, _shift,
> >+32768, NSEC_PER_SEC, 12);
> >+
> >+ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> >+250, 32,
On Monday 05 October 2015 11:44 AM, H. Nikolaus Schaller wrote:
From: Marek Belisko
Code was found at:
https://android.googlesource.com/kernel/tegra/+/a90856a6626d502d42c6e7abccbdf9d730b36270%5E%21/#F1
Signed-off-by: Laxman Dewangan
[Fixed minor
On Sun, Oct 04, 2015 at 06:05:59PM +0200, H. Nikolaus Schaller wrote:
> From: Marek Belisko
>
> Code was found at:
> https://android.googlesource.com/kernel/tegra/+/a90856a6626d502d42c6e7abccbdf9d730b36270%5E%21/#F1
>
> Signed-off-by: Laxman Dewangan
On Monday 05 October 2015 11:44 AM, H. Nikolaus Schaller wrote:
This driver code was found as:
https://android.googlesource.com/kernel/tegra/+/aaabb2e045f31e5a970109ffdaae900dd403d17e/drivers/staging/iio/adc
Fixed various compilation issues and test this driver on omap5 evm.
Signed-off-by:
* Daniel Lezcano [151001 15:16]:
> On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> >>
> >>TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> >>predates the Tegra RTC driver and I
* Tony Lindgren [151005 04:28]:
> * Russell King - ARM Linux [151001 03:07]:
> > On Thu, Oct 01, 2015 at 11:50:00AM +0200, Ulf Hansson wrote:
> > > On 1 October 2015 at 11:33, Russell King - ARM Linux
> > > wrote:
> > > > On Thu,
On Tue, Sep 08, 2015 at 08:44:05PM +0530, Sekhar Nori wrote:
> From: Vignesh R
>
> TIPWMSS is present on TI's DRA7x and
> AM437x SoCs. Enable its usage.
>
> Instead of adding each SoC individually,
> use the more generic ARCH_OMAP2PLUS
> instead.
>
> Signed-off-by: Vignesh R
* Tony Lindgren [151005 07:44]:
> * Tony Lindgren [151005 04:28]:
> > * Russell King - ARM Linux [151001 03:07]:
> > > On Thu, Oct 01, 2015 at 11:50:00AM +0200, Ulf Hansson wrote:
> > > > On 1 October 2015 at 11:33, Russell King - ARM
Am 05.10.2015 um 13:17 schrieb Mark Rutland :
> On Sun, Oct 04, 2015 at 06:05:59PM +0200, H. Nikolaus Schaller wrote:
>> From: Marek Belisko
>>
>> Code was found at:
>>
Hi,
this is v9 of an attempt to make it easier for devices to remain in
runtime PM when the system goes to sleep, mainly to reduce the time
spent resuming devices.
For this, we interpret the absence of all PM callback implementations as
it being safe to do direct_complete, so their ancestors
Adds a function that sets the pointer to dev_pm_domain in struct device
and that warns if the device has already finished probing. The reason
why we want to enforce that is because in the general case that can
cause problems and also that we can simplify code quite a bit if we can
always assume
Hi!
> The kernel's workaround for Errata 430973 consists of a BTAC/BTB
> flush at context switch. This requires the IBE bit being set, which
> should normally be done by the bootloader.
>
> Since the Nokia N900's bootloader is not easily replaceable,
> a pdata quirk enables the IBE bit for the
* Suman Anna [151005 09:47]:
> Tony,
>
> On 10/03/2015 12:29 PM, kbuild test robot wrote:
> > Hi Suman,
> >
> > [auto build test results on v4.3-rc3 -- if it's inappropriate base, please
> > ignore]
> >
> > config: arm-omap1_defconfig (attached as .config)
> > reproduce:
> >
* Felipe Balbi [151005 08:29]:
> On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > * Felipe Balbi [150929 13:48]:
> > > since now we can reuse __omap_sync32k_timer_init()
> > > for OMAP3-like devices, we can safely remove
> > > __omap_gptimer_init().
Tony,
On 10/03/2015 12:29 PM, kbuild test robot wrote:
> Hi Suman,
>
> [auto build test results on v4.3-rc3 -- if it's inappropriate base, please
> ignore]
>
> config: arm-omap1_defconfig (attached as .config)
> reproduce:
> wget
>
On Mon, Oct 05, 2015 at 09:02:25AM -0700, Tony Lindgren wrote:
> * Felipe Balbi [151005 08:29]:
> > On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > > * Felipe Balbi [150929 13:48]:
> > > > since now we can reuse __omap_sync32k_timer_init()
> > > >
On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> * Felipe Balbi [150929 13:48]:
> > since now we can reuse __omap_sync32k_timer_init()
> > for OMAP3-like devices, we can safely remove
> > __omap_gptimer_init().
>
> There are tons of boards out there that need to use
On Mon, Sep 14, 2015 at 03:31:05PM +0300, Peter Ujfalusi wrote:
> From: Misael Lopez Cruz
>
> The L3 throughput can be higher than expected when packed access
> is not enabled. The ratio depends on the number of bytes in a
> transaction and the EMIF interface width.
>
>
* Tony Lindgren [151005 07:57]:
> * Tony Lindgren [151005 07:44]:
> > * Tony Lindgren [151005 04:28]:
> >
> > Based on some tests it seems that the duovero unpaired regulator usage
> > is fixed by reverting:
> >
> > c55d7a055364 ("mmc:
* Felipe Balbi [151005 09:13]:
> On Mon, Oct 05, 2015 at 09:02:25AM -0700, Tony Lindgren wrote:
> > * Felipe Balbi [151005 08:29]:
> > > On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > > > * Felipe Balbi [150929 13:48]:
> > > > >
* Tero Kristo [151005 05:39]:
> On 10/05/2015 01:17 PM, Tony Lindgren wrote:
> >* Ben Dooks [150929 06:14]:
> >>On 25/09/15 06:42, Tero Kristo wrote:
> >>>On 09/23/2015 08:30 PM, Tony Lindgren wrote:
> * Ben Dooks
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