[PATCH 0/4] OMAP: hwmod prcm fixes
Hi Paul Kevin, Here are a couples of fixes related to hwmod and prcm. Tested on PAB board using OMAP4 ES1.0 GP device Patches are based on lo/for-next and are available here: git://dev.omapzoom.org/pub/scm/swarch/linux-omap-adv.git for-next-fixes Regards, Benoit Benoit Cousson (2): OMAP: hwmod: Rename dma_ch to dma_req OMAP: hwmod: Do not disable clocks if hwmod already in idle Liam Girdwood (1): OMAP: hwmod: Fix omap_hwmod_reset wrong state test Rajeev Kulkarni (1): OMAP4: prcm: Fix global warm reset bit position arch/arm/mach-omap2/omap_hwmod.c | 26 ++ arch/arm/mach-omap2/prcm.c |5 +++-- arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++-- 3 files changed, 23 insertions(+), 20 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] OMAP: hwmod: Rename dma_ch to dma_req
The dma request line attribute was named dma channel, which leads
to confusion with the real dma channel definition.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 10 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++--
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cb911d7..8bf19a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1468,7 +1468,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
{
int ret, i;
- ret = oh-mpu_irqs_cnt + oh-sdma_chs_cnt;
+ ret = oh-mpu_irqs_cnt + oh-sdma_reqs_cnt;
for (i = 0; i oh-slaves_cnt; i++)
ret += oh-slaves[i]-addr_cnt;
@@ -1501,10 +1501,10 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh,
struct resource *res)
r++;
}
- for (i = 0; i oh-sdma_chs_cnt; i++) {
- (res + r)-name = (oh-sdma_chs + i)-name;
- (res + r)-start = (oh-sdma_chs + i)-dma_ch;
- (res + r)-end = (oh-sdma_chs + i)-dma_ch;
+ for (i = 0; i oh-sdma_reqs_cnt; i++) {
+ (res + r)-name = (oh-sdma_reqs + i)-name;
+ (res + r)-start = (oh-sdma_reqs + i)-dma_req;
+ (res + r)-end = (oh-sdma_reqs + i)-dma_req;
(res + r)-flags = IORESOURCE_DMA;
r++;
}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index a4e508d..5506d80 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -96,7 +96,7 @@ struct omap_hwmod_irq_info {
/**
* struct omap_hwmod_dma_info - DMA channels used by the hwmod
* @name: name of the DMA channel (module local name)
- * @dma_ch: DMA channel ID
+ * @dma_req: DMA request ID
*
* @name should be something short, e.g., tx or rx. It is for use
* by platform_get_resource_byname(). It is defined locally to the
@@ -104,7 +104,7 @@ struct omap_hwmod_irq_info {
*/
struct omap_hwmod_dma_info {
const char *name;
- u16 dma_ch;
+ u16 dma_req;
};
/**
@@ -410,7 +410,7 @@ struct omap_hwmod_class {
* @class: struct omap_hwmod_class * to the class of this hwmod
* @od: struct omap_device currently associated with this hwmod (internal use)
* @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
- * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
+ * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
* @prcm: PRCM data pertaining to this hwmod
* @main_clk: main clock: OMAP clock name
* @_clk: pointer to the main struct clk (filled in at runtime)
@@ -424,7 +424,7 @@ struct omap_hwmod_class {
* @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
* @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
* @mpu_irqs_cnt: number of @mpu_irqs
- * @sdma_chs_cnt: number of @sdma_chs
+ * @sdma_reqs_cnt: number of @sdma_reqs
* @opt_clks_cnt: number of @opt_clks
* @master_cnt: number of @master entries
* @slaves_cnt: number of @slave entries
@@ -448,7 +448,7 @@ struct omap_hwmod {
struct omap_hwmod_class *class;
struct omap_device *od;
struct omap_hwmod_irq_info *mpu_irqs;
- struct omap_hwmod_dma_info *sdma_chs;
+ struct omap_hwmod_dma_info *sdma_reqs;
union {
struct omap_hwmod_omap2_prcm omap2;
struct omap_hwmod_omap4_prcm omap4;
@@ -468,7 +468,7 @@ struct omap_hwmod {
u8 msuspendmux_shift;
u8 response_lat;
u8 mpu_irqs_cnt;
- u8 sdma_chs_cnt;
+ u8 sdma_reqs_cnt;
u8 opt_clks_cnt;
u8 masters_cnt;
u8 slaves_cnt;
--
1.6.1.3
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[PATCH 2/4] OMAP: hwmod: Do not disable clocks if hwmod already in idle
The disable function was disabling clocks and dependencies
from both enable and idle state. Since idle function is already
disabling both, an enable - idle - disable sequence will
try to disable twice the clocks and thus generate a
Trying disable clock XXX with 0 usecount warning.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8bf19a7..5bb25e3 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -982,9 +982,13 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh-class-sysc)
_sysc_shutdown(oh);
- _del_initiator_dep(oh, mpu_oh);
- /* XXX what about the other system initiators here? DMA, tesla, d2d */
- _disable_clocks(oh);
+
+ /* clocks and deps are already disabled in idle */
+ if (oh-_state == _HWMOD_STATE_ENABLED) {
+ _del_initiator_dep(oh, mpu_oh);
+ /* XXX what about the other system initiators here? dma, dsp */
+ _disable_clocks(oh);
+ }
/* XXX Should this code also force-disable the optional clocks? */
/* XXX mux any associated balls to safe mode */
--
1.6.1.3
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[PATCH 4/4] OMAP4: prcm: Fix global warm reset bit position
From: Rajeev Kulkarni raje...@ti.com OMAP4 platform has different register bits for Warm and Cold Resets. Write one into appropriate bits. Signed-off-by: Rajeev Kulkarni raje...@ti.com Cc: Leed Aguilar leed.agui...@ti.com [b-cous...@ti.com: Change the define with the proper one from omap4 headers] Signed-off-by: Benoit Cousson b-cous...@ti.com --- arch/arm/mach-omap2/prcm.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index c201374..96f4616 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -33,6 +33,7 @@ #include cm.h #include prm.h #include prm-regbits-24xx.h +#include prm-regbits-44xx.h static void __iomem *prm_base; static void __iomem *cm_base; @@ -161,8 +162,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd) prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, OMAP2_RM_RSTCTRL); if (cpu_is_omap44xx()) - prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, -OMAP4_RM_RSTCTRL); + prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK, +prcm_offs, OMAP4_RM_RSTCTRL); } static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg) -- 1.6.1.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] OMAP: hwmod: Fix omap_hwmod_reset wrong state test
From: Liam Girdwood l...@slimlogic.co.uk
The reset function wrongly used the state flag as a bit mask and was trying
to re-enable after a reset.
hwmod is still enabled for the PRCM point of view after a softreset
so there is no need to re-enable.
Remove the state check from omap_hwmod_reset since the _reset
function is checking that as well and in addition can generate
a warning
Signed-off-by: Liam Girdwood l...@slimlogic.co.uk
[b-cous...@ti.com: remove the wrong test, remove the re-enable]
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5bb25e3..100115f 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1434,19 +1434,17 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
*
* Under some conditions, a driver may wish to reset the entire device.
* Called from omap_device code. Returns -EINVAL on error or passes along
- * the return value from _reset()/_enable().
+ * the return value from _reset().
*/
int omap_hwmod_reset(struct omap_hwmod *oh)
{
int r;
- if (!oh || !(oh-_state _HWMOD_STATE_ENABLED))
+ if (!oh)
return -EINVAL;
mutex_lock(omap_hwmod_mutex);
r = _reset(oh);
- if (!r)
- r = _omap_hwmod_enable(oh);
mutex_unlock(omap_hwmod_mutex);
return r;
--
1.6.1.3
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[PATCH 0/3] OMAP: hwmod: Add hardreset and softreset management
Hi Paul Kevin, Here are a reset management series. - The first patch will be removed as soon as we will have the proper OMAP4 support for the prm_xxx accessors. - The second one is adding hardreset support in order to allow syslink driver to manage properly the DSP and IPU processor reset. - The last one is forcing a sofreset after the first init. Some IP might require sofreset after each wakeup from power domain OFF mode. That still needs to be confirm. Tested on PAB board using OMAP4 ES1.0 GP device Patches are based on lo/for-next + for-next-fixes and are available here: git://dev.omapzoom.org/pub/scm/swarch/linux-omap-adv.git pm-wip/hwmods-reset Regards, Benoit Benoit Cousson (3): OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM OMAP: hwmod: Add hardreset management support OMAP: hwmod: Force a softreset during _setup arch/arm/mach-omap2/omap_hwmod.c | 197 -- arch/arm/mach-omap2/prcm.c | 24 +++ arch/arm/plat-omap/include/plat/omap_hwmod.h | 21 +++ arch/arm/plat-omap/include/plat/prcm.h |2 + 4 files changed, 235 insertions(+), 9 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM
Since OMAP4 is using an absolute address, the current PRM accessors
are not useable.
OMAP4 adaptation for these API are currently ongoing, so define temp
version until the proper ones are defined.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/prcm.c | 24
arch/arm/plat-omap/include/plat/prcm.h |2 ++
2 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 96f4616..d4388d3 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -216,6 +216,30 @@ u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
return v;
}
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v = mask;
+ v = __ffs(mask);
+
+ return v;
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v = ~mask;
+ v |= bits;
+ __raw_writel(v, reg);
+
+ return v;
+}
/* Read a register in a CM module */
u32 cm_read_mod_reg(s16 module, u16 idx)
{
diff --git a/arch/arm/plat-omap/include/plat/prcm.h
b/arch/arm/plat-omap/include/plat/prcm.h
index 9fbd914..ab77442 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx);
void prm_write_mod_reg(u32 val, s16 module, u16 idx);
u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
u32 cm_read_mod_reg(s16 module, u16 idx);
void cm_write_mod_reg(u32 val, s16 module, u16 idx);
u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
--
1.6.1.3
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[PATCH 2/3] OMAP: hwmod: Add hardreset management support
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
We do expose as well an hardreset API at hwmod in order to assert / deassert
all the reset individual lines that belong to an hwmod.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two APIs for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one API to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
- de-assert the hardreset line only during enable from disable transition
- assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU01 warm local reset control'
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 180 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h | 21 +++
2 files changed, 201 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 100115f..53b08e3 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -50,6 +50,7 @@
#include plat/powerdomain.h
#include plat/clock.h
#include plat/omap_hwmod.h
+#include plat/prcm.h
#include cm.h
@@ -909,6 +910,15 @@ int _omap_hwmod_enable(struct omap_hwmod *oh)
pr_debug(omap_hwmod: %s: enabling\n, oh-name);
+ /*
+* If an IP contains only one HW reset line, then de-assert it in order
+* to allow to enable the clocks. Otherwise the PRCM will return
+* Intransition status, and the init will failed.
+*/
+ if ((oh-_state == _HWMOD_STATE_INITIALIZED ||
+oh-_state == _HWMOD_STATE_DISABLED) oh-rst_lines_cnt == 1)
+ omap_hwmod_hardreset_deassert(oh, oh-rst_lines[0].name);
+
/* XXX mux balls */
_add_initiator_dep(oh, mpu_oh);
@@ -982,6 +992,12 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh-class-sysc)
_sysc_shutdown(oh);
+ /*
+* If an IP contains only one HW reset line, then assert it
+* before disabling the clocks and shutting down the IP.
+*/
+ if (oh-rst_lines_cnt == 1)
+ omap_hwmod_hardreset_assert(oh, oh-rst_lines[0].name);
/* clocks and deps are already disabled in idle */
if (oh-_state == _HWMOD_STATE_ENABLED) {
@@ -1040,6 +1056,16 @@ static int _setup(struct omap_hwmod *oh, void *data)
oh-_state = _HWMOD_STATE_INITIALIZED;
+ /*
+* In the case of hwmod with hardreset that should not be
+* de-assert at boot time, we have to keep the module
+* initialized, because we cannot enable it properly with the
+* reset asserted. Exit without warning because that behavior is
+* expected.
+*/
+ if ((oh-flags HWMOD_INIT_NO_RESET) oh-rst_lines_cnt == 1)
+ return 0;
+
r = _omap_hwmod_enable(oh);
if (r) {
pr_warning(omap_hwmod: %s: cannot be enabled (%d)\n,
@@ -1450,6 +1476,160 @@ int omap_hwmod_reset(struct omap_hwmod *oh)
return r;
}
+/* offset between the reset control and the reset status registers */
+#define RST_CTRL_ST_OFFSET 4
+
+/**
+ * _lookup_reset - reset the hwmod
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line in the context of this hwmod
+ *
+ * Return the bit position of the reset line that match the
+ * input name. Return -ENOENT if not found.
+ */
+u8 _lookup_reset
[PATCH 3/3] OMAP: hwmod: Force a softreset during _setup
Force the softreset of every IPs during the _setup phase.
IPs that cannot support softreset or that should not
be reset must set the HWMOD_INIT_NO_RESET flag in the
hwmod struct.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 17 -
1 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 53b08e3..91ad9c6 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -856,8 +856,8 @@ static int _reset(struct omap_hwmod *oh)
/* clocks must be on for this operation */
if (oh-_state != _HWMOD_STATE_ENABLED) {
- WARN(1, omap_hwmod: %s: reset can only be entered from
-enabled state\n, oh-name);
+ pr_warning(omap_hwmod: %s: reset can only be entered from
+ enabled state\n, oh-name);
return -EINVAL;
}
@@ -874,8 +874,8 @@ static int _reset(struct omap_hwmod *oh)
MAX_MODULE_RESET_WAIT, c);
if (c == MAX_MODULE_RESET_WAIT)
- WARN(1, omap_hwmod: %s: failed to reset in %d usec\n,
-oh-name, MAX_MODULE_RESET_WAIT);
+ pr_warning(omap_hwmod: %s: failed to reset in %d usec\n,
+ oh-name, MAX_MODULE_RESET_WAIT);
else
pr_debug(omap_hwmod: %s: reset in %d usec\n, oh-name, c);
@@ -1074,12 +1074,11 @@ static int _setup(struct omap_hwmod *oh, void *data)
}
if (!(oh-flags HWMOD_INIT_NO_RESET)) {
+ _reset(oh);
/*
-* XXX Do the OCP_SYSCONFIG bits need to be
-* reprogrammed after a reset? If not, then this can
-* be removed. If they do, then probably the
-* _omap_hwmod_enable() function should be split to avoid the
-* rewrite of the OCP_SYSCONFIG register.
+* OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
+* The _omap_hwmod_enable() function should be split to
+* avoid the rewrite of the OCP_SYSCONFIG register.
*/
if (oh-class-sysc) {
_update_sysc_cache(oh);
--
1.6.1.3
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[RFC PATCH] OMAP: hwmod: Add debugfs support for omap_hwmod
First quick dirty attempt to add some debugfs hooks in order
to ease the debug of hwmods.
I send it just in case someone else find that useful.
It is based on lo/for-next + for-next-fixes + pm-wip/hwmods-reset and is
available here:
git://dev.omapzoom.org/pub/scm/swarch/linux-omap-adv.git pm-wip/hwmods-debugfs
Benoit
Allow to dump each hwmods internal state and change manually
the module state and the reset state if applicable.
Usage:
- Mount the debugfs filesystem
mount -t debugfs none /sys/kernel/debug
- dump a individual hwmod status:
cat /sys/kernel/debug/hwmods/mcbsp1/summary
mcbsp1
state:idle:5
class:mcbsp
flags:0x
address: 0x40122000-0x401220ff (mpu)
address: 0x49022000-0x490220ff
clock:mcbsp1_fck
irqs(1):
(null):49
dmas(2):
tx:33
rx:34
- change the state of an hwmod:
echo enable /sys/kernel/debug/hwmods/ipu/state
echo idle /sys/kernel/debug/hwmods/ipu/state
echo disable /sys/kernel/debug/hwmods/ipu/state
- assert an hardreset line
echo 1 /sys/kernel/debug/hwmods/ipu/resets/mmu_cache
- deassert a hardreset line
echo 0 /sys/kernel/debug/hwmods/ipu/resets/mmu_cache
- trigger a softreset in the module
echo reset /sys/kernel/debug/hwmods/XXX/state
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/Makefile |4 +-
arch/arm/mach-omap2/omap_hwmod_debug.c | 387 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h |9 +-
3 files changed, 398 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap_hwmod_debug.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 63b2d88..2f2b25b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -17,7 +17,9 @@ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common)
$(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) $(hwmod-common)
-obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
+obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
+obj-$(CONFIG_DEBUG_FS) += omap_hwmod_debug.o
+
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
diff --git a/arch/arm/mach-omap2/omap_hwmod_debug.c
b/arch/arm/mach-omap2/omap_hwmod_debug.c
new file mode 100644
index 000..3f48977
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_debug.c
@@ -0,0 +1,387 @@
+/*
+ * omap_hwmod debugfs implementation
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ *
+ * Benoit Cousson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Expose a debufs interface in order to check and modify hwmod state
+ * The current directory structure is:
+ *
+ * hwmods
+ * +-hwmod_mpu
+ * +-hwmod_dsp
+ * .
+ * .
+ * +-hwmod_xxx : hwmod node
+ * +-state: internal state (RO)
+ * +-summary : global view of hwmod definition
+ * +-resets : reset lines
+ *+-rst1 : reset state / control (RW)
+ *+-rst2 :
+ *
+ * To do:
+ * - Add irq / dma dump
+ * - Add clock dump
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/debugfs.h
+#include linux/fs.h
+#include linux/uaccess.h
+#include linux/seq_file.h
+#include linux/slab.h
+
+#include plat/clock.h
+#include plat/common.h
+#include plat/omap_hwmod.h
+
+
+/*
+ * DEBUGFS helper macros
+ *
+ * This code is already used in several omap drivers, so eventually it will be
+ * good to move that to plat-omap and share the same code.
+ */
+
+#define DEFINE_DEBUGFS_SHOW(__fops, __show)\
+static int __fops ## _open(struct inode *inode, struct file *file) \
+{ \
+ return single_open(file, __show, inode-i_private); \
+} \
+static const struct file_operations __fops = { \
+ .owner = THIS_MODULE, \
+ .open = __fops ## _open, \
+ .read = seq_read, \
+ .llseek = seq_lseek,\
+ .release= single_release, \
+};
+
+/*
+ * Aggregate reset information in a specific structure, because the reset
+ * node does not contain any link to the parent hwmod structure
+ */
+struct reset_info {
+ struct omap_hwmod *oh;
+ const char *name;
+ u8 rst_shift;
+};
+
+/* internal hwmod states */
+static const
[PATCH v3 0/7] OMAP: hwmod: Full data set for OMAP4430 ES1 ES2
Hi Kevin Paul, Here is the OMAP4430 ES1 ES2 hwmod data v3 series. Please note that there is no difference between the ES1 ES2 wrt hwmod. This series is re-organised in order to allow initial submission for upstream with minimal interconnect data set + mpu. Further data will be sent along with the driver once adapted to hwmod. A first patch is done for the TIMER IP as an example. Patches are based on lo/for-next + for-next-fixes + pm-wip/hwmods-reset + pm-wip/hwmods-debugfs and are available here: git://dev.omapzoom.org/pub/scm/swarch/linux-omap-adv.git pm-wip/hwmods-omap4 Tested on OMAP4430 ES1.0 GP device using PAB board. Thanks, Benoit v1 http://marc.info/?l=linux-omapm=127324843814741w=2 v2 http://www.spinics.net/lists/linux-omap/msg29622.html - [PATCH 3/6] OMAP4: hwmod: Enable omap_device build for OMAP4 Removed some old defines for OMAP_32KSYNCT_BASE that has nothing to do in that file and was already removed by Tony. v3 - Re-organize the data for initial submission - Fix and align clock name with the hwmod - Add hardreset support - Add DSS sub-modules - Add mpu_bus for internal access from mpu to mpu subsystem - Fix interconnect wrong class name Benoit Cousson (7): OMAP4: hwmod: Add initial data for OMAP4430 ES1 ES2 OMAP4: clock: Fix clock names and align with hwmod names OMAP4: pm: Change l3_main to l3_main_1 during bus device init OMAP4: hwmod: Add TIMER data for OMAP4430 ES1 ES2 OMAP4: hwmod: Add remaining hwmods data for OMAP4430 ES1 ES2 OMAP: hwmod: Temporary prevent reset during _setup for GPIOs OMAP: hwmod: Temporary prevent reset during _setup for I2Cs arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/clock44xx_data.c | 715 ++-- arch/arm/mach-omap2/io.c |7 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 5801 ++ arch/arm/mach-omap2/pm.c |5 +- arch/arm/plat-omap/Makefile |2 +- arch/arm/plat-omap/include/plat/omap_hwmod.h |1 + 7 files changed, 6147 insertions(+), 385 deletions(-) create mode 100644 arch/arm/mach-omap2/omap_hwmod_44xx_data.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 1/7] OMAP4: hwmod: Add initial data for OMAP4430 ES1 ES2
The current version contains only the interconnects and the
mpu hwmods.
The remaining hwmods will be introduced by further patches on
top of this one.
- enable as well omap_hwmod.c build for OMAP4 Soc
Please not that this file uses the new naming convention for
naming HW IPs. This convention will be backported soon for previous
OMAP2 3 data files.
new nametrm name
- ---
counter_32k synctimer_32k
l3_main l3
timerX gptimerX / dmtimerX
mmcXmmchsX / sdmmcX
dma_system sdma
smartreflex_X sr_X / sr?
usb_host_fs usbfshost
usb_otg_hs hsusbotg
usb_tll_hs usbtllhs_config
wd_timerX wdtimerX
ipu cortexm3 / ducati
dsp c6x / tesla
iva ivahd / iva2.2
kbd kbdocp / keyboard
mailbox system_mailbox
mpu cortexa9 / chiron
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/io.c |7 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 482 ++
arch/arm/plat-omap/Makefile |2 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 +
5 files changed, 489 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/mach-omap2/omap_hwmod_44xx_data.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2f2b25b..cc0df1b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -88,6 +88,7 @@ obj-$(CONFIG_ARCH_OMAP2430) += opp2430_data.o
obj-$(CONFIG_ARCH_OMAP2420)+= omap_hwmod_2420_data.o
obj-$(CONFIG_ARCH_OMAP2430)+= omap_hwmod_2430_data.o
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
+obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
# EMU peripherals
obj-$(CONFIG_OMAP3_EMU)+= emu.o
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index b9ea70b..490d870 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -323,6 +323,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params
*sdrc_cs0,
omap2430_hwmod_init();
else if (cpu_is_omap34xx())
omap3xxx_hwmod_init();
+ else if (cpu_is_omap44xx())
+ omap44xx_hwmod_init();
+
/* The OPP tables have to be registered before a clk init */
omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
@@ -342,9 +345,7 @@ void __init omap2_init_common_hw(struct omap_sdrc_params
*sdrc_cs0,
#ifndef CONFIG_PM_RUNTIME
skip_setup_idle = 1;
#endif
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) /* FIXME: OMAP4 */
- omap_hwmod_late_init(skip_setup_idle);
-
+ omap_hwmod_late_init(skip_setup_idle);
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
_omap2_init_reprogram_sdrc();
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
new file mode 100644
index 000..e20b0ee
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -0,0 +1,482 @@
+/*
+ * Hardware modules present on the OMAP44xx chips
+ *
+ * Copyright (C) 2009-2010 Texas Instruments, Inc.
+ * Copyright (C) 2009-2010 Nokia Corporation
+ *
+ * Paul Walmsley
+ * Benoit Cousson
+ *
+ * This file is automatically generated from the OMAP hardware databases.
+ * We respectfully ask that any modifications to this file be coordinated
+ * with the public linux-omap@vger.kernel.org mailing list and the
+ * authors above to ensure that the autogeneration scripts are kept
+ * up-to-date with the file contents.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/io.h
+
+#include plat/omap_hwmod.h
+#include plat/cpu.h
+
+#include omap_hwmod_common_data.h
+
+#include cm.h
+#include prm-regbits-44xx.h
+
+/* Base offset for all OMAP4 interrupts external to MPUSS */
+#define OMAP44XX_IRQ_GIC_START 32
+
+/* Base offset for all OMAP4 dma requests */
+#define OMAP44XX_DMA_REQ_START 1
+
+/* Backward references (IPs with Bus Master capability) */
+static struct omap_hwmod omap44xx_dmm_hwmod;
+static struct omap_hwmod omap44xx_emif_fw_hwmod;
+static struct omap_hwmod omap44xx_l3_instr_hwmod;
+static struct omap_hwmod omap44xx_l3_main_1_hwmod;
+static struct omap_hwmod omap44xx_l3_main_2_hwmod;
+static struct omap_hwmod omap44xx_l3_main_3_hwmod;
+static struct omap_hwmod omap44xx_l4_abe_hwmod;
+static struct omap_hwmod omap44xx_l4_cfg_hwmod;
+static struct omap_hwmod omap44xx_l4_per_hwmod;
+static struct omap_hwmod omap44xx_l4_wkup_hwmod;
+static struct omap_hwmod
[PATCH v3 3/7] OMAP4: pm: Change l3_main to l3_main_1 during bus device init
The OMAP4 L3 interconnect is split in 3 part for power saving reason.
Because of that there is no l3_main like on OMAP2 3 but 3 differentes
l3_main_X instances.
In the case of OMAP4, query only the l3_main_1 part. The clock and
voltage are shared across the 3 instances.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/pm.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 68f9f2e..89e8125 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -70,7 +70,10 @@ static void omap2_init_processor_devices(void)
{
_init_omap_device(mpu, mpu_dev);
_init_omap_device(iva, dsp_dev);
- _init_omap_device(l3_main, l3_dev);
+ if (cpu_is_omap44xx())
+ _init_omap_device(l3_main_1, l3_dev);
+ else
+ _init_omap_device(l3_main, l3_dev);
}
static int __init omap2_common_pm_init(void)
--
1.6.1.3
--
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[PATCH v3 2/7] OMAP4: clock: Fix clock names and align with hwmod names
The OMAP4 hwmod data introduced the new naming convention for TI
IPs (See patch OMAP4: hwmod: Add partial hwmod support for OMAP4430 ES1.0)
The leaf clock names are using the same IP name and thus must be
modified to match the clock populated in the hwmod data.
- Fix some leaf clocks nodes that were using a _iclk instead of the _fclk
prefix.
- Fix some wrong interface clock name for master IPs connected to
interconnect.
Please not that due to the fact that nodes are sorted by name, the name
change will introduce a quite ugly diff a little bit hard to follow.
Timers clock con_id is still using the old gptX_fck name until the
gptimer driver is updated to omap_device framework.
Timers entries in hwmods DB are still disabled until the migration
if timer to platform_driver + omap_hwmod.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 715 --
1 files changed, 335 insertions(+), 380 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index e10db7a..a0e369e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -22,7 +22,6 @@
#include linux/kernel.h
#include linux/list.h
#include linux/clk.h
-
#include plat/control.h
#include plat/clkdev_omap.h
@@ -914,6 +913,7 @@ static struct clk usb_hs_clk_div_ck = {
static struct dpll_data dpll_usb_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_USB,
.clk_bypass = usb_hs_clk_div_ck,
+ .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
.clk_ref= dpll_sys_ref_clk,
.control_reg= OMAP4430_CM_CLKMODE_DPLL_USB,
.modes = (1 DPLL_LOW_POWER_BYPASS) | (1 DPLL_LOCKED),
@@ -927,7 +927,6 @@ static struct dpll_data dpll_usb_dd = {
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
.max_divider= OMAP4430_MAX_DPLL_DIV,
.min_divider= 1,
- .flags = DPLL_J_TYPE | DPLL_NO_DCO_SEL
};
@@ -1284,16 +1283,6 @@ static struct clk aess_fck = {
.recalc = followparent_recalc,
};
-static struct clk cust_efuse_fck = {
- .name = cust_efuse_fck,
- .ops= clkops_omap2_dflt,
- .enable_reg = OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL,
- .enable_bit = OMAP4430_MODULEMODE_SWCTRL,
- .clkdm_name = l4_cefuse_clkdm,
- .parent = sys_clkin_ck,
- .recalc = followparent_recalc,
-};
-
static struct clk des3des_fck = {
.name = des3des_fck,
.ops= clkops_omap2_dflt,
@@ -1344,6 +1333,16 @@ static struct clk dmic_fck = {
.clkdm_name = abe_clkdm,
};
+static struct clk dsp_fck = {
+ .name = dsp_fck,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
+ .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
+ .clkdm_name = tesla_clkdm,
+ .parent = dpll_iva_m4_ck,
+ .recalc = followparent_recalc,
+};
+
static struct clk dss_fck = {
.name = dss_fck,
.ops= clkops_omap2_dflt,
@@ -1354,18 +1353,18 @@ static struct clk dss_fck = {
.recalc = followparent_recalc,
};
-static struct clk ducati_ick = {
- .name = ducati_ick,
+static struct clk efuse_ctrl_cust_fck = {
+ .name = efuse_ctrl_cust_fck,
.ops= clkops_omap2_dflt,
- .enable_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL,
- .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
- .clkdm_name = ducati_clkdm,
- .parent = ducati_clk_mux_ck,
+ .enable_reg = OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL,
+ .enable_bit = OMAP4430_MODULEMODE_SWCTRL,
+ .clkdm_name = l4_cefuse_clkdm,
+ .parent = sys_clkin_ck,
.recalc = followparent_recalc,
};
-static struct clk emif1_ick = {
- .name = emif1_ick,
+static struct clk emif1_fck = {
+ .name = emif1_fck,
.ops= clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
@@ -1375,8 +1374,8 @@ static struct clk emif1_ick = {
.recalc = followparent_recalc,
};
-static struct clk emif2_ick = {
- .name = emif2_ick,
+static struct clk emif2_fck = {
+ .name = emif2_fck,
.ops= clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
@@ -1407,42 +1406,14 @@ static struct clk fdif_fck = {
.clkdm_name = iss_clkdm,
};
-static const struct clksel per_sgx_fclk_div[] = {
- { .parent = dpll_per_m2x2_ck, .rates = div3_1to4_rates },
- { .parent = NULL },
-};
-
-static struct clk
[PATCH v3 4/7] OMAP4: hwmod: Add TIMER data for OMAP4430 ES1 ES2
Add the data for the 11 timers IPs.
OMAP4 contains two differents IP variants for the timers:
- 8 x regular timer (3, 4, 5, 6, 7, 8, 9 11)
- 3 x 1ms timer (1, 2 10)
The regular timers registers programming model was changed due to the
adaptation to the new IP interface. Unfortunately the 1ms version
still use the previous programming model. The driver will have
to take care of theses differences.
Please note that the capability and the partitioning is also
different depending of the instance.
- timer 1 is inside the wakeup domain
- timers 5, 6, 7 8 are inside in the ABE (audio backend)
- timers 2, 3, 4, 9, 10 11 are inside the PER power domain
The timer was previously named gptimerX or dmtimerX, it is
now simply named timerX.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 619
1 files changed, 619 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..e6aeb57 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -452,6 +452,613 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'timer' class
+ * general purpose timer module with accurate 1ms tick
+ * This class contains several variants: ['timer_1ms', 'timer']
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
+ SYSS_MISSING),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
+ .name = timer_1ms,
+ .sysc = omap44xx_timer_1ms_sysc,
+};
+
+static struct omap_hwmod_class_sysconfig omap44xx_timer_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
+ SYSC_HAS_SOFTRESET | SYSS_MISSING),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
+ .name = timer,
+ .sysc = omap44xx_timer_sysc,
+};
+
+/* timer1 */
+static struct omap_hwmod omap44xx_timer1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
+ { .irq = 37 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
+ {
+ .pa_start = 0x4a318000,
+ .pa_end = 0x4a31807f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_wkup - timer1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
+ .master = omap44xx_l4_wkup_hwmod,
+ .slave = omap44xx_timer1_hwmod,
+ .clk= l4_wkup_clk_mux_ck,
+ .addr = omap44xx_timer1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* timer1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = {
+ omap44xx_l4_wkup__timer1,
+};
+
+static struct omap_hwmod omap44xx_timer1_hwmod = {
+ .name = timer1,
+ .class = omap44xx_timer_1ms_hwmod_class,
+ .mpu_irqs = omap44xx_timer1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs),
+ .main_clk = timer1_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_timer1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_timer1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* timer2 */
+static struct omap_hwmod omap44xx_timer2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
+ { .irq = 38 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
+ {
+ .pa_start = 0x48032000,
+ .pa_end = 0x4803207f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per - timer2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
+ .master = omap44xx_l4_per_hwmod,
+ .slave = omap44xx_timer2_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap44xx_timer2_addrs,
+ .addr_cnt = ARRAY_SIZE
[PATCH v3 7/7] OMAP: hwmod: Temporary prevent reset during _setup for I2Cs
For some reason, I2C 1, 2, 3 and 4 does not return the resetdone
status after a softreset.
Prevent the softreset until the root cause is found.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 5d440d5..9736a49 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2268,6 +2268,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] =
{
static struct omap_hwmod omap44xx_i2c1_hwmod = {
.name = i2c1,
.class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c1_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
.sdma_reqs = omap44xx_i2c1_sdma_reqs,
@@ -2320,6 +2321,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] =
{
static struct omap_hwmod omap44xx_i2c2_hwmod = {
.name = i2c2,
.class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
.sdma_reqs = omap44xx_i2c2_sdma_reqs,
@@ -2372,6 +2374,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] =
{
static struct omap_hwmod omap44xx_i2c3_hwmod = {
.name = i2c3,
.class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c3_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
.sdma_reqs = omap44xx_i2c3_sdma_reqs,
@@ -2424,6 +2427,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] =
{
static struct omap_hwmod omap44xx_i2c4_hwmod = {
.name = i2c4,
.class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
.mpu_irqs = omap44xx_i2c4_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
.sdma_reqs = omap44xx_i2c4_sdma_reqs,
--
1.6.1.3
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[PATCH] OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs
In OMAP3 a specific SYSSTATUS register was used to get the softreset status.
Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
use the SYSC softreset bit to provide the status.
Other cases might exist:
- Some IPs like McBSP does have a softreset control but no reset status.
- Some IPs that represent subsystem, like the DSS, can contains
a reset status without softreset control. The status is the aggregation
of all the sub modules reset status.
- Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model
and replace the previous SYSS_MISSING, that was used to flag IP with
softreset control but without the SYSSTATUS register, with a specific
SYSS_HAS_RESET_STATUS flag.
- MCSPI and MMC contains both programming models, so the legacy one
will be prevented by removing the syss offset field that become useless.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 22 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |3 ++-
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 4309107..4819a49 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -997,6 +997,12 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
* enabled for this to work. Returns -EINVAL if the hwmod cannot be
* reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
* the module did not reset in time, or 0 upon success.
+ *
+ * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
+ * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
+ * use the SYSCONFIG softreset bit to provide the status.
+ *
+ * Note that some IP like McBSP does have a reset control but no reset status.
*/
static int _reset(struct omap_hwmod *oh)
{
@@ -1005,8 +1011,7 @@ static int _reset(struct omap_hwmod *oh)
int ret = 0;
if (!oh-class-sysc ||
- !(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
- (oh-class-sysc-sysc_flags SYSS_MISSING))
+ !(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET))
return -EINVAL;
/* clocks must be on for this operation */
@@ -1028,9 +1033,16 @@ static int _reset(struct omap_hwmod *oh)
goto dis_opt_clks;
_write_sysconfig(v, oh);
- omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
- SYSS_RESETDONE_MASK),
- MAX_MODULE_SOFTRESET_WAIT, c);
+ if (oh-class-sysc-sysc_flags SYSS_HAS_RESET_STATUS)
+ omap_test_timeout((omap_hwmod_readl(oh,
+ oh-class-sysc-syss_offs)
+ SYSS_RESETDONE_MASK),
+ MAX_MODULE_SOFTRESET_WAIT, c);
+ else if (oh-class-sysc-sysc_flags SYSC_HAS_RESET_STATUS)
+ omap_test_timeout(!(omap_hwmod_readl(oh,
+oh-class-sysc-sysc_offs)
+ SYSC_TYPE2_SOFTRESET_MASK),
+ MAX_MODULE_SOFTRESET_WAIT, c);
if (c == MAX_MODULE_SOFTRESET_WAIT)
pr_warning(omap_hwmod: %s: softreset failed (waited %d
usec)\n,
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 878f919..ee53758 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -251,8 +251,9 @@ struct omap_hwmod_ocp_if {
#define SYSC_HAS_CLOCKACTIVITY (1 4)
#define SYSC_HAS_SIDLEMODE (1 5)
#define SYSC_HAS_MIDLEMODE (1 6)
-#define SYSS_MISSING (1 7)
+#define SYSS_HAS_RESET_STATUS (1 7)
#define SYSC_NO_CACHE (1 8) /* XXX SW flag, belongs elsewhere */
+#define SYSC_HAS_RESET_STATUS (1 9)
/* omap_hwmod_sysconfig.clockact flags */
#define CLOCKACT_TEST_BOTH 0x0
--
1.6.0.4
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[PATCH] OMAP: hwmod: Fix softreset for modules with optional clocks
Some modules (like GPIO, DSS...) require optionals clock to be enabled
in order to complete the sofreset properly.
Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks
to be enabled before reset. Disabled them once the reset is done.
TODO:
For the moment it is very hard to understand from the HW spec, which
optional clock is needed and which one is not. So the current approach
will enable all the optional clocks.
Paul proposed a much finer approach that will allow to tag only the needed
clock in the optional clock table. This might be doable as soon as we have
a clear understanding of these dependencies.
Reported-by: Partha Basak p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 51 +++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |5 +++
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8c27923..4309107 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -546,6 +546,36 @@ static int _disable_clocks(struct omap_hwmod *oh)
return 0;
}
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: enabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: enable %s:%s\n, oc-role,
+ oc-_clk-name);
+ clk_enable(oc-_clk);
+ }
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: disabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: disable %s:%s\n, oc-role,
+ oc-_clk-name);
+ clk_disable(oc-_clk);
+ }
+}
+
/**
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
* @oh: struct omap_hwmod *
@@ -970,8 +1000,9 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
*/
static int _reset(struct omap_hwmod *oh)
{
- u32 r, v;
+ u32 v;
int c = 0;
+ int ret = 0;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
@@ -985,12 +1016,16 @@ static int _reset(struct omap_hwmod *oh)
return -EINVAL;
}
+ /* For some modules, all optionnal clocks need to be enabled as well */
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _enable_optional_clocks(oh);
+
pr_debug(omap_hwmod: %s: resetting\n, oh-name);
v = oh-_sysc_cache;
- r = _set_softreset(oh, v);
- if (r)
- return r;
+ ret = _set_softreset(oh, v);
+ if (ret)
+ goto dis_opt_clks;
_write_sysconfig(v, oh);
omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
@@ -1008,7 +1043,13 @@ static int _reset(struct omap_hwmod *oh)
* _wait_target_ready() or _reset()
*/
- return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+ ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+dis_opt_clks:
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _disable_optional_clocks(oh);
+
+ return ret;
}
/**
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 7fde44d..878f919 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -368,6 +368,10 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
* HWMOD_NO_IDLEST : this module does not have idle status - this is the case
* only for few initiator modules on OMAP2 3.
+ * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
+ * This is needed for devices like DSS that require optional clocks enabled
+ * in order to complete the reset. Optional clocks will be disabled
+ * again after the reset.
*/
#define HWMOD_SWSUP_SIDLE (1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -376,6 +380,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_OCP_AUTOIDLE (1 4)
#define HWMOD_SET_DEFAULT_CLOCKACT (1 5)
#define HWMOD_NO_IDLEST(1 6)
+#define HWMOD_CONTROL_OPT_CLKS_IN_RESET(1 7)
/*
* omap_hwmod._int_flags definitions
--
1.6.0.4
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[PATCH] OMAP: hwmod: softreset fixes with opt clocks
Hi Paul, Here are some fixes for the softreset issues that were highlighted on some IPs like GPIO or DSS. For the moment they are still based on your previous series: git://git.pwsan.com/linux-2.6 hwmod_hardreset_dev If you are OK with these, I'll rebase that on top of your latest submission to l-o / linux-arm-kernel. Thanks, Benoit Benoit Cousson (2): OMAP: hwmod: Fix softreset for modules with optional clocks OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs arch/arm/mach-omap2/omap_hwmod.c | 73 ++ arch/arm/plat-omap/include/plat/omap_hwmod.h |8 +++- 2 files changed, 70 insertions(+), 11 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP: hwmod: Handle opt clocks node using clk_add_alias
From: Basak, Partha p-bas...@ti.com
For every optional clock present per hwmod per omap-device, this function
adds an entry in the clocks list of the form dev-id=dev_name, con-id=role,
if an entry is already present in the list of the form dev-id=NULL,
con-id=role.
The function is called from within the framework inside omap_device_build_ss(),
after omap_device_register.
This allows drivers to get a pointer to its optional clocks based on its role
by calling clk_get(dev*, role).
Link to discussions related to this patch:
http://www.spinics.net/lists/linux-omap/msg34809.html
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/omap_device.c | 39 +-
1 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index d2b1609..d876cec 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -82,6 +82,7 @@
#include linux/slab.h
#include linux/err.h
#include linux/io.h
+#include linux/clk.h
#include plat/omap_device.h
#include plat/omap_hwmod.h
@@ -243,6 +244,40 @@ static inline struct omap_device *_find_by_pdev(struct
platform_device *pdev)
return container_of(pdev, struct omap_device, pdev);
}
+/**
+ * _add_optional_clock_alias - Add clock alias for hwmod optional clocks
+ * @od: struct omap_device *od
+ *
+ * For every optional clock present per hwmod per omap_device, this function
+ * adds an entry in the clocks list of the form dev-id=dev_name, con-id=role
+ * if an entry is already present in it with the form dev-id=NULL,
con-id=role
+ *
+ * The function is called from inside omap_device_build_ss(), after
+ * omap_device_register.
+ *
+ * This allows drivers to get a pointer to its optional clocks based on its
role
+ * by calling clk_get(dev*, role).
+ */
+static void _add_optional_clock_alias(struct omap_device *od,
+ struct omap_hwmod *oh)
+{
+ int i;
+ struct omap_hwmod_opt_clk *oc;
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++) {
+ int ret;
+
+ if (!oc-_clk || !IS_ERR(clk_get(od-pdev.dev, oc-role)))
+ return;
+
+ ret = clk_add_alias(oc-role, dev_name(od-pdev.dev),
+ (char *)oc-clk, NULL);
+ if (ret)
+ pr_err(omap_device: clk_add_alias for %s failed\n,
+ oc-role);
+ }
+}
+
/* Public functions for use by core code */
@@ -421,8 +456,10 @@ struct omap_device *omap_device_build_ss(const char
*pdev_name, int pdev_id,
else
ret = omap_device_register(od);
- for (i = 0; i oh_cnt; i++)
+ for (i = 0; i oh_cnt; i++) {
hwmods[i]-od = od;
+ _add_optional_clock_alias(od, hwmods[i]);
+ }
if (ret)
goto odbs_exit4;
--
1.6.0.4
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[PATCH] OMAP4: clock: Fix missing optional clocks
Hi Paul, The previous OMAP4 clock data did not contain the nodes to allow the modules to enable the proper bit in the CLKCTRL register. This patch is based on kevin/pm-wip/hwmods-omap4 rebased on top of your hwmod_hardreset_dev branch + my reset-fixes series + Partha's patch... ...and that's all. This is also available here: git://gitorious.org/omap-pm/linux.git pm-wip/hwmods-clocks The pm-wip/hwmods-omap4-full will be then rebased on this branch. Please note that the diff is pretty bad for the clock table. It looks like everything has changed. I don't know if there is a way to have a better diff with git. Thanks, Benoit Benoit Cousson (1): OMAP4: clock: Add optional clock nodes arch/arm/mach-omap2/clock44xx_data.c | 893 -- 1 files changed, 625 insertions(+), 268 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP4: clocks: Fix ES2 clock issues
- usim optional clock are its parent had the same name, rename the parent
usim_fclk - usim_ck
- OPTFCLKEN_CLK32K is not handled anymore by the USBPHYOCP2SCP module in ES2
Create a new clock that belongs to CM_ALWON_USBPHY_CLKCTRL register
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 88 +-
1 files changed, 55 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index d612e55..edf2c28 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2033,23 +2033,23 @@ static struct clk mmc5_fck = {
.recalc = followparent_recalc,
};
-static struct clk ocp2scp_usb_phy_clk32k = {
- .name = ocp2scp_usb_phy_clk32k,
+static struct clk ocp2scp_usb_phy_phy_48m = {
+ .name = ocp2scp_usb_phy_phy_48m,
.ops= clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
- .enable_bit = OMAP4430_OPTFCLKEN_CLK32K_SHIFT,
+ .enable_bit = OMAP4430_OPTFCLKEN_PHY_48M_SHIFT,
.clkdm_name = l3_init_clkdm,
- .parent = sys_32k_ck,
+ .parent = func_48m_fclk,
.recalc = followparent_recalc,
};
-static struct clk ocp2scp_usb_phy_phy_48m = {
- .name = ocp2scp_usb_phy_phy_48m,
+static struct clk ocp2scp_usb_phy_ick = {
+ .name = ocp2scp_usb_phy_ick,
.ops= clkops_omap2_dflt,
.enable_reg = OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL,
- .enable_bit = OMAP4430_OPTFCLKEN_PHY_48M_SHIFT,
+ .enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = l3_init_clkdm,
- .parent = func_48m_fclk,
+ .parent = l4_div_ck,
.recalc = followparent_recalc,
};
@@ -2595,6 +2595,16 @@ static struct clk usb_otg_hs_ick = {
.recalc = followparent_recalc,
};
+static struct clk usb_phy_cm_clk32k = {
+ .name = usb_phy_cm_clk32k,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_ALWON_USBPHY_CLKCTRL,
+ .enable_bit = OMAP4430_OPTFCLKEN_CLK32K_SHIFT,
+ .clkdm_name = l4_ao_clkdm,
+ .parent = sys_32k_ck,
+ .recalc = followparent_recalc,
+};
+
static struct clk usb_tll_hs_usb_ch2_clk = {
.name = usb_tll_hs_usb_ch2_clk,
.ops= clkops_omap2_dflt,
@@ -2635,6 +2645,39 @@ static struct clk usb_tll_hs_ick = {
.recalc = followparent_recalc,
};
+static const struct clksel_rate div2_14to18_rates[] = {
+ { .div = 14, .val = 0, .flags = RATE_IN_4430 },
+ { .div = 18, .val = 1, .flags = RATE_IN_4430 },
+ { .div = 0 },
+};
+
+static const struct clksel usim_fclk_div[] = {
+ { .parent = dpll_per_m4_ck, .rates = div2_14to18_rates },
+ { .parent = NULL },
+};
+
+static struct clk usim_ck = {
+ .name = usim_ck,
+ .parent = dpll_per_m4_ck,
+ .clksel = usim_fclk_div,
+ .clksel_reg = OMAP4430_CM_WKUP_USIM_CLKCTRL,
+ .clksel_mask= OMAP4430_CLKSEL_DIV_MASK,
+ .ops= clkops_null,
+ .recalc = omap2_clksel_recalc,
+ .round_rate = omap2_clksel_round_rate,
+ .set_rate = omap2_clksel_set_rate,
+};
+
+static struct clk usim_fclk = {
+ .name = usim_fclk,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_WKUP_USIM_CLKCTRL,
+ .enable_bit = OMAP4430_OPTFCLKEN_FCLK_SHIFT,
+ .clkdm_name = l4_wkup_clkdm,
+ .parent = usim_ck,
+ .recalc = followparent_recalc,
+};
+
static struct clk usim_fck = {
.name = usim_fck,
.ops= clkops_omap2_dflt,
@@ -2700,29 +2743,6 @@ static struct clk trace_clk_div_ck = {
.set_rate = omap2_clksel_set_rate,
};
-static const struct clksel_rate div2_14to18_rates[] = {
- { .div = 14, .val = 0, .flags = RATE_IN_4430 },
- { .div = 18, .val = 1, .flags = RATE_IN_4430 },
- { .div = 0 },
-};
-
-static const struct clksel usim_fclk_div[] = {
- { .parent = dpll_per_m4_ck, .rates = div2_14to18_rates },
- { .parent = NULL },
-};
-
-static struct clk usim_fclk = {
- .name = usim_fclk,
- .parent = dpll_per_m4_ck,
- .clksel = usim_fclk_div,
- .clksel_reg = OMAP4430_CM_WKUP_USIM_CLKCTRL,
- .clksel_mask= OMAP4430_CLKSEL_DIV_MASK,
- .ops= clkops_null,
- .recalc = omap2_clksel_recalc,
- .round_rate = omap2_clksel_round_rate,
- .set_rate = omap2_clksel_set_rate,
-};
-
/*
* clkdev
*/
@@ -2879,8 +2899,8 @@ static struct omap_clk omap44xx_clks
[RFC 0/5] OMAP4: mux: Add the OMAP4430 ES1 support
Hi, Upon popular request, here is the series that apparently some people were expected for some time :-) Only ES1 is supported for the moment, ES2 will come soon (if not today, probably on Monday). 95% of the mux is similar but due to the replacement of some IP (unipro), we do have a couple of differences. I have added the complete mux dump in sdp4430 board file, just as a starting point, in order to start getting rid of the X-loader mux settings. For the moment I2C device init is the only user of the omap_mux_init_signal, at least on OMAP4. That removed the warning we have at the moment: mux: Could not set signal i2c2_scl mux: Could not set signal i2c2_sda mux: Could not set signal i2c3_scl mux: Could not set signal i2c3_sda mux: Could not set signal i2c4_scl mux: Could not set signal i2c4_sda I hope that for long term, driver guys will move that to the proper device init file. I removed as well the access to low level functions, because even if this is needed by some driver (TBC), I don't think it is safe to expose such low level accessor. We should probably add something for driver that need to dynamically modify the mux settings at runtime. For example, we can keep the mux data for pins that might be modified later, like you did for GPIOs. I tested it on OMAP4430 PAB SDP and Santosh did some test with omap3_defconfig on OMAP3430 and OMAP4430 SDP. patches are based on mainline 2.6.36-rc5 and located here: git://gitorious.org/omap-pm/linux.git ctrl-wip/mux-omap4 Regards, Benoit Benoit Cousson (5): OMAP: mux: Add support for control module split in several partitions OMAP: mux: Make low level function private OMAP4: mux: Add data for OMAP4430 ES1 OMAP4: mux: Select CBL package for SDP4430 with ES1 OMAP4: mux: Temporary initial SDP4430 mux settings arch/arm/mach-omap2/Kconfig |4 + arch/arm/mach-omap2/Makefile|1 + arch/arm/mach-omap2/board-4430sdp.c | 389 ++ arch/arm/mach-omap2/mux.c | 133 -- arch/arm/mach-omap2/mux.h | 67 ++- arch/arm/mach-omap2/mux2420.c | 22 +- arch/arm/mach-omap2/mux2430.c | 22 +- arch/arm/mach-omap2/mux34xx.c | 18 +- arch/arm/mach-omap2/mux44xx.c | 944 +++ arch/arm/mach-omap2/mux44xx.h | 278 ++ 10 files changed, 1791 insertions(+), 87 deletions(-) create mode 100644 arch/arm/mach-omap2/mux44xx.c create mode 100644 arch/arm/mach-omap2/mux44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 1/5] OMAP: mux: Add support for control module split in several partitions
Starting on OMAP4, the pin mux configuration is located in two
different partitions of the control module (CODE_PAD and WKUP_PAD).
The first one is inside the core power domain whereas the second
one is inside the wakeup.
Since each partition has a different physical base address, an
ID is added for each mux entry in order to identify the proper
partition and thus the correct base address.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/mux.c | 131 ++--
arch/arm/mach-omap2/mux.h | 44 +++---
arch/arm/mach-omap2/mux2420.c | 22 +--
arch/arm/mach-omap2/mux2430.c | 22 +--
arch/arm/mach-omap2/mux34xx.c | 18 +-
5 files changed, 165 insertions(+), 72 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 35050d0..83e7686 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,10 +1,10 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP2 and OMAP3 pin multiplexing configurations
+ * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations
*
- * Copyright (C) 2004 - 2008 Texas Instruments Inc.
- * Copyright (C) 2003 - 2008 Nokia Corporation
+ * Copyright (C) 2004 - 2010 Texas Instruments Inc.
+ * Copyright (C) 2003 - 2010 Nokia Corporation
*
* Written by Tony Lindgren
*
@@ -43,26 +43,32 @@
#define OMAP_MUX_BASE_OFFSET 0x30/* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca
#define MUXABLE_GPIO_MODE3 BIT(0)
+#define MAX_PARTITIONS_NR 2
struct omap_mux_entry {
struct omap_mux mux;
struct list_headnode;
};
-static unsigned long mux_phys;
-static void __iomem *mux_base;
static u8 omap_mux_flags;
-u16 omap_mux_read(u16 reg)
+static struct mux_partition mux_partitions[MAX_PARTITIONS_NR];
+static u32 mux_partitions_cnt;
+
+u16 omap_mux_read(u16 reg, u8 id)
{
+ void __iomem *mux_base = mux_partitions[id].base;
+
if (cpu_is_omap24xx())
return __raw_readb(mux_base + reg);
else
return __raw_readw(mux_base + reg);
}
-void omap_mux_write(u16 val, u16 reg)
+void omap_mux_write(u16 val, u16 reg, u8 id)
{
+ void __iomem *mux_base = mux_partitions[id].base;
+
if (cpu_is_omap24xx())
__raw_writeb(val, mux_base + reg);
else
@@ -71,8 +77,9 @@ void omap_mux_write(u16 val, u16 reg)
void omap_mux_write_array(struct omap_board_mux *board_mux)
{
- while (board_mux-reg_offset != OMAP_MUX_TERMINATOR) {
- omap_mux_write(board_mux-value, board_mux-reg_offset);
+ while (board_mux-reg_offset != OMAP_MUX_TERMINATOR) {
+ omap_mux_write(board_mux-value, board_mux-reg_offset,
+ board_mux-id);
board_mux++;
}
}
@@ -114,7 +121,7 @@ int __init omap_mux_init_gpio(int gpio, int val)
return -EINVAL;
}
- old_mode = omap_mux_read(gpio_mux-reg_offset);
+ old_mode = omap_mux_read(gpio_mux-reg_offset, gpio_mux-id);
mux_mode = val ~(OMAP_MUX_NR_MODES - 1);
if (omap_mux_flags MUXABLE_GPIO_MODE3)
mux_mode |= OMAP_MUX_MODE3;
@@ -122,7 +129,7 @@ int __init omap_mux_init_gpio(int gpio, int val)
mux_mode |= OMAP_MUX_MODE4;
pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
- omap_mux_write(mux_mode, gpio_mux-reg_offset);
+ omap_mux_write(mux_mode, gpio_mux-reg_offset, gpio_mux-id);
return 0;
}
@@ -160,12 +167,12 @@ int __init omap_mux_init_signal(char *muxname, int val)
u16 old_mode;
u16 mux_mode;
- old_mode = omap_mux_read(m-reg_offset);
+ old_mode = omap_mux_read(m-reg_offset, m-id);
mux_mode = val | i;
pr_debug(mux: Setting signal
%s.%s 0x%04x - 0x%04x\n,
m0_entry, muxname, old_mode, mux_mode);
- omap_mux_write(mux_mode, m-reg_offset);
+ omap_mux_write(mux_mode, m-reg_offset, m-id);
found++;
}
}
@@ -194,6 +201,17 @@ int __init omap_mux_init_signal(char *muxname, int val)
flags[i] = #mask; \
}
+static void omap_mux_decode_id(struct seq_file *s, u8 id)
+{
+ if (id == PAD_CORE_ID)
+ seq_printf(s, PAD_CORE_ID);
+ else if (id == PAD_WKUP_ID)
+ seq_printf(s, PAD_WKUP_ID
[RFC 2/5] OMAP: mux: Make low level function private
omap_mux_read / omap_mux_write should not be accessed directly
outside the mux framework.
Do we really have use case that require dynamic mux change beside
GPIO?
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/mux.c |4 ++--
arch/arm/mach-omap2/mux.h | 18 --
2 files changed, 2 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 83e7686..8285cb8 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -55,7 +55,7 @@ static u8 omap_mux_flags;
static struct mux_partition mux_partitions[MAX_PARTITIONS_NR];
static u32 mux_partitions_cnt;
-u16 omap_mux_read(u16 reg, u8 id)
+static u16 omap_mux_read(u16 reg, u8 id)
{
void __iomem *mux_base = mux_partitions[id].base;
@@ -65,7 +65,7 @@ u16 omap_mux_read(u16 reg, u8 id)
return __raw_readw(mux_base + reg);
}
-void omap_mux_write(u16 val, u16 reg, u8 id)
+static void omap_mux_write(u16 val, u16 reg, u8 id)
{
void __iomem *mux_base = mux_partitions[id].base;
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 9b28576..da67501 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -173,24 +173,6 @@ u16 omap_mux_get_gpio(int gpio);
void omap_mux_set_gpio(u16 val, int gpio);
/**
- * omap_mux_read() - read mux register
- * @mux_offset:Offset of the mux register
- * @id:identifier of the control module partition
- *
- */
-u16 omap_mux_read(u16 mux_offset, u8 id);
-
-/**
- * omap_mux_write() - write mux register
- * @val: New mux register value
- * @mux_offset:Offset of the mux register
- * @id:identifier of the control module partition
- *
- * This should be only needed for dynamic remuxing of non-gpio signals.
- */
-void omap_mux_write(u16 val, u16 mux_offset, u8 id);
-
-/**
* omap_mux_write_array() - write an array of mux registers
* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
*
--
1.6.0.4
--
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[RFC 5/5] OMAP4: mux: Temporary initial SDP4430 mux settings
Mux settings will have to go in per device init file for the
long term. Until someone does it, apply the same mux settings
than X-loader, minus the OFF mode.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c | 377 +++
1 files changed, 377 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index d087712..8bf026a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -431,6 +431,383 @@ static int __init omap4_i2c_init(void)
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ /* Audio backend settings */
+ OMAP4_MUX(ABE_CLKS, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_CLK1, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_DMIC_DIN3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* abe_slimbus1_clock */
+ OMAP4_MUX(ABE_MCBSP1_CLKX, PAD_CORE_ID, OMAP_PIN_INPUT |
OMAP_MUX_MODE1),
+ /* abe_slimbus1_data */
+ OMAP4_MUX(ABE_MCBSP1_DR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE1),
+ OMAP4_MUX(ABE_MCBSP1_DX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP1_FSX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_CLKX, PAD_CORE_ID, OMAP_PIN_INPUT |
OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_DR, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_DX, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_MCBSP2_FSX, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_DL_DATA, PAD_CORE_ID, OMAP_PIN_OUTPUT |
OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_FRAME, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_LB_CLK, PAD_CORE_ID, OMAP_PIN_OUTPUT |
OMAP_MUX_MODE0),
+ OMAP4_MUX(ABE_PDM_UL_DATA, PAD_CORE_ID, OMAP_PIN_INPUT |
OMAP_MUX_MODE0),
+
+ OMAP4_MUX(CAM_SHUTTER, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CAM_STROBE, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DX2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DX3, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DX4, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ OMAP4_MUX(CSI21_DY0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DY1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI21_DY2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DY3, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ /* safe_mode */
+ OMAP4_MUX(CSI21_DY4, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE7),
+ OMAP4_MUX(CSI22_DX0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DX1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DY0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ OMAP4_MUX(CSI22_DY1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+/*
+ * OMAP4_MUX(DPM_EMU0, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(DPM_EMU1, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ * OMAP4_MUX(DPM_EMU2, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
+ */
+ /* dsi1_te0 */
+ OMAP4_MUX(C2C_DATA12, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* dsi2_te0 */
+ OMAP4_MUX(C2C_DATA14, PAD_CORE_ID, OMAP_PIN_OUTPUT | OMAP_MUX_MODE1),
+ /* dispc2_data10 */
+ OMAP4_MUX(DPM_EMU3, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data9 */
+ OMAP4_MUX(DPM_EMU4, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data16 */
+ OMAP4_MUX(DPM_EMU5, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data17 */
+ OMAP4_MUX(DPM_EMU6, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_hsync */
+ OMAP4_MUX(DPM_EMU7, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_pclk */
+ OMAP4_MUX(DPM_EMU8, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_vsync */
+ OMAP4_MUX(DPM_EMU9, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_de */
+ OMAP4_MUX(DPM_EMU10, PAD_CORE_ID, OMAP_PIN_INPUT | OMAP_MUX_MODE5),
+ /* dispc2_data8 */
+ OMAP4_MUX(DPM_EMU11, PAD_CORE_ID, OMAP_PIN_INPUT
[RFC v2 0/7] OMAP4: mux: Add the OMAP4430 ES1 ES2 support
Hi Tony, Upon Nishanth request, here is the updated version... It takes into account your proposal to store partition information in a partition structure instead of inside every pad entries. The mechanism relies on the uniqueness of the pad name in each partition to find the correct partition during iteration. Removed as well some cpu_is_xxx calls from the core code by adding a couple of flags during partition init. Please note that due to low level access to mux api from the RX51 board code, I have to disable the mux change to build properly with omap2plus_defconfig. Look like you do have some idea to fix that :-) I was thinking of: - brute force approach that consist of keeping all the data after init, and thus allowing removing the __init in the omap_mux_init_signal API - or adding some flag in the pad entry to keep them after init . Boot tested on SDP4430 with ES1.0 ES2.0 with omap2plus_defconfig. Still require some real driver to use that mux API in order to validate it. The series is on top of lo/master (2.6.36-rc8) and is available here: git://gitorious.org/omap-pm/linux.git ctrl-wip/mux-omap4-v2 Thanks, Benoit v1: http://www.spinics.net/lists/linux-omap/msg37158.html Benoit Cousson (7): OMAP: mux: Replace printk with pr_xxx macros OMAP3: RX-51: Temporary disable dynamic mux change for eMMC OMAP: mux: Add support for control module split in several partitions OMAP4: mux: Add CBL package data for OMAP4430 ES1 OMAP4: mux: Select CBL package for SDP4430 with ES1 OMAP4: mux: Add CBS package data for OMAP4430 ES2 OMAP4: mux: Select CBS package for SDP4430 with ES2 arch/arm/mach-omap2/Kconfig |8 + arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/board-4430sdp.c | 14 + arch/arm/mach-omap2/board-rx51-peripherals.c |3 +- arch/arm/mach-omap2/mux.c| 330 -- arch/arm/mach-omap2/mux.h| 92 +- arch/arm/mach-omap2/mux2420.c|7 +- arch/arm/mach-omap2/mux2430.c|7 +- arch/arm/mach-omap2/mux34xx.c|7 +- arch/arm/mach-omap2/mux44xx.c| 1625 ++ arch/arm/mach-omap2/mux44xx.h| 298 + 11 files changed, 2229 insertions(+), 163 deletions(-) create mode 100644 arch/arm/mach-omap2/mux44xx.c create mode 100644 arch/arm/mach-omap2/mux44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC v2 1/7] OMAP: mux: Replace printk with pr_xxx macros
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/mux.c | 38 +++---
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 074536a..979e9d1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -102,13 +102,13 @@ int __init omap_mux_init_gpio(int gpio, int val)
}
if (found == 0) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return -ENODEV;
}
if (found 1) {
- printk(KERN_INFO mux: Multiple gpio paths (%d) for gpio%i\n,
- found, gpio);
+ pr_info(mux: Multiple gpio paths (%d) for gpio%i\n,
+ found, gpio);
return -EINVAL;
}
@@ -118,8 +118,8 @@ int __init omap_mux_init_gpio(int gpio, int val)
mux_mode |= OMAP_MUX_MODE3;
else
mux_mode |= OMAP_MUX_MODE4;
- printk(KERN_DEBUG mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
- gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
+ pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
+gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
omap_mux_write(mux_mode, gpio_mux-reg_offset);
return 0;
@@ -161,9 +161,9 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
old_mode = omap_mux_read(m-reg_offset);
mux_mode = val | i;
- printk(KERN_DEBUG mux: Setting signal
- %s.%s 0x%04x - 0x%04x\n,
- m0_entry, muxname, old_mode, mux_mode);
+ pr_debug(mux: Setting signal
+%s.%s 0x%04x - 0x%04x\n,
+m0_entry, muxname, old_mode, mux_mode);
omap_mux_write(mux_mode, m-reg_offset);
found++;
}
@@ -174,12 +174,12 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
return 0;
if (found 1) {
- printk(KERN_ERR mux: Multiple signal paths (%i) for %s\n,
- found, muxname);
+ pr_err(mux: Multiple signal paths (%i) for %s\n,
+ found, muxname);
return -EINVAL;
}
- printk(KERN_ERR mux: Could not set signal %s\n, muxname);
+ pr_err(mux: Could not set signal %s\n, muxname);
return -ENODEV;
}
@@ -462,8 +462,8 @@ static void __init omap_mux_package_fixup(struct omap_mux
*p,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown entry offset 0x%x\n,
- p-reg_offset);
+ pr_err(mux: Unknown entry offset 0x%x\n,
+ p-reg_offset);
p++;
}
}
@@ -487,8 +487,8 @@ static void __init omap_mux_package_init_balls(struct
omap_ball *b,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown ball offset 0x%x\n,
- b-reg_offset);
+ pr_err(mux: Unknown ball offset 0x%x\n,
+ b-reg_offset);
b++;
}
}
@@ -615,7 +615,7 @@ u16 omap_mux_get_gpio(int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not get gpio%i\n, gpio);
+ pr_err(mux: Could not get gpio%i\n, gpio);
return offset;
}
@@ -629,7 +629,7 @@ void omap_mux_set_gpio(u16 val, int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return;
}
@@ -687,7 +687,7 @@ static void __init omap_mux_init_list(struct omap_mux
*superset)
entry = omap_mux_list_add(superset);
if (!entry) {
- printk(KERN_ERR mux: Could not add entry\n);
+ pr_err(mux: Could not add entry\n);
return;
}
superset++;
@@ -738,7 +738,7 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
mux_phys = mux_pbase;
mux_base = ioremap(mux_pbase, mux_size);
if (!mux_base) {
- printk(KERN_ERR mux: Could not ioremap\n
[RFC v2 2/7] OMAP3: RX-51: Temporary disable dynamic mux change for eMMC
RX-51 board is using some low level function in order to change
the padconf settings at runtime.
Since these functions will not be usable anymore after the
partition introduction, remove the code that use these code.
As soon as a proper API will be proposed, this patch will be drop.
Signed-off-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 25a273d..56a49a0 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -260,6 +260,7 @@ static struct twl4030_madc_platform_data rx51_madc_data = {
.irq_line = 1,
};
+#if 0
/* Enable input logic and pull all lines up when eMMC is on. */
static struct omap_board_mux rx51_mmc2_on_mux[] = {
OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
@@ -299,6 +300,7 @@ static void rx51_mmc2_remux(struct device *dev, int slot,
int power_on)
else
omap_mux_write_array(rx51_mmc2_off_mux);
}
+#endif
static struct omap2_hsmmc_info mmc[] __initdata = {
{
@@ -319,7 +321,6 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
.gpio_wp= -EINVAL,
.nonremovable = true,
.power_saving = true,
- .remux = rx51_mmc2_remux,
},
{} /* Terminator */
};
--
1.7.0.4
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[RFC v2 3/7] OMAP: mux: Add support for control module split in several partitions
Starting on OMAP4, the pin mux configuration is located in two
different partitions of the control module (CODE_PAD and WKUP_PAD).
The first one is inside the core power domain whereas the second
one is inside the wakeup.
Add the capability to add any number of partition during board init
time depending of Soc partitioning.
Add some init flags as well in order to avoid explicit Soc version
check inside the mux core code.
Note that this implementation change will make the mux_read, mux_write
and omap_mux_write_array accessors unusable outside the mux code.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/mux.c | 298 ++--
arch/arm/mach-omap2/mux.h | 79 +++-
arch/arm/mach-omap2/mux2420.c |7 +-
arch/arm/mach-omap2/mux2430.c |7 +-
arch/arm/mach-omap2/mux34xx.c |7 +-
5 files changed, 252 insertions(+), 146 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 979e9d1..9b9128e 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,9 +1,9 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP2 and OMAP3 pin multiplexing configurations
+ * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations
*
- * Copyright (C) 2004 - 2008 Texas Instruments Inc.
+ * Copyright (C) 2004 - 2010 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
*
* Written by Tony Lindgren
@@ -40,60 +40,60 @@
#define OMAP_MUX_BASE_OFFSET 0x30/* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca
-#define MUXABLE_GPIO_MODE3 BIT(0)
struct omap_mux_entry {
struct omap_mux mux;
struct list_headnode;
};
-static unsigned long mux_phys;
-static void __iomem *mux_base;
-static u8 omap_mux_flags;
+static LIST_HEAD(mux_partitions);
+static DEFINE_MUTEX(muxmode_mutex);
-u16 omap_mux_read(u16 reg)
+static u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg)
{
- if (cpu_is_omap24xx())
- return __raw_readb(mux_base + reg);
+ if (partition-flags OMAP_MUX_REG_8BIT)
+ return __raw_readb(partition-base + reg);
else
- return __raw_readw(mux_base + reg);
+ return __raw_readw(partition-base + reg);
}
-void omap_mux_write(u16 val, u16 reg)
+static void omap_mux_write(struct omap_mux_partition *partition, u16 val,
+ u16 reg)
{
- if (cpu_is_omap24xx())
- __raw_writeb(val, mux_base + reg);
+ if (partition-flags OMAP_MUX_REG_8BIT)
+ __raw_writeb(val, partition-base + reg);
else
- __raw_writew(val, mux_base + reg);
+ __raw_writew(val, partition-base + reg);
}
-void omap_mux_write_array(struct omap_board_mux *board_mux)
+static void omap_mux_write_array(struct omap_mux_partition *partition,
+struct omap_board_mux *board_mux)
{
- while (board_mux-reg_offset != OMAP_MUX_TERMINATOR) {
- omap_mux_write(board_mux-value, board_mux-reg_offset);
+ while (board_mux-reg_offset != OMAP_MUX_TERMINATOR) {
+ omap_mux_write(partition, board_mux-value,
+ board_mux-reg_offset);
board_mux++;
}
}
-static LIST_HEAD(muxmodes);
-static DEFINE_MUTEX(muxmode_mutex);
-
#ifdef CONFIG_OMAP_MUX
static char *omap_mux_options;
-int __init omap_mux_init_gpio(int gpio, int val)
+static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition,
+ int gpio, int val)
{
struct omap_mux_entry *e;
struct omap_mux *gpio_mux = NULL;
u16 old_mode;
u16 mux_mode;
int found = 0;
+ struct list_head *muxmodes = partition-muxmodes;
if (!gpio)
return -EINVAL;
- list_for_each_entry(e, muxmodes, node) {
+ list_for_each_entry(e, muxmodes, node) {
struct omap_mux *m = e-mux;
if (gpio == m-gpio) {
gpio_mux = m;
@@ -112,24 +112,40 @@ int __init omap_mux_init_gpio(int gpio, int val)
return -EINVAL;
}
- old_mode = omap_mux_read(gpio_mux-reg_offset);
+ old_mode = omap_mux_read(partition, gpio_mux-reg_offset);
mux_mode = val ~(OMAP_MUX_NR_MODES - 1);
- if (omap_mux_flags MUXABLE_GPIO_MODE3)
+ if (partition-flags OMAP_MUX_GPIO_IN_MODE3)
mux_mode |= OMAP_MUX_MODE3;
else
mux_mode |= OMAP_MUX_MODE4;
pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
- omap_mux_write(mux_mode, gpio_mux-reg_offset);
+ omap_mux_write
[RFC v2 5/7] OMAP4: mux: Select CBL package for SDP4430 with ES1
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e14c73d..7efb256 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -280,6 +280,7 @@ config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
default y
depends on ARCH_OMAP4
+ select OMAP_PACKAGE_CBL
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index aafd306..83ee5b4 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -35,6 +35,7 @@
#include plat/usb.h
#include plat/mmc.h
+#include mux.h
#include hsmmc.h
#include timer-gp.h
#include control.h
@@ -500,10 +501,19 @@ static void __init omap_sfh7741prox_init(void)
}
}
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux NULL
+#endif
+
static void __init omap_4430sdp_init(void)
{
int status;
+ omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
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[RFC v2 7/7] OMAP4: mux: Select CBS package for SDP4430 with ES2
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c |6 +-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 92fea63..39229cf 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -284,6 +284,7 @@ config MACH_OMAP_4430SDP
default y
depends on ARCH_OMAP4
select OMAP_PACKAGE_CBL
+ select OMAP_PACKAGE_CBS
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 83ee5b4..323b62e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -512,8 +512,12 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init omap_4430sdp_init(void)
{
int status;
+ int package = OMAP_PACKAGE_CBS;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ package = OMAP_PACKAGE_CBL;
+ omap4_mux_init(board_mux, package);
- omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
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[RFC v2 6/7] OMAP4: mux: Add CBS package data for OMAP4430 ES2
Please note that the full muxmodes are re-defined for ES2 instead
of using the subset. There are 81 differences among 204 pins.
The subset fixup will have to iterate over the whole list for each
subset entry, which can lead to an important number of iteration.
On the other hand, it will take much more memory at boot time.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |3 +
arch/arm/mach-omap2/mux.h |1 +
arch/arm/mach-omap2/mux44xx.c | 741 -
arch/arm/mach-omap2/mux44xx.h | 21 ++
4 files changed, 758 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7efb256..92fea63 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -88,6 +88,9 @@ config OMAP_PACKAGE_CBP
config OMAP_PACKAGE_CBL
bool
+config OMAP_PACKAGE_CBS
+ bool
+
comment OMAP Board Type
depends on ARCH_OMAP2PLUS
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 28286a9..b34a2ad 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -62,6 +62,7 @@
/* Flags for omapX_mux_init */
#define OMAP_PACKAGE_MASK 0x
+#define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
diff --git a/arch/arm/mach-omap2/mux44xx.c b/arch/arm/mach-omap2/mux44xx.c
index 5e9d60a..80335f3 100644
--- a/arch/arm/mach-omap2/mux44xx.c
+++ b/arch/arm/mach-omap2/mux44xx.c
@@ -48,7 +48,7 @@
}
/*
- * Superset of all mux modes for omap4
+ * Superset of all mux modes for omap4 ES1.0
*/
static struct omap_mux __initdata omap4_core_muxmodes[] = {
_OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
@@ -755,6 +755,724 @@ struct omap_ball __initdata omap4_core_cbl_ball[] = {
#endif
/*
+ * Superset of all mux modes for omap4 ES2.0
+ */
+static struct omap_mux __initdata omap4_es2_core_muxmodes[] = {
+ _OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD1, 0, gpmc_ad1, sdmmc2_dat1, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD2, 0, gpmc_ad2, sdmmc2_dat2, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD3, 0, gpmc_ad3, sdmmc2_dat3, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD4, 0, gpmc_ad4, sdmmc2_dat4,
+ sdmmc2_dir_dat0, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD5, 0, gpmc_ad5, sdmmc2_dat5,
+ sdmmc2_dir_dat1, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD6, 0, gpmc_ad6, sdmmc2_dat6,
+ sdmmc2_dir_cmd, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD7, 0, gpmc_ad7, sdmmc2_dat7,
+ sdmmc2_clk_fdbk, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD8, 32, gpmc_ad8, kpd_row0, c2c_data15,
+ gpio_32, NULL, sdmmc1_dat0, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD9, 33, gpmc_ad9, kpd_row1, c2c_data14,
+ gpio_33, NULL, sdmmc1_dat1, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD10, 34, gpmc_ad10, kpd_row2, c2c_data13,
+ gpio_34, NULL, sdmmc1_dat2, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD11, 35, gpmc_ad11, kpd_row3, c2c_data12,
+ gpio_35, NULL, sdmmc1_dat3, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD12, 36, gpmc_ad12, kpd_col0, c2c_data11,
+ gpio_36, NULL, sdmmc1_dat4, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD13, 37, gpmc_ad13, kpd_col1, c2c_data10,
+ gpio_37, NULL, sdmmc1_dat5, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD14, 38, gpmc_ad14, kpd_col2, c2c_data9,
+ gpio_38, NULL, sdmmc1_dat6, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD15, 39, gpmc_ad15, kpd_col3, c2c_data8,
+ gpio_39, NULL, sdmmc1_dat7, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_A16, 40, gpmc_a16, kpd_row4, c2c_datain0,
+ gpio_40, venc_656_data0, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A17, 41, gpmc_a17, kpd_row5, c2c_datain1,
+ gpio_41, venc_656_data1, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A18, 42, gpmc_a18, kpd_row6, c2c_datain2,
+ gpio_42, venc_656_data2, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A19, 43, gpmc_a19, kpd_row7, c2c_datain3,
+ gpio_43, venc_656_data3, NULL
[PATCH 0/7] OMAP4: mux: Add the OMAP4430 ES1.0 ES2.x support
Hi Tony, Here is the version updated with your fixes. This is the first non RFC version to make Nishant M. happy;-) Thanks to you, the RX-51 is now handled properly and the low level API is still public like before for dynamic mux use. The pandaboard is now supported thanks to Sricharan, and a couple of bugs are fixed, thanks to Dan who reported them. The series is based on mainline (2.6.37-rc1) and is available here: git://gitorious.org/omap-pm/linux.git ctrl-wip/mux-omap4-v3 Tested on SDP4430 ES1.0, ES2.0 and ES2.1 with omap2plus_defconfig. Still require some test on OMAP3 and OMAP2. Thanks, Benoit RFC v2: http://www.spinics.net/lists/linux-omap/msg38995.html - Take into account Tony's proposal to store partition information in a partition structure instead of inside every pad entries. - Remove some cpu_is_xxx calls from the core code by adding a couple of flags during partition init. RFC v1: http://www.spinics.net/lists/linux-omap/msg37158.html Benoit Cousson (6): OMAP: mux: Replace printk with pr_xxx macros OMAP: mux: Add support for control module split in several partitions OMAP4: mux: Add CBL package data for OMAP4430 ES1 OMAP4: sdp4430: Select CBL package for ES1 and initialize mux OMAP4: mux: Add CBS package data for OMAP4430 ES2 OMAP4: sdp4430: Select CBS package for ES2 sricharan (1): OMAP4: pandaboard: Select CBL CBS package and initialize mux arch/arm/mach-omap2/Kconfig | 10 + arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/board-4430sdp.c | 14 + arch/arm/mach-omap2/board-omap4panda.c | 16 + arch/arm/mach-omap2/board-rx51-peripherals.c | 12 +- arch/arm/mach-omap2/mux.c| 342 -- arch/arm/mach-omap2/mux.h| 84 ++- arch/arm/mach-omap2/mux2420.c|7 +- arch/arm/mach-omap2/mux2430.c|7 +- arch/arm/mach-omap2/mux34xx.c|7 +- arch/arm/mach-omap2/mux44xx.c| 1625 ++ arch/arm/mach-omap2/mux44xx.h| 298 + 12 files changed, 2279 insertions(+), 144 deletions(-) create mode 100644 arch/arm/mach-omap2/mux44xx.c create mode 100644 arch/arm/mach-omap2/mux44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/7] OMAP: mux: Replace printk with pr_xxx macros
Replace all the printk(KERN_XXX... with pr_xxx macros.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/mux.c | 38 +++---
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 074536a..979e9d1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -102,13 +102,13 @@ int __init omap_mux_init_gpio(int gpio, int val)
}
if (found == 0) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return -ENODEV;
}
if (found 1) {
- printk(KERN_INFO mux: Multiple gpio paths (%d) for gpio%i\n,
- found, gpio);
+ pr_info(mux: Multiple gpio paths (%d) for gpio%i\n,
+ found, gpio);
return -EINVAL;
}
@@ -118,8 +118,8 @@ int __init omap_mux_init_gpio(int gpio, int val)
mux_mode |= OMAP_MUX_MODE3;
else
mux_mode |= OMAP_MUX_MODE4;
- printk(KERN_DEBUG mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
- gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
+ pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
+gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
omap_mux_write(mux_mode, gpio_mux-reg_offset);
return 0;
@@ -161,9 +161,9 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
old_mode = omap_mux_read(m-reg_offset);
mux_mode = val | i;
- printk(KERN_DEBUG mux: Setting signal
- %s.%s 0x%04x - 0x%04x\n,
- m0_entry, muxname, old_mode, mux_mode);
+ pr_debug(mux: Setting signal
+%s.%s 0x%04x - 0x%04x\n,
+m0_entry, muxname, old_mode, mux_mode);
omap_mux_write(mux_mode, m-reg_offset);
found++;
}
@@ -174,12 +174,12 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
return 0;
if (found 1) {
- printk(KERN_ERR mux: Multiple signal paths (%i) for %s\n,
- found, muxname);
+ pr_err(mux: Multiple signal paths (%i) for %s\n,
+ found, muxname);
return -EINVAL;
}
- printk(KERN_ERR mux: Could not set signal %s\n, muxname);
+ pr_err(mux: Could not set signal %s\n, muxname);
return -ENODEV;
}
@@ -462,8 +462,8 @@ static void __init omap_mux_package_fixup(struct omap_mux
*p,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown entry offset 0x%x\n,
- p-reg_offset);
+ pr_err(mux: Unknown entry offset 0x%x\n,
+ p-reg_offset);
p++;
}
}
@@ -487,8 +487,8 @@ static void __init omap_mux_package_init_balls(struct
omap_ball *b,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown ball offset 0x%x\n,
- b-reg_offset);
+ pr_err(mux: Unknown ball offset 0x%x\n,
+ b-reg_offset);
b++;
}
}
@@ -615,7 +615,7 @@ u16 omap_mux_get_gpio(int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not get gpio%i\n, gpio);
+ pr_err(mux: Could not get gpio%i\n, gpio);
return offset;
}
@@ -629,7 +629,7 @@ void omap_mux_set_gpio(u16 val, int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return;
}
@@ -687,7 +687,7 @@ static void __init omap_mux_init_list(struct omap_mux
*superset)
entry = omap_mux_list_add(superset);
if (!entry) {
- printk(KERN_ERR mux: Could not add entry\n);
+ pr_err(mux: Could not add entry\n);
return;
}
superset++;
@@ -738,7 +738,7 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
mux_phys = mux_pbase;
mux_base = ioremap(mux_pbase, mux_size);
if (!mux_base
[PATCH 2/7] OMAP: mux: Add support for control module split in several partitions
Starting on OMAP4, the pin mux configuration is located in two
different partitions of the control module (CODE_PAD and WKUP_PAD).
The first one is inside the core power domain whereas the second
one is inside the wakeup.
- Add the capability to add any number of partition during board init
time depending of Soc partitioning.
- Add some init flags as well in order to avoid explicit Soc version
check inside the mux core code.
- Add a comment with mux0 mode on top of omap_mux/board/partition
if the current mux mode is not the default one.
Thanks to Tony Lindgren t...@atomide.com for the following improvements:
- Add omap_mux_get for getting the partition data so platform level
device code can use it.
- Fix the rx51 board code to use the new API.
Thanks to Dan Murphy dmur...@ti.com for testing on OMAP4 and reporting
a couple of bugs.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Tested-by: Murphy Dan dmur...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 12 +-
arch/arm/mach-omap2/mux.c| 310 +-
arch/arm/mach-omap2/mux.h| 71 +-
arch/arm/mach-omap2/mux2420.c|7 +-
arch/arm/mach-omap2/mux2430.c|7 +-
arch/arm/mach-omap2/mux34xx.c|7 +-
6 files changed, 286 insertions(+), 128 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 3fec4d6..3fda20d 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -293,6 +293,8 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
+static struct omap_mux_partition *partition;
+
/*
* Current flows to eMMC when eMMC is off and the data lines are pulled up,
* so pull them down. N.B. we pull 8 lines because we are using 8 lines.
@@ -300,9 +302,9 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
{
if (power_on)
- omap_mux_write_array(rx51_mmc2_on_mux);
+ omap_mux_write_array(partition, rx51_mmc2_on_mux);
else
- omap_mux_write_array(rx51_mmc2_off_mux);
+ omap_mux_write_array(partition, rx51_mmc2_off_mux);
}
static struct omap2_hsmmc_info mmc[] __initdata = {
@@ -922,7 +924,11 @@ void __init rx51_peripherals_init(void)
rx51_init_wl1251();
spi_register_board_info(rx51_peripherals_spi_board_info,
ARRAY_SIZE(rx51_peripherals_spi_board_info));
- omap2_hsmmc_init(mmc);
+
+ partition = omap_mux_get(core);
+ if (partition)
+ omap2_hsmmc_init(mmc);
+
platform_device_register(rx51_charger_device);
}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 979e9d1..fa139ff 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,9 +1,9 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP2 and OMAP3 pin multiplexing configurations
+ * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations
*
- * Copyright (C) 2004 - 2008 Texas Instruments Inc.
+ * Copyright (C) 2004 - 2010 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
*
* Written by Tony Lindgren
@@ -40,60 +40,72 @@
#define OMAP_MUX_BASE_OFFSET 0x30/* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca
-#define MUXABLE_GPIO_MODE3 BIT(0)
struct omap_mux_entry {
struct omap_mux mux;
struct list_headnode;
};
-static unsigned long mux_phys;
-static void __iomem *mux_base;
-static u8 omap_mux_flags;
+static LIST_HEAD(mux_partitions);
+static DEFINE_MUTEX(muxmode_mutex);
+
+struct omap_mux_partition *omap_mux_get(const char *name)
+{
+ struct omap_mux_partition *partition;
+
+ list_for_each_entry(partition, mux_partitions, node) {
+ if (!strcmp(name, partition-name))
+ return partition;
+ }
+
+ return NULL;
+}
-u16 omap_mux_read(u16 reg)
+u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg)
{
- if (cpu_is_omap24xx())
- return __raw_readb(mux_base + reg);
+ if (partition-flags OMAP_MUX_REG_8BIT)
+ return __raw_readb(partition-base + reg);
else
- return __raw_readw(mux_base + reg);
+ return __raw_readw(partition-base + reg);
}
-void omap_mux_write(u16 val, u16 reg)
+void omap_mux_write(struct omap_mux_partition *partition, u16 val,
+ u16 reg)
{
- if (cpu_is_omap24xx())
- __raw_writeb(val, mux_base + reg);
+ if (partition-flags OMAP_MUX_REG_8BIT
[PATCH 4/7] OMAP4: sdp4430: Select CBL package for ES1 and initialize mux
Select the CBL package if SDP4430 is enabled during config.
Initialize the mux framework during the board init.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e14c73d..7efb256 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -280,6 +280,7 @@ config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
default y
depends on ARCH_OMAP4
+ select OMAP_PACKAGE_CBL
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index df5a425..e4f1726 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -35,6 +35,7 @@
#include plat/usb.h
#include plat/mmc.h
+#include mux.h
#include hsmmc.h
#include timer-gp.h
#include control.h
@@ -505,10 +506,19 @@ static void __init omap_sfh7741prox_init(void)
}
}
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux NULL
+#endif
+
static void __init omap_4430sdp_init(void)
{
int status;
+ omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
--
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[PATCH 6/7] OMAP4: sdp4430: Select CBS package for ES2
Select the CBS package if SDP4430 is enabled during config.
Use the proper package (CBL or CBS) based on chip revision.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c |6 +-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 92fea63..39229cf 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -284,6 +284,7 @@ config MACH_OMAP_4430SDP
default y
depends on ARCH_OMAP4
select OMAP_PACKAGE_CBL
+ select OMAP_PACKAGE_CBS
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index e4f1726..94d989b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -517,8 +517,12 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init omap_4430sdp_init(void)
{
int status;
+ int package = OMAP_PACKAGE_CBS;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ package = OMAP_PACKAGE_CBL;
+ omap4_mux_init(board_mux, package);
- omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
--
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[PATCH 5/7] OMAP4: mux: Add CBS package data for OMAP4430 ES2
Please note that the full muxmodes are re-defined for ES2 instead
of using the subset. There are 81 differences among 204 pins.
The subset fixup will have to iterate over the whole list for each
subset entry, which can lead to an important number of iteration.
On the other hand, it will take much more memory at boot time.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |3 +
arch/arm/mach-omap2/mux.h |1 +
arch/arm/mach-omap2/mux44xx.c | 741 -
arch/arm/mach-omap2/mux44xx.h | 21 ++
4 files changed, 758 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7efb256..92fea63 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -88,6 +88,9 @@ config OMAP_PACKAGE_CBP
config OMAP_PACKAGE_CBL
bool
+config OMAP_PACKAGE_CBS
+ bool
+
comment OMAP Board Type
depends on ARCH_OMAP2PLUS
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 58e4913..e2b7dbc 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -62,6 +62,7 @@
/* Flags for omapX_mux_init */
#define OMAP_PACKAGE_MASK 0x
+#define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
diff --git a/arch/arm/mach-omap2/mux44xx.c b/arch/arm/mach-omap2/mux44xx.c
index 5e9d60a..80335f3 100644
--- a/arch/arm/mach-omap2/mux44xx.c
+++ b/arch/arm/mach-omap2/mux44xx.c
@@ -48,7 +48,7 @@
}
/*
- * Superset of all mux modes for omap4
+ * Superset of all mux modes for omap4 ES1.0
*/
static struct omap_mux __initdata omap4_core_muxmodes[] = {
_OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
@@ -755,6 +755,724 @@ struct omap_ball __initdata omap4_core_cbl_ball[] = {
#endif
/*
+ * Superset of all mux modes for omap4 ES2.0
+ */
+static struct omap_mux __initdata omap4_es2_core_muxmodes[] = {
+ _OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD1, 0, gpmc_ad1, sdmmc2_dat1, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD2, 0, gpmc_ad2, sdmmc2_dat2, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD3, 0, gpmc_ad3, sdmmc2_dat3, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD4, 0, gpmc_ad4, sdmmc2_dat4,
+ sdmmc2_dir_dat0, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD5, 0, gpmc_ad5, sdmmc2_dat5,
+ sdmmc2_dir_dat1, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD6, 0, gpmc_ad6, sdmmc2_dat6,
+ sdmmc2_dir_cmd, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD7, 0, gpmc_ad7, sdmmc2_dat7,
+ sdmmc2_clk_fdbk, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD8, 32, gpmc_ad8, kpd_row0, c2c_data15,
+ gpio_32, NULL, sdmmc1_dat0, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD9, 33, gpmc_ad9, kpd_row1, c2c_data14,
+ gpio_33, NULL, sdmmc1_dat1, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD10, 34, gpmc_ad10, kpd_row2, c2c_data13,
+ gpio_34, NULL, sdmmc1_dat2, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD11, 35, gpmc_ad11, kpd_row3, c2c_data12,
+ gpio_35, NULL, sdmmc1_dat3, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD12, 36, gpmc_ad12, kpd_col0, c2c_data11,
+ gpio_36, NULL, sdmmc1_dat4, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD13, 37, gpmc_ad13, kpd_col1, c2c_data10,
+ gpio_37, NULL, sdmmc1_dat5, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD14, 38, gpmc_ad14, kpd_col2, c2c_data9,
+ gpio_38, NULL, sdmmc1_dat6, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD15, 39, gpmc_ad15, kpd_col3, c2c_data8,
+ gpio_39, NULL, sdmmc1_dat7, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_A16, 40, gpmc_a16, kpd_row4, c2c_datain0,
+ gpio_40, venc_656_data0, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A17, 41, gpmc_a17, kpd_row5, c2c_datain1,
+ gpio_41, venc_656_data1, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A18, 42, gpmc_a18, kpd_row6, c2c_datain2,
+ gpio_42, venc_656_data2, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A19, 43, gpmc_a19, kpd_row7, c2c_datain3,
+ gpio_43, venc_656_data3, NULL
[PATCH 7/7] OMAP4: pandaboard: Select CBL CBS package and initialize mux
From: sricharan r.sricha...@ti.com
The mux framework allows the change of pad configuration by drivers
when needed. Prior to this the mux framework has to be initialised
with all the mux parameters specific to the board. The mux init is
already present in the board file for SDP. Adding the mux init
for panda boards.
Signed-off-by: sricharan r.sricha...@ti.com
Acked-by: Anand Gadiyar gadi...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Kconfig|2 ++
arch/arm/mach-omap2/board-omap4panda.c | 16
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 39229cf..186d270 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -290,6 +290,8 @@ config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
default y
depends on ARCH_OMAP4
+ select OMAP_PACKAGE_CBL
+ select OMAP_PACKAGE_CBS
config OMAP3_EMU
bool OMAP3 debugging peripherals
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 1ecd0a6..801f814 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -40,6 +40,7 @@
#include hsmmc.h
#include control.h
+#include mux.h
#define GPIO_HUB_POWER 1
#define GPIO_HUB_NRESET62
@@ -368,8 +369,23 @@ static int __init omap4_panda_i2c_init(void)
omap_register_i2c_bus(4, 400, NULL, 0);
return 0;
}
+
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux NULL
+#endif
+
static void __init omap4_panda_init(void)
{
+ int package = OMAP_PACKAGE_CBS;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ package = OMAP_PACKAGE_CBL;
+ omap4_mux_init(board_mux, package);
+
omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
omap_serial_init();
--
1.7.0.4
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[PATCH v2 0/8] OMAP4: mux: Add the OMAP4430 ES1.0 ES2.x support
Hi Tony, Here is the version updated with your latest fixes and improvements after a small clean to fix a checkpatch issue. I added as well a patch from Dan to add __func__ in every pr__xxx calls. The series is based on mainline (2.6.37-rc1) and is available here: git://gitorious.org/omap-pm/linux.git ctrl-wip/mux-omap4-v4 Tested on SDP4430 ES1.0, ES2.0 and ES2.1 with omap2plus_defconfig. It still requires some test on OMAP3 and OMAP2. Thanks, Benoit PATCH v1 http://www.spinics.net/lists/linux-omap/msg40039.html - Add a patch from Tony to remove the partition information used only for debugfs purpose. A look up is done when needed in order to save some memory. - Add a patch from Dan, to add __func__ information during pr_xxx calls. - Add patch from Tony to fix a crash reported by Anand Gadiyar gadi...@ti.com on zoom3 https://patchwork.kernel.org/patch/325622/ RFC v2: http://www.spinics.net/lists/linux-omap/msg38995.html - Take into account Tony's proposal to store partition information in a partition structure instead of inside every pad entries. - Remove some cpu_is_xxx calls from the core code by adding a couple of flags during partition init. RFC v1: http://www.spinics.net/lists/linux-omap/msg37158.html Benoit Cousson (6): OMAP: mux: Replace printk with pr_xxx macros OMAP: mux: Add support for control module split in several partitions OMAP4: mux: Add CBL package data for OMAP4430 ES1 OMAP4: sdp4430: Select CBL package for ES1 and initialize mux OMAP4: mux: Add CBS package data for OMAP4430 ES2 OMAP4: sdp4430: Select CBS package for ES2 Dan Murphy (1): OMAP: mux: Add __func__ macro to pr_xxx macros sricharan (1): OMAP4: pandaboard: Select CBL CBS package and initialize mux arch/arm/mach-omap2/Kconfig | 10 + arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/board-4430sdp.c | 14 + arch/arm/mach-omap2/board-omap4panda.c | 16 + arch/arm/mach-omap2/board-rx51-peripherals.c | 12 +- arch/arm/mach-omap2/mux.c| 369 -- arch/arm/mach-omap2/mux.h| 83 ++- arch/arm/mach-omap2/mux2420.c| 10 +- arch/arm/mach-omap2/mux2430.c| 10 +- arch/arm/mach-omap2/mux34xx.c|9 +- arch/arm/mach-omap2/mux44xx.c| 1625 ++ arch/arm/mach-omap2/mux44xx.h| 298 + 12 files changed, 2310 insertions(+), 147 deletions(-) create mode 100644 arch/arm/mach-omap2/mux44xx.c create mode 100644 arch/arm/mach-omap2/mux44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/8] OMAP: mux: Replace printk with pr_xxx macros
Replace all the printk(KERN_XXX... with pr_xxx macros.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/mux.c | 38 +++---
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 074536a..979e9d1 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -102,13 +102,13 @@ int __init omap_mux_init_gpio(int gpio, int val)
}
if (found == 0) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return -ENODEV;
}
if (found 1) {
- printk(KERN_INFO mux: Multiple gpio paths (%d) for gpio%i\n,
- found, gpio);
+ pr_info(mux: Multiple gpio paths (%d) for gpio%i\n,
+ found, gpio);
return -EINVAL;
}
@@ -118,8 +118,8 @@ int __init omap_mux_init_gpio(int gpio, int val)
mux_mode |= OMAP_MUX_MODE3;
else
mux_mode |= OMAP_MUX_MODE4;
- printk(KERN_DEBUG mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
- gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
+ pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
+gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
omap_mux_write(mux_mode, gpio_mux-reg_offset);
return 0;
@@ -161,9 +161,9 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
old_mode = omap_mux_read(m-reg_offset);
mux_mode = val | i;
- printk(KERN_DEBUG mux: Setting signal
- %s.%s 0x%04x - 0x%04x\n,
- m0_entry, muxname, old_mode, mux_mode);
+ pr_debug(mux: Setting signal
+%s.%s 0x%04x - 0x%04x\n,
+m0_entry, muxname, old_mode, mux_mode);
omap_mux_write(mux_mode, m-reg_offset);
found++;
}
@@ -174,12 +174,12 @@ int __init omap_mux_init_signal(const char *muxname, int
val)
return 0;
if (found 1) {
- printk(KERN_ERR mux: Multiple signal paths (%i) for %s\n,
- found, muxname);
+ pr_err(mux: Multiple signal paths (%i) for %s\n,
+ found, muxname);
return -EINVAL;
}
- printk(KERN_ERR mux: Could not set signal %s\n, muxname);
+ pr_err(mux: Could not set signal %s\n, muxname);
return -ENODEV;
}
@@ -462,8 +462,8 @@ static void __init omap_mux_package_fixup(struct omap_mux
*p,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown entry offset 0x%x\n,
- p-reg_offset);
+ pr_err(mux: Unknown entry offset 0x%x\n,
+ p-reg_offset);
p++;
}
}
@@ -487,8 +487,8 @@ static void __init omap_mux_package_init_balls(struct
omap_ball *b,
s++;
}
if (!found)
- printk(KERN_ERR mux: Unknown ball offset 0x%x\n,
- b-reg_offset);
+ pr_err(mux: Unknown ball offset 0x%x\n,
+ b-reg_offset);
b++;
}
}
@@ -615,7 +615,7 @@ u16 omap_mux_get_gpio(int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not get gpio%i\n, gpio);
+ pr_err(mux: Could not get gpio%i\n, gpio);
return offset;
}
@@ -629,7 +629,7 @@ void omap_mux_set_gpio(u16 val, int gpio)
offset = omap_mux_get_by_gpio(gpio);
if (offset == OMAP_MUX_TERMINATOR) {
- printk(KERN_ERR mux: Could not set gpio%i\n, gpio);
+ pr_err(mux: Could not set gpio%i\n, gpio);
return;
}
@@ -687,7 +687,7 @@ static void __init omap_mux_init_list(struct omap_mux
*superset)
entry = omap_mux_list_add(superset);
if (!entry) {
- printk(KERN_ERR mux: Could not add entry\n);
+ pr_err(mux: Could not add entry\n);
return;
}
superset++;
@@ -738,7 +738,7 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
mux_phys = mux_pbase;
mux_base = ioremap(mux_pbase, mux_size);
if (!mux_base
[PATCH v2 2/8] OMAP: mux: Add support for control module split in several partitions
Starting on OMAP4, the pin mux configuration is located in two
different partitions of the control module (CODE_PAD and WKUP_PAD).
The first one is inside the core power domain whereas the second
one is inside the wakeup.
- Add the capability to add any number of partition during board init
time depending of Soc partitioning.
- Add some init flags as well in order to avoid explicit Soc version
check inside the mux core code.
- Add a comment with mux0 mode on top of omap_mux/board/partition
if the current mux mode is not the default one.
Thanks to Tony Lindgren t...@atomide.com for the following improvements:
- Add omap_mux_get for getting the partition data so platform level
device code can use it.
- Fix the rx51 board code to use the new API.
- Do not store the partition for each mux entry. Look up the partition
for debugfs instead.
Thanks to Dan Murphy dmur...@ti.com for testing on OMAP4 and reporting
a couple of bugs.
Thanks to Anand Gadiyar gadi...@ti.com for testing on OMAP3 zoom and
bug report.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Tested-by: Murphy Dan dmur...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 12 +-
arch/arm/mach-omap2/mux.c| 337 ++
arch/arm/mach-omap2/mux.h| 70 +-
arch/arm/mach-omap2/mux2420.c|7 +-
arch/arm/mach-omap2/mux2430.c|7 +-
arch/arm/mach-omap2/mux34xx.c|7 +-
6 files changed, 312 insertions(+), 128 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 3fec4d6..3fda20d 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -293,6 +293,8 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
+static struct omap_mux_partition *partition;
+
/*
* Current flows to eMMC when eMMC is off and the data lines are pulled up,
* so pull them down. N.B. we pull 8 lines because we are using 8 lines.
@@ -300,9 +302,9 @@ static struct omap_board_mux rx51_mmc2_off_mux[] = {
static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
{
if (power_on)
- omap_mux_write_array(rx51_mmc2_on_mux);
+ omap_mux_write_array(partition, rx51_mmc2_on_mux);
else
- omap_mux_write_array(rx51_mmc2_off_mux);
+ omap_mux_write_array(partition, rx51_mmc2_off_mux);
}
static struct omap2_hsmmc_info mmc[] __initdata = {
@@ -922,7 +924,11 @@ void __init rx51_peripherals_init(void)
rx51_init_wl1251();
spi_register_board_info(rx51_peripherals_spi_board_info,
ARRAY_SIZE(rx51_peripherals_spi_board_info));
- omap2_hsmmc_init(mmc);
+
+ partition = omap_mux_get(core);
+ if (partition)
+ omap2_hsmmc_init(mmc);
+
platform_device_register(rx51_charger_device);
}
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 979e9d1..9221570 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,9 +1,9 @@
/*
* linux/arch/arm/mach-omap2/mux.c
*
- * OMAP2 and OMAP3 pin multiplexing configurations
+ * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations
*
- * Copyright (C) 2004 - 2008 Texas Instruments Inc.
+ * Copyright (C) 2004 - 2010 Texas Instruments Inc.
* Copyright (C) 2003 - 2008 Nokia Corporation
*
* Written by Tony Lindgren
@@ -40,60 +40,72 @@
#define OMAP_MUX_BASE_OFFSET 0x30/* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ 0x5ca
-#define MUXABLE_GPIO_MODE3 BIT(0)
struct omap_mux_entry {
struct omap_mux mux;
struct list_headnode;
};
-static unsigned long mux_phys;
-static void __iomem *mux_base;
-static u8 omap_mux_flags;
+static LIST_HEAD(mux_partitions);
+static DEFINE_MUTEX(muxmode_mutex);
+
+struct omap_mux_partition *omap_mux_get(const char *name)
+{
+ struct omap_mux_partition *partition;
+
+ list_for_each_entry(partition, mux_partitions, node) {
+ if (!strcmp(name, partition-name))
+ return partition;
+ }
-u16 omap_mux_read(u16 reg)
+ return NULL;
+}
+
+u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg)
{
- if (cpu_is_omap24xx())
- return __raw_readb(mux_base + reg);
+ if (partition-flags OMAP_MUX_REG_8BIT)
+ return __raw_readb(partition-base + reg);
else
- return __raw_readw(mux_base + reg);
+ return __raw_readw(partition-base + reg);
}
-void omap_mux_write(u16 val, u16 reg)
+void omap_mux_write(struct
[PATCH v2 4/8] OMAP4: sdp4430: Select CBL package for ES1 and initialize mux
Select the CBL package if SDP4430 is enabled during config.
Initialize the mux framework during the board init.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c | 10 ++
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index e14c73d..7efb256 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -280,6 +280,7 @@ config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
default y
depends on ARCH_OMAP4
+ select OMAP_PACKAGE_CBL
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index df5a425..e4f1726 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -35,6 +35,7 @@
#include plat/usb.h
#include plat/mmc.h
+#include mux.h
#include hsmmc.h
#include timer-gp.h
#include control.h
@@ -505,10 +506,19 @@ static void __init omap_sfh7741prox_init(void)
}
}
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux NULL
+#endif
+
static void __init omap_4430sdp_init(void)
{
int status;
+ omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
--
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[PATCH v2 8/8] OMAP: mux: Add __func__ macro to pr_xxx macros
From: Dan Murphy dmur...@ti.com
Removed mux: and added the __func__ macro to make debugging
easier.
Signed-off-by: Dan Murphy dmur...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/mux.c | 30 +++---
arch/arm/mach-omap2/mux2420.c |3 ++-
arch/arm/mach-omap2/mux2430.c |3 ++-
arch/arm/mach-omap2/mux34xx.c |2 +-
arch/arm/mach-omap2/mux44xx.c |6 +++---
5 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 9221570..3d71d93 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -114,12 +114,12 @@ static int __init _omap_mux_init_gpio(struct
omap_mux_partition *partition,
}
if (found == 0) {
- pr_err(mux: Could not set gpio%i\n, gpio);
+ pr_err(%s: Could not set gpio%i\n, __func__, gpio);
return -ENODEV;
}
if (found 1) {
- pr_info(mux: Multiple gpio paths (%d) for gpio%i\n,
+ pr_info(%s: Multiple gpio paths (%d) for gpio%i\n, __func__,
found, gpio);
return -EINVAL;
}
@@ -130,7 +130,7 @@ static int __init _omap_mux_init_gpio(struct
omap_mux_partition *partition,
mux_mode |= OMAP_MUX_MODE3;
else
mux_mode |= OMAP_MUX_MODE4;
- pr_debug(mux: Setting signal %s.gpio%i 0x%04x - 0x%04x\n,
+ pr_debug(%s: Setting signal %s.gpio%i 0x%04x - 0x%04x\n, __func__,
gpio_mux-muxnames[0], gpio, old_mode, mux_mode);
omap_mux_write(partition, mux_mode, gpio_mux-reg_offset);
@@ -190,8 +190,8 @@ static int __init _omap_mux_init_signal(struct
omap_mux_partition *partition,
old_mode = omap_mux_read(partition,
m-reg_offset);
mux_mode = val | i;
- pr_debug(mux: Setting signal
-%s.%s 0x%04x - 0x%04x\n,
+ pr_debug(%s: Setting signal
+%s.%s 0x%04x - 0x%04x\n, __func__,
m0_entry, muxname, old_mode, mux_mode);
omap_mux_write(partition, mux_mode,
m-reg_offset);
@@ -204,12 +204,12 @@ static int __init _omap_mux_init_signal(struct
omap_mux_partition *partition,
return 0;
if (found 1) {
- pr_err(mux: Multiple signal paths (%i) for %s\n,
+ pr_err(%s: Multiple signal paths (%i) for %s\n, __func__,
found, muxname);
return -EINVAL;
}
- pr_err(mux: Could not set signal %s\n, muxname);
+ pr_err(%s: Could not set signal %s\n, __func__, muxname);
return -ENODEV;
}
@@ -561,7 +561,7 @@ static void __init omap_mux_package_fixup(struct omap_mux
*p,
s++;
}
if (!found)
- pr_err(mux: Unknown entry offset 0x%x\n,
+ pr_err(%s: Unknown entry offset 0x%x\n, __func__,
p-reg_offset);
p++;
}
@@ -586,7 +586,7 @@ static void __init omap_mux_package_init_balls(struct
omap_ball *b,
s++;
}
if (!found)
- pr_err(mux: Unknown ball offset 0x%x\n,
+ pr_err(%s: Unknown ball offset 0x%x\n, __func__,
b-reg_offset);
b++;
}
@@ -722,7 +722,7 @@ u16 omap_mux_get_gpio(int gpio)
}
if (!m || m-reg_offset == OMAP_MUX_TERMINATOR)
- pr_err(mux: Could not get gpio%i\n, gpio);
+ pr_err(%s: Could not get gpio%i\n, __func__, gpio);
return OMAP_MUX_TERMINATOR;
}
@@ -742,7 +742,7 @@ void omap_mux_set_gpio(u16 val, int gpio)
}
if (!m || m-reg_offset == OMAP_MUX_TERMINATOR)
- pr_err(mux: Could not set gpio%i\n, gpio);
+ pr_err(%s: Could not set gpio%i\n, __func__, gpio);
}
static struct omap_mux * __init omap_mux_list_add(
@@ -800,7 +800,7 @@ static void __init omap_mux_init_list(struct
omap_mux_partition *partition,
entry = omap_mux_list_add(partition, superset);
if (!entry) {
- pr_err(mux: Could not add entry\n);
+ pr_err(%s: Could not add entry\n, __func__);
return;
}
superset++;
@@ -862,8 +862,8 @@ int __init omap_mux_init(const char *name, u32 flags,
partition-phys = mux_pbase;
partition-base = ioremap(mux_pbase, mux_size);
if (!partition-base) {
- pr_err(mux: Could
[PATCH v2 6/8] OMAP4: sdp4430: Select CBS package for ES2
Select the CBS package if SDP4430 is enabled during config.
Use the proper package (CBL or CBS) based on chip revision.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/board-4430sdp.c |6 +-
2 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 92fea63..39229cf 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -284,6 +284,7 @@ config MACH_OMAP_4430SDP
default y
depends on ARCH_OMAP4
select OMAP_PACKAGE_CBL
+ select OMAP_PACKAGE_CBS
config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index e4f1726..94d989b 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -517,8 +517,12 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init omap_4430sdp_init(void)
{
int status;
+ int package = OMAP_PACKAGE_CBS;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ package = OMAP_PACKAGE_CBL;
+ omap4_mux_init(board_mux, package);
- omap4_mux_init(board_mux, OMAP_PACKAGE_CBL);
omap4_i2c_init();
omap_sfh7741prox_init();
platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
--
1.7.0.4
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[PATCH v2 5/8] OMAP4: mux: Add CBS package data for OMAP4430 ES2
Please note that the full muxmodes are re-defined for ES2 instead
of using the subset. There are 81 differences among 204 pins.
The subset fixup will have to iterate over the whole list for each
subset entry, which can lead to an important number of iteration.
On the other hand, it will take much more memory at boot time.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/Kconfig |3 +
arch/arm/mach-omap2/mux.h |1 +
arch/arm/mach-omap2/mux44xx.c | 741 -
arch/arm/mach-omap2/mux44xx.h | 21 ++
4 files changed, 758 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7efb256..92fea63 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -88,6 +88,9 @@ config OMAP_PACKAGE_CBP
config OMAP_PACKAGE_CBL
bool
+config OMAP_PACKAGE_CBS
+ bool
+
comment OMAP Board Type
depends on ARCH_OMAP2PLUS
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 7aca779..79076d6 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -62,6 +62,7 @@
/* Flags for omapX_mux_init */
#define OMAP_PACKAGE_MASK 0x
+#define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
diff --git a/arch/arm/mach-omap2/mux44xx.c b/arch/arm/mach-omap2/mux44xx.c
index 5e9d60a..80335f3 100644
--- a/arch/arm/mach-omap2/mux44xx.c
+++ b/arch/arm/mach-omap2/mux44xx.c
@@ -48,7 +48,7 @@
}
/*
- * Superset of all mux modes for omap4
+ * Superset of all mux modes for omap4 ES1.0
*/
static struct omap_mux __initdata omap4_core_muxmodes[] = {
_OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
@@ -755,6 +755,724 @@ struct omap_ball __initdata omap4_core_cbl_ball[] = {
#endif
/*
+ * Superset of all mux modes for omap4 ES2.0
+ */
+static struct omap_mux __initdata omap4_es2_core_muxmodes[] = {
+ _OMAP4_MUXENTRY(GPMC_AD0, 0, gpmc_ad0, sdmmc2_dat0, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD1, 0, gpmc_ad1, sdmmc2_dat1, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD2, 0, gpmc_ad2, sdmmc2_dat2, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD3, 0, gpmc_ad3, sdmmc2_dat3, NULL, NULL,
+ NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD4, 0, gpmc_ad4, sdmmc2_dat4,
+ sdmmc2_dir_dat0, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD5, 0, gpmc_ad5, sdmmc2_dat5,
+ sdmmc2_dir_dat1, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD6, 0, gpmc_ad6, sdmmc2_dat6,
+ sdmmc2_dir_cmd, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD7, 0, gpmc_ad7, sdmmc2_dat7,
+ sdmmc2_clk_fdbk, NULL, NULL, NULL, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD8, 32, gpmc_ad8, kpd_row0, c2c_data15,
+ gpio_32, NULL, sdmmc1_dat0, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD9, 33, gpmc_ad9, kpd_row1, c2c_data14,
+ gpio_33, NULL, sdmmc1_dat1, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD10, 34, gpmc_ad10, kpd_row2, c2c_data13,
+ gpio_34, NULL, sdmmc1_dat2, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD11, 35, gpmc_ad11, kpd_row3, c2c_data12,
+ gpio_35, NULL, sdmmc1_dat3, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD12, 36, gpmc_ad12, kpd_col0, c2c_data11,
+ gpio_36, NULL, sdmmc1_dat4, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD13, 37, gpmc_ad13, kpd_col1, c2c_data10,
+ gpio_37, NULL, sdmmc1_dat5, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD14, 38, gpmc_ad14, kpd_col2, c2c_data9,
+ gpio_38, NULL, sdmmc1_dat6, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_AD15, 39, gpmc_ad15, kpd_col3, c2c_data8,
+ gpio_39, NULL, sdmmc1_dat7, NULL, NULL),
+ _OMAP4_MUXENTRY(GPMC_A16, 40, gpmc_a16, kpd_row4, c2c_datain0,
+ gpio_40, venc_656_data0, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A17, 41, gpmc_a17, kpd_row5, c2c_datain1,
+ gpio_41, venc_656_data1, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A18, 42, gpmc_a18, kpd_row6, c2c_datain2,
+ gpio_42, venc_656_data2, NULL, NULL, safe_mode),
+ _OMAP4_MUXENTRY(GPMC_A19, 43, gpmc_a19, kpd_row7, c2c_datain3,
+ gpio_43, venc_656_data3, NULL
[PATCH v2 7/8] OMAP4: pandaboard: Select CBL CBS package and initialize mux
From: sricharan r.sricha...@ti.com
The mux framework allows the change of pad configuration by drivers
when needed. Prior to this the mux framework has to be initialised
with all the mux parameters specific to the board. The mux init is
already present in the board file for SDP. Adding the mux init
for panda boards.
Signed-off-by: sricharan r.sricha...@ti.com
Acked-by: Anand Gadiyar gadi...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/Kconfig|2 ++
arch/arm/mach-omap2/board-omap4panda.c | 16
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 39229cf..186d270 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -290,6 +290,8 @@ config MACH_OMAP4_PANDA
bool OMAP4 Panda Board
default y
depends on ARCH_OMAP4
+ select OMAP_PACKAGE_CBL
+ select OMAP_PACKAGE_CBS
config OMAP3_EMU
bool OMAP3 debugging peripherals
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 1ecd0a6..801f814 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -40,6 +40,7 @@
#include hsmmc.h
#include control.h
+#include mux.h
#define GPIO_HUB_POWER 1
#define GPIO_HUB_NRESET62
@@ -368,8 +369,23 @@ static int __init omap4_panda_i2c_init(void)
omap_register_i2c_bus(4, 400, NULL, 0);
return 0;
}
+
+#ifdef CONFIG_OMAP_MUX
+static struct omap_board_mux board_mux[] __initdata = {
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+#else
+#define board_mux NULL
+#endif
+
static void __init omap4_panda_init(void)
{
+ int package = OMAP_PACKAGE_CBS;
+
+ if (omap_rev() == OMAP4430_REV_ES1_0)
+ package = OMAP_PACKAGE_CBL;
+ omap4_mux_init(board_mux, package);
+
omap4_panda_i2c_init();
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
omap_serial_init();
--
1.7.0.4
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[PATCH 0/4] OMAP: hwmod core fix and cleanup for 2.6.38
Hi Paul, Here is a small series that just remove the omap_hwmod_mutex and move functions not needed at runtime to the __init section. It fix as well a bug discovered during the on-going hwmod migration of device that does have a functional clock external (mcpdm). The series is based on mainline (2.6.37-rc2) and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/hwmod Tested on SDP4430 ES2.0 with omap2plus_defconfig. It still requires some test on OMAP3 and OMAP2. Regards, Benoit Benoit Cousson (3): OMAP: hwmod: Make omap_hwmod_register private and remove omap_hwmod_unregister OMAP: hwmod: Mark functions used only during initialization with __init OMAP: hwmod: Remove omap_hwmod_mutex Rajendra Nayak (1): OMAP: hwmod: Disable clocks when hwmod enable fails arch/arm/mach-omap2/omap_hwmod.c | 152 +- arch/arm/plat-omap/include/plat/omap_hwmod.h |2 - 2 files changed, 54 insertions(+), 100 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] OMAP: hwmod: Make omap_hwmod_register private and remove omap_hwmod_unregister
Do not allow omap_hwmod_register to be used outside the core
hwmod code. An omap_hwmod should be register only at init time.
Remove the omap_hwmod_unregister that is not used today since the
hwmod list will be build once at init time and never be modified
at runtime.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 135 ++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 -
2 files changed, 54 insertions(+), 83 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5a30658..9cedea0 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1374,6 +1374,58 @@ static int _setup(struct omap_hwmod *oh, void *data)
return 0;
}
+/**
+ * _register - register a struct omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
+ * already has been registered by the same name; -EINVAL if the
+ * omap_hwmod is in the wrong state, if @oh is NULL, if the
+ * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
+ * name, or if the omap_hwmod's class is missing a name; or 0 upon
+ * success.
+ *
+ * XXX The data should be copied into bootmem, so the original data
+ * should be marked __initdata and freed after init. This would allow
+ * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
+ * that the copy process would be relatively complex due to the large number
+ * of substructures.
+ */
+static int _register(struct omap_hwmod *oh)
+{
+ int ret, ms_id;
+
+ if (!oh || !oh-name || !oh-class || !oh-class-name ||
+ (oh-_state != _HWMOD_STATE_UNKNOWN))
+ return -EINVAL;
+
+ mutex_lock(omap_hwmod_mutex);
+
+ pr_debug(omap_hwmod: %s: registering\n, oh-name);
+
+ if (_lookup(oh-name)) {
+ ret = -EEXIST;
+ goto ohr_unlock;
+ }
+
+ ms_id = _find_mpu_port_index(oh);
+ if (!IS_ERR_VALUE(ms_id)) {
+ oh-_mpu_port_index = ms_id;
+ oh-_mpu_rt_va = _find_mpu_rt_base(oh, oh-_mpu_port_index);
+ } else {
+ oh-_int_flags |= _HWMOD_NO_MPU_PORT;
+ }
+
+ list_add_tail(oh-node, omap_hwmod_list);
+
+ oh-_state = _HWMOD_STATE_REGISTERED;
+
+ ret = 0;
+
+ohr_unlock:
+ mutex_unlock(omap_hwmod_mutex);
+ return ret;
+}
/* Public functions */
@@ -1427,59 +1479,6 @@ int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh,
u8 idlemode)
}
/**
- * omap_hwmod_register - register a struct omap_hwmod
- * @oh: struct omap_hwmod *
- *
- * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
- * already has been registered by the same name; -EINVAL if the
- * omap_hwmod is in the wrong state, if @oh is NULL, if the
- * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
- * name, or if the omap_hwmod's class is missing a name; or 0 upon
- * success.
- *
- * XXX The data should be copied into bootmem, so the original data
- * should be marked __initdata and freed after init. This would allow
- * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
- * that the copy process would be relatively complex due to the large number
- * of substructures.
- */
-int omap_hwmod_register(struct omap_hwmod *oh)
-{
- int ret, ms_id;
-
- if (!oh || !oh-name || !oh-class || !oh-class-name ||
- (oh-_state != _HWMOD_STATE_UNKNOWN))
- return -EINVAL;
-
- mutex_lock(omap_hwmod_mutex);
-
- pr_debug(omap_hwmod: %s: registering\n, oh-name);
-
- if (_lookup(oh-name)) {
- ret = -EEXIST;
- goto ohr_unlock;
- }
-
- ms_id = _find_mpu_port_index(oh);
- if (!IS_ERR_VALUE(ms_id)) {
- oh-_mpu_port_index = ms_id;
- oh-_mpu_rt_va = _find_mpu_rt_base(oh, oh-_mpu_port_index);
- } else {
- oh-_int_flags |= _HWMOD_NO_MPU_PORT;
- }
-
- list_add_tail(oh-node, omap_hwmod_list);
-
- oh-_state = _HWMOD_STATE_REGISTERED;
-
- ret = 0;
-
-ohr_unlock:
- mutex_unlock(omap_hwmod_mutex);
- return ret;
-}
-
-/**
* omap_hwmod_lookup - look up a registered omap_hwmod by name
* @name: name of the omap_hwmod to look up
*
@@ -1558,8 +1557,8 @@ int omap_hwmod_init(struct omap_hwmod **ohs)
oh = *ohs;
while (oh) {
if (omap_chip_is(oh-omap_chip)) {
- r = omap_hwmod_register(oh);
- WARN(r, omap_hwmod: %s: omap_hwmod_register returned
+ r = _register(oh);
+ WARN(r, omap_hwmod: %s: _register returned
%d\n, oh-name, r);
}
oh = *++ohs;
@@ -1597,32 +1596,6 @@ int omap_hwmod_late_init(u8 skip_setup_idle
[PATCH 2/4] OMAP: hwmod: Mark functions used only during initialization with __init
_register, _find_mpu_port_index and _find_mpu_rt_base are static APIs
that will be used only during the omap_hwmod initialization phase.
There is no need to keep them for runtime.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9cedea0..8e47006 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -675,7 +675,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
* Returns the array index of the OCP slave port that the MPU
* addresses the device on, or -EINVAL upon error or not found.
*/
-static int _find_mpu_port_index(struct omap_hwmod *oh)
+static int __init _find_mpu_port_index(struct omap_hwmod *oh)
{
int i;
int found = 0;
@@ -709,7 +709,7 @@ static int _find_mpu_port_index(struct omap_hwmod *oh)
* Return the virtual address of the base of the register target of
* device @oh, or NULL on error.
*/
-static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
+static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
{
struct omap_hwmod_ocp_if *os;
struct omap_hwmod_addr_space *mem;
@@ -1391,7 +1391,7 @@ static int _setup(struct omap_hwmod *oh, void *data)
* that the copy process would be relatively complex due to the large number
* of substructures.
*/
-static int _register(struct omap_hwmod *oh)
+static int __init _register(struct omap_hwmod *oh)
{
int ret, ms_id;
@@ -1541,7 +1541,7 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh,
void *data),
* listed in @ohs that are valid for this chip. Returns -EINVAL if
* omap_hwmod_init() has already been called or 0 otherwise.
*/
-int omap_hwmod_init(struct omap_hwmod **ohs)
+int __init omap_hwmod_init(struct omap_hwmod **ohs)
{
struct omap_hwmod *oh;
int r;
--
1.7.0.4
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[PATCH 3/4] OMAP: hwmod: Remove omap_hwmod_mutex
The hwmod list will be built are init time and never
modified at runtime. There is no need anymore to protect
the list from concurrent access using the mutex.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 26 --
1 files changed, 4 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8e47006..f221587 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -156,8 +156,6 @@
/* omap_hwmod_list contains all registered struct omap_hwmods */
static LIST_HEAD(omap_hwmod_list);
-static DEFINE_MUTEX(omap_hwmod_mutex);
-
/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
static struct omap_hwmod *mpu_oh;
@@ -874,7 +872,6 @@ static void _shutdown_sysc(struct omap_hwmod *oh)
* @name: find an omap_hwmod by name
*
* Return a pointer to an omap_hwmod by name, or NULL if not found.
- * Caller must hold omap_hwmod_mutex.
*/
static struct omap_hwmod *_lookup(const char *name)
{
@@ -1399,14 +1396,10 @@ static int __init _register(struct omap_hwmod *oh)
(oh-_state != _HWMOD_STATE_UNKNOWN))
return -EINVAL;
- mutex_lock(omap_hwmod_mutex);
-
pr_debug(omap_hwmod: %s: registering\n, oh-name);
- if (_lookup(oh-name)) {
- ret = -EEXIST;
- goto ohr_unlock;
- }
+ if (_lookup(oh-name))
+ return -EEXIST;
ms_id = _find_mpu_port_index(oh);
if (!IS_ERR_VALUE(ms_id)) {
@@ -1422,8 +1415,6 @@ static int __init _register(struct omap_hwmod *oh)
ret = 0;
-ohr_unlock:
- mutex_unlock(omap_hwmod_mutex);
return ret;
}
@@ -1492,9 +1483,7 @@ struct omap_hwmod *omap_hwmod_lookup(const char *name)
if (!name)
return NULL;
- mutex_lock(omap_hwmod_mutex);
oh = _lookup(name);
- mutex_unlock(omap_hwmod_mutex);
return oh;
}
@@ -1520,13 +1509,11 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod
*oh, void *data),
if (!fn)
return -EINVAL;
- mutex_lock(omap_hwmod_mutex);
list_for_each_entry(temp_oh, omap_hwmod_list, node) {
ret = (*fn)(temp_oh, data);
if (ret)
break;
}
- mutex_unlock(omap_hwmod_mutex);
return ret;
}
@@ -2048,9 +2035,8 @@ int omap_hwmod_read_hardreset(struct omap_hwmod *oh,
const char *name)
* @fn: callback function pointer to call for each hwmod in class @classname
* @user: arbitrary context data to pass to the callback function
*
- * For each omap_hwmod of class @classname, call @fn. Takes
- * omap_hwmod_mutex to prevent the hwmod list from changing during the
- * iteration. If the callback function returns something other than
+ * For each omap_hwmod of class @classname, call @fn.
+ * If the callback function returns something other than
* zero, the iterator is terminated, and the callback function's return
* value is passed back to the caller. Returns 0 upon success, -EINVAL
* if @classname or @fn are NULL, or passes back the error code from @fn.
@@ -2069,8 +2055,6 @@ int omap_hwmod_for_each_by_class(const char *classname,
pr_debug(omap_hwmod: %s: looking for modules of class %s\n,
__func__, classname);
- mutex_lock(omap_hwmod_mutex);
-
list_for_each_entry(temp_oh, omap_hwmod_list, node) {
if (!strcmp(temp_oh-class-name, classname)) {
pr_debug(omap_hwmod: %s: %s: calling callback fn\n,
@@ -2081,8 +2065,6 @@ int omap_hwmod_for_each_by_class(const char *classname,
}
}
- mutex_unlock(omap_hwmod_mutex);
-
if (ret)
pr_debug(omap_hwmod: %s: iterator terminated early: %d\n,
__func__, ret);
--
1.7.0.4
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[PATCH 4/4] OMAP: hwmod: Disable clocks when hwmod enable fails
From: Rajendra Nayak rna...@ti.com
In cases where a module (hwmod) does not become accesible on enabling
the main clocks (can happen if there are external clocks needed
for the module to become accesible), make sure the clocks are not
left enabled.
This ensures that when the requisite external dependencies are met
a omap_hwmod_enable and omap_hwmod_idle/shutdown would rightly enable
and disable clocks using clk framework. Leaving the clocks enabled in
the error case causes additional usecounting at the clock framework
level leaving the clock enabled forever.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f221587..896012d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1210,6 +1210,7 @@ int _omap_hwmod_enable(struct omap_hwmod *oh)
_enable_sysc(oh);
}
} else {
+ _disable_clocks(oh);
pr_debug(omap_hwmod: %s: _wait_target_ready: %d\n,
oh-name, r);
}
--
1.7.0.4
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[PATCH 0/6] OMAP34: clock data: Fixes and add new clocks nodes
Hi Paul, Here is a collections of fixes and clock nodes addition done on OMAP3 and OMAP4 clock data files. I have included the one that Thara already submitted after fixing the various comments done on the original revision. The series is based on 2.6.37-rc4 and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/clock Regards, Benoit Benoit Cousson (2): OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk OMAP3: clock data: Add wkup_clkdm in sr1_fck and sr2_fck Jonathan Bergsagel (1): OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck Rajendra Nayak (2): OMAP4: clock data: Add SCRM auxiliary clock nodes OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks Thara Gopinath (1): OMAP4: clock data: Add missing DPLL x2 clock nodes arch/arm/mach-omap2/clock3xxx_data.c |2 + arch/arm/mach-omap2/clock44xx_data.c | 620 -- arch/arm/mach-omap2/scrm_44xx.h | 148 3 files changed, 590 insertions(+), 180 deletions(-) create mode 100644 arch/arm/mach-omap2/scrm_44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/6] OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk
The gating of pad_clks and slimbus_ck is controlled by the PRCM, but
since the clock source is external, this is the SW responsability
to gate / un-gate it when the mcpdm or slimbus module need to be used.
There is no autogating possible with such external clock.
Add SW control to enable / disable this SW gating in the pad_clks_ck
and slimbus_clk clock node.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Sebastien Guiriec s-guir...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 1599836..4395e2e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -47,7 +47,9 @@ static struct clk extalt_clkin_ck = {
static struct clk pad_clks_ck = {
.name = pad_clks_ck,
.rate = 1200,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
+ .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT,
};
static struct clk pad_slimbus_core_clks_ck = {
@@ -65,7 +67,9 @@ static struct clk secure_32k_clk_src_ck = {
static struct clk slimbus_clk = {
.name = slimbus_clk,
.rate = 1200,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
+ .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
};
static struct clk sys_32k_ck = {
--
1.7.0.4
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[PATCH 2/6] OMAP3: clock data: Add wkup_clkdm in sr1_fck and sr2_fck
The smartreflex modules belong to an ALWON_FCLK clock domain that
does not have any SW control. The gating of that interface clock
is triggered by a transition of the WKUP clock domain to idle.
Attach both smartreflex instances on OMAP3 to the WKUP clock domain.
The missing clock domain field in srX_fck clock nodes was reported by
Kevin during the discussion about smartreflex on OMAP3:
https://patchwork.kernel.org/patch/199342/
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..741f6a0 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3044,6 +3044,7 @@ static struct clk sr1_fck = {
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR1_SHIFT,
+ .clkdm_name = wkup_clkdm,
.recalc = followparent_recalc,
};
@@ -3054,6 +3055,7 @@ static struct clk sr2_fck = {
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR2_SHIFT,
+ .clkdm_name = wkup_clkdm,
.recalc = followparent_recalc,
};
--
1.7.0.4
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[PATCH 3/6] OMAP4: clock data: Add missing DPLL x2 clock nodes
From: Thara Gopinath th...@ti.com
This patch extends the OMAP4 clock data to include
various x2 clock nodes between DPLL and HS dividers as the
clock framework skips a x2 while calculating the dpll locked
frequency.
The clock database extensions are autogenerated using
the scripts maintained by Benoit Cousson.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 423 --
1 files changed, 248 insertions(+), 175 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 4395e2e..123aa6d 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -269,11 +269,63 @@ static struct clk dpll_abe_ck = {
.set_rate = omap3_noncore_dpll_set_rate,
};
+static struct clk dpll_abe_x2_ck = {
+ .name = dpll_abe_x2_ck,
+ .parent = dpll_abe_ck,
+ .ops= clkops_null,
+ .recalc = omap3_clkoutx2_recalc,
+};
+
+static const struct clksel_rate div31_1to31_rates[] = {
+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
+ { .div = 2, .val = 2, .flags = RATE_IN_4430 },
+ { .div = 3, .val = 3, .flags = RATE_IN_4430 },
+ { .div = 4, .val = 4, .flags = RATE_IN_4430 },
+ { .div = 5, .val = 5, .flags = RATE_IN_4430 },
+ { .div = 6, .val = 6, .flags = RATE_IN_4430 },
+ { .div = 7, .val = 7, .flags = RATE_IN_4430 },
+ { .div = 8, .val = 8, .flags = RATE_IN_4430 },
+ { .div = 9, .val = 9, .flags = RATE_IN_4430 },
+ { .div = 10, .val = 10, .flags = RATE_IN_4430 },
+ { .div = 11, .val = 11, .flags = RATE_IN_4430 },
+ { .div = 12, .val = 12, .flags = RATE_IN_4430 },
+ { .div = 13, .val = 13, .flags = RATE_IN_4430 },
+ { .div = 14, .val = 14, .flags = RATE_IN_4430 },
+ { .div = 15, .val = 15, .flags = RATE_IN_4430 },
+ { .div = 16, .val = 16, .flags = RATE_IN_4430 },
+ { .div = 17, .val = 17, .flags = RATE_IN_4430 },
+ { .div = 18, .val = 18, .flags = RATE_IN_4430 },
+ { .div = 19, .val = 19, .flags = RATE_IN_4430 },
+ { .div = 20, .val = 20, .flags = RATE_IN_4430 },
+ { .div = 21, .val = 21, .flags = RATE_IN_4430 },
+ { .div = 22, .val = 22, .flags = RATE_IN_4430 },
+ { .div = 23, .val = 23, .flags = RATE_IN_4430 },
+ { .div = 24, .val = 24, .flags = RATE_IN_4430 },
+ { .div = 25, .val = 25, .flags = RATE_IN_4430 },
+ { .div = 26, .val = 26, .flags = RATE_IN_4430 },
+ { .div = 27, .val = 27, .flags = RATE_IN_4430 },
+ { .div = 28, .val = 28, .flags = RATE_IN_4430 },
+ { .div = 29, .val = 29, .flags = RATE_IN_4430 },
+ { .div = 30, .val = 30, .flags = RATE_IN_4430 },
+ { .div = 31, .val = 31, .flags = RATE_IN_4430 },
+ { .div = 0 },
+};
+
+static const struct clksel dpll_abe_m2x2_div[] = {
+ { .parent = dpll_abe_x2_ck, .rates = div31_1to31_rates },
+ { .parent = NULL },
+};
+
static struct clk dpll_abe_m2x2_ck = {
.name = dpll_abe_m2x2_ck,
- .parent = dpll_abe_ck,
+ .parent = dpll_abe_x2_ck,
+ .clksel = dpll_abe_m2x2_div,
+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
+ .clksel_mask= OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .recalc = omap2_clksel_recalc,
+ .round_rate = omap2_clksel_round_rate,
+ .set_rate = omap2_clksel_set_rate,
};
static struct clk abe_24m_fclk = {
@@ -330,50 +382,10 @@ static struct clk aess_fclk = {
.set_rate = omap2_clksel_set_rate,
};
-static const struct clksel_rate div31_1to31_rates[] = {
- { .div = 1, .val = 1, .flags = RATE_IN_4430 },
- { .div = 2, .val = 2, .flags = RATE_IN_4430 },
- { .div = 3, .val = 3, .flags = RATE_IN_4430 },
- { .div = 4, .val = 4, .flags = RATE_IN_4430 },
- { .div = 5, .val = 5, .flags = RATE_IN_4430 },
- { .div = 6, .val = 6, .flags = RATE_IN_4430 },
- { .div = 7, .val = 7, .flags = RATE_IN_4430 },
- { .div = 8, .val = 8, .flags = RATE_IN_4430 },
- { .div = 9, .val = 9, .flags = RATE_IN_4430 },
- { .div = 10, .val = 10, .flags = RATE_IN_4430 },
- { .div = 11, .val = 11, .flags = RATE_IN_4430 },
- { .div = 12, .val = 12, .flags = RATE_IN_4430 },
- { .div = 13, .val = 13, .flags = RATE_IN_4430 },
- { .div = 14, .val = 14, .flags = RATE_IN_4430 },
- { .div = 15, .val = 15, .flags = RATE_IN_4430 },
- { .div = 16, .val = 16, .flags = RATE_IN_4430 },
- { .div = 17, .val = 17, .flags = RATE_IN_4430 },
- { .div = 18, .val = 18, .flags = RATE_IN_4430 },
- { .div = 19, .val = 19, .flags = RATE_IN_4430 },
- { .div = 20, .val = 20, .flags
[PATCH 4/6] OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck
From: Jonathan Bergsagel jbergsa...@ti.com
Add register address, mask and link to the clksel structure that
were missing in the IVA DPLL mux clock node.
Signed-off-by: Jonathan Bergsagel jbergsa...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 123aa6d..6558d91 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -636,8 +636,12 @@ static const struct clksel iva_hsd_byp_clk_mux_sel[] = {
static struct clk iva_hsd_byp_clk_mux_ck = {
.name = iva_hsd_byp_clk_mux_ck,
.parent = sys_clkin_ck,
+ .clksel = iva_hsd_byp_clk_mux_sel,
+ .init = omap2_init_clksel_parent,
+ .clksel_reg = OMAP4430_CM_CLKSEL_DPLL_IVA,
+ .clksel_mask= OMAP4430_DPLL_BYP_CLKSEL_MASK,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .recalc = omap2_clksel_recalc,
};
/* DPLL_IVA */
--
1.7.0.4
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[PATCH 5/6] OMAP4: clock data: Add SCRM auxiliary clock nodes
From: Rajendra Nayak rna...@ti.com
Add support for auxiliary clocks nodes which are part of SCRM.
Add the header file with scrm registers offset and bitfield.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock44xx_data.c | 175 ++
arch/arm/mach-omap2/scrm_44xx.h | 148
2 files changed, 323 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/scrm_44xx.h
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 6558d91..626277a 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -35,6 +35,7 @@
#include prm.h
#include prm-regbits-44xx.h
#include control.h
+#include scrm_44xx.h
/* Root clocks */
@@ -2822,6 +2823,168 @@ static struct clk trace_clk_div_ck = {
.set_rate = omap2_clksel_set_rate,
};
+/* SCRM aux clk nodes */
+
+static const struct clksel auxclk_sel[] = {
+ { .parent = sys_clkin_ck, .rates = div_1_0_rates },
+ { .parent = dpll_core_m3x2_ck, .rates = div_1_1_rates },
+ { .parent = dpll_per_m3x2_ck, .rates = div_1_2_rates },
+ { .parent = NULL },
+};
+
+static struct clk auxclk0_ck = {
+ .name = auxclk0_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK0,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK0,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk1_ck = {
+ .name = auxclk1_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK1,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK1,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk2_ck = {
+ .name = auxclk2_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK2,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK2,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+static struct clk auxclk3_ck = {
+ .name = auxclk3_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK3,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK3,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk4_ck = {
+ .name = auxclk4_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK4,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK4,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk5_ck = {
+ .name = auxclk5_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK5,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK5,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static const struct clksel auxclkreq_sel[] = {
+ { .parent = auxclk0_ck, .rates = div_1_0_rates },
+ { .parent = auxclk1_ck, .rates = div_1_1_rates },
+ { .parent = auxclk2_ck, .rates = div_1_2_rates },
+ { .parent = auxclk3_ck, .rates = div_1_3_rates },
+ { .parent = auxclk4_ck, .rates = div_1_4_rates },
+ { .parent = auxclk5_ck, .rates = div_1_5_rates },
+ { .parent = NULL },
+};
+
+static struct clk auxclkreq0_ck = {
+ .name = auxclkreq0_ck,
+ .parent = auxclk0_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_null,
+ .clksel = auxclkreq_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLKREQ0,
+ .clksel_mask= OMAP4_MAPPING_MASK,
+ .recalc
[PATCH 6/6] OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks
From: Rajendra Nayak rna...@ti.com
The CORE and PER M3 post dividers are different from the rest of the
DPLL post dividers as in they go to SCRM, and are used
there to export clocks for instance used by external sensor.
There is no automatic HW dependency in PRCM to manage them. Hence these
two clocks (dpll post dividers) should be managed by SW and explicitly
enabled/disabled.
Add control in clock framework to handle that.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock44xx_data.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 626277a..8edee21 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -610,7 +610,9 @@ static struct clk dpll_core_m3x2_ck = {
.clksel = dpll_core_m6x2_div,
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.clksel_mask= OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = omap2_clksel_recalc,
.round_rate = omap2_clksel_round_rate,
.set_rate = omap2_clksel_set_rate,
@@ -869,7 +871,9 @@ static struct clk dpll_per_m3x2_ck = {
.clksel = dpll_per_m2x2_div,
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.clksel_mask= OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = omap2_clksel_recalc,
.round_rate = omap2_clksel_round_rate,
.set_rate = omap2_clksel_set_rate,
--
1.7.0.4
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[PATCH 0/3] OMAP: I2C and UART device name cleanup
Hi All, In order to enforce a little bit of consistency in the omap devices name, the convention for omap devices name will be now omap_XXX. All the drivers adapted to hwmod will be named like that during the on-going adaptations. The I2C and UART drivers are already adapted to hwmod but with the original names. Rename i2c and uart using this convention: i2c_omap - omap_i2c omap-hsuart - omap_uart Tested on OMAP4 ES2 on Panda / sdp4430. Some more validation will be needed on OMAP2 3. This series is based on Kevin's pm-hwmod-i2c branch and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/device_name Regards, Benoit Benoit Cousson (3): OMAP: clock: Change device name in clock nodes: i2c_omap - omap_i2c OMAP: i2c: Change device name: i2c_omap - omap_i2c OMAP: serial: Change device name: omap-hsuart - omap_uart arch/arm/mach-omap1/clock_data.c |6 +++--- arch/arm/mach-omap2/clock2420_data.c |8 arch/arm/mach-omap2/clock2430_data.c |8 arch/arm/mach-omap2/clock3xxx_data.c | 12 ++-- arch/arm/mach-omap2/clock44xx_data.c | 16 arch/arm/plat-omap/i2c.c |2 +- arch/arm/plat-omap/include/plat/omap-serial.h |2 +- drivers/i2c/busses/i2c-omap.c |4 ++-- 8 files changed, 29 insertions(+), 29 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] OMAP: clock: Change device name in clock nodes: i2c_omap - omap_i2c
The convention for omap device naming is omap_XXX.
Rename the device name used in clock dev noded in order to stick
to this naming convention.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap1/clock_data.c |6 +++---
arch/arm/mach-omap2/clock2420_data.c |8
arch/arm/mach-omap2/clock2430_data.c |8
arch/arm/mach-omap2/clock3xxx_data.c | 12 ++--
arch/arm/mach-omap2/clock44xx_data.c | 16
5 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index af54114..aa6dd67 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -736,9 +736,9 @@ static struct omap_clk omap_clks[] = {
CLK(mmci-omap.1, ick, armper_ck.clk, CK_16XX),
/* Virtual clocks */
CLK(NULL, mpu, virtual_ck_mpu, CK_16XX | CK_1510 |
CK_310),
- CLK(i2c_omap.1, fck,i2c_fck, CK_16XX | CK_1510 |
CK_310 | CK_7XX),
- CLK(i2c_omap.1, ick,i2c_ick, CK_16XX),
- CLK(i2c_omap.1, ick,dummy_ck, CK_1510 | CK_310 |
CK_7XX),
+ CLK(omap_i2c.1, fck,i2c_fck, CK_16XX | CK_1510 |
CK_310 | CK_7XX),
+ CLK(omap_i2c.1, ick,i2c_ick, CK_16XX),
+ CLK(omap_i2c.1, ick,dummy_ck, CK_1510 | CK_310 |
CK_7XX),
CLK(omap1_spi100k.1, fck, dummy_ck, CK_7XX),
CLK(omap1_spi100k.1, ick, dummy_ck, CK_7XX),
CLK(omap1_spi100k.2, fck, dummy_ck, CK_7XX),
diff --git a/arch/arm/mach-omap2/clock2420_data.c
b/arch/arm/mach-omap2/clock2420_data.c
index 21f8562..ed61ac2 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1862,10 +1862,10 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, eac_fck, eac_fck, CK_242X),
CLK(omap_hdq.0, ick,hdq_ick, CK_242X),
CLK(omap_hdq.1, fck,hdq_fck, CK_242X),
- CLK(i2c_omap.1, ick,i2c1_ick, CK_242X),
- CLK(i2c_omap.1, fck,i2c1_fck, CK_242X),
- CLK(i2c_omap.2, ick,i2c2_ick, CK_242X),
- CLK(i2c_omap.2, fck,i2c2_fck, CK_242X),
+ CLK(omap_i2c.1, ick,i2c1_ick, CK_242X),
+ CLK(omap_i2c.1, fck,i2c1_fck, CK_242X),
+ CLK(omap_i2c.2, ick,i2c2_ick, CK_242X),
+ CLK(omap_i2c.2, fck,i2c2_fck, CK_242X),
CLK(NULL, gpmc_fck, gpmc_fck, CK_242X),
CLK(NULL, sdma_fck, sdma_fck, CK_242X),
CLK(NULL, sdma_ick, sdma_ick, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c
b/arch/arm/mach-omap2/clock2430_data.c
index e32afcb..1bded4e 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1969,10 +1969,10 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, fac_fck, fac_fck, CK_243X),
CLK(omap_hdq.0, ick,hdq_ick, CK_243X),
CLK(omap_hdq.1, fck,hdq_fck, CK_243X),
- CLK(i2c_omap.1, ick,i2c1_ick, CK_243X),
- CLK(i2c_omap.1, fck,i2chs1_fck,CK_243X),
- CLK(i2c_omap.2, ick,i2c2_ick, CK_243X),
- CLK(i2c_omap.2, fck,i2chs2_fck,CK_243X),
+ CLK(omap_i2c.1, ick,i2c1_ick, CK_243X),
+ CLK(omap_i2c.1, fck,i2chs1_fck,CK_243X),
+ CLK(omap_i2c.2, ick,i2c2_ick, CK_243X),
+ CLK(omap_i2c.2, fck,i2chs2_fck,CK_243X),
CLK(NULL, gpmc_fck, gpmc_fck, CK_243X),
CLK(NULL, sdma_fck, sdma_fck, CK_243X),
CLK(NULL, sdma_ick, sdma_ick, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..ee8aa39 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3285,9 +3285,9 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(mmci-omap-hs.1, fck, mmchs2_fck,CK_3XXX),
CLK(NULL, mspro_fck,mspro_fck, CK_343X),
CLK(mmci-omap-hs.0, fck, mmchs1_fck,CK_3XXX),
- CLK(i2c_omap.3, fck,i2c3_fck, CK_3XXX),
- CLK(i2c_omap.2, fck,i2c2_fck, CK_3XXX),
- CLK(i2c_omap.1, fck,i2c1_fck, CK_3XXX),
+ CLK(omap_i2c.3, fck,i2c3_fck, CK_3XXX),
+ CLK(omap_i2c.2, fck,i2c2_fck, CK_3XXX),
+ CLK(omap_i2c.1, fck,i2c1_fck, CK_3XXX),
CLK(omap-mcbsp.5, fck, mcbsp5_fck,CK_3XXX),
CLK(omap-mcbsp.1, fck, mcbsp1_fck,CK_3XXX),
CLK(NULL, core_48m_fck, core_48m_fck, CK_3XXX),
@@ -3326,9 +3326,9 @@ static struct omap_clk omap3xxx_clks
[PATCH 3/3] OMAP: serial: Change device name: omap-hsuart - omap_uart
The naming convention for omap_device is omap_XXX. Rename the device and driver name in order to stick to this naming convention. Remove the hs prefix that is implicit for every OMAP uarts. Signed-off-by: Benoit Cousson b-cous...@ti.com Acked-by: Govindraj Raja govindraj.r...@ti.com Cc: Paul Walmsley p...@pwsan.com Cc: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/plat-omap/include/plat/omap-serial.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index c8dae02..cc71426 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -22,7 +22,7 @@ #include plat/mux.h -#define DRIVER_NAMEomap-hsuart +#define DRIVER_NAMEomap_uart /* * Use tty device name as ttyO, [O - OMAP] -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] OMAP: i2c: Change device name: i2c_omap - omap_i2c
The convention for omap device naming is omap_XXX.
Rename the device and driver name in order to stick
to this naming convention.
Signed-off-by: Benoit Cousson b-cous...@ti.com
c: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Ben Dooks ben-...@fluff.org
---
arch/arm/plat-omap/i2c.c |2 +-
drivers/i2c/busses/i2c-omap.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5bff9c..0a271ad 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -40,7 +40,7 @@
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
-static const char name[] = i2c_omap;
+static const char name[] = omap_i2c;
#define I2C_RESOURCE_BUILDER(base, irq)\
{ \
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 760b8be..9d09083 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -1139,7 +1139,7 @@ static struct platform_driver omap_i2c_driver = {
.probe = omap_i2c_probe,
.remove = omap_i2c_remove,
.driver = {
- .name = i2c_omap,
+ .name = omap_i2c,
.owner = THIS_MODULE,
},
};
@@ -1161,4 +1161,4 @@ module_exit(omap_i2c_exit_driver);
MODULE_AUTHOR(MontaVista Software, Inc. (and others));
MODULE_DESCRIPTION(TI OMAP I2C bus adapter);
MODULE_LICENSE(GPL);
-MODULE_ALIAS(platform:i2c_omap);
+MODULE_ALIAS(platform:omap_i2c);
--
1.7.0.4
--
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[PATCH v2 0/2] OMAP: I2C and UART device name cleanup
Hi All, In order to enforce a little bit of consistency in the omap devices name, the convention for omap devices name will be now omap_xxx. All the drivers adapted to hwmod will be named like that during the on-going adaptations. The I2C and UART drivers are already adapted to hwmod but with the originals name. Rename i2c and uart using this convention: i2c_omap - omap_i2c omap-hsuart - omap_uart Tested on OMAP4 ES2 on Panda / sdp4430. Some more validation will be needed on OMAP2 3. This series is based on Kevin's pm-hwmod-i2c branch and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/device_name Regards, Benoit v1 http://www.spinics.net/lists/linux-omap/msg41474.html Merge previous patch #1 and #2 as suggested by Kevin to change the driver name at the same time with the device name in the clockdev. Benoit Cousson (2): I2C: i2c-omap: Change device name: i2c_omap - omap_i2c OMAP: serial: Change device name: omap-hsuart - omap_uart arch/arm/mach-omap1/clock_data.c |6 +++--- arch/arm/mach-omap2/clock2420_data.c |8 arch/arm/mach-omap2/clock2430_data.c |8 arch/arm/mach-omap2/clock3xxx_data.c | 12 ++-- arch/arm/mach-omap2/clock44xx_data.c | 16 arch/arm/plat-omap/i2c.c |2 +- arch/arm/plat-omap/include/plat/omap-serial.h |2 +- drivers/i2c/busses/i2c-omap.c |4 ++-- 8 files changed, 29 insertions(+), 29 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/2] OMAP: serial: Change device name: omap-hsuart - omap_uart
The naming convention for omap_device is omap_XXX. Rename the device and driver name in order to stick to this naming convention. Remove the hs prefix that is implicit for every OMAP uarts. Signed-off-by: Benoit Cousson b-cous...@ti.com Acked-by: Govindraj Raja govindraj.r...@ti.com Cc: Paul Walmsley p...@pwsan.com Cc: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/plat-omap/include/plat/omap-serial.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h index c8dae02..cc71426 100644 --- a/arch/arm/plat-omap/include/plat/omap-serial.h +++ b/arch/arm/plat-omap/include/plat/omap-serial.h @@ -22,7 +22,7 @@ #include plat/mux.h -#define DRIVER_NAMEomap-hsuart +#define DRIVER_NAMEomap_uart /* * Use tty device name as ttyO, [O - OMAP] -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/2] I2C: i2c-omap: Change device name: i2c_omap - omap_i2c
The convention for omap device naming is omap_XXX.
Rename the device and driver name in order to stick
to this naming convention.
Change device name in clock nodes as well.
Signed-off-by: Benoit Cousson b-cous...@ti.com
c: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Ben Dooks ben-...@fluff.org
---
arch/arm/mach-omap1/clock_data.c |6 +++---
arch/arm/mach-omap2/clock2420_data.c |8
arch/arm/mach-omap2/clock2430_data.c |8
arch/arm/mach-omap2/clock3xxx_data.c | 12 ++--
arch/arm/mach-omap2/clock44xx_data.c | 16
arch/arm/plat-omap/i2c.c |2 +-
drivers/i2c/busses/i2c-omap.c|4 ++--
7 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index af54114..aa6dd67 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -736,9 +736,9 @@ static struct omap_clk omap_clks[] = {
CLK(mmci-omap.1, ick, armper_ck.clk, CK_16XX),
/* Virtual clocks */
CLK(NULL, mpu, virtual_ck_mpu, CK_16XX | CK_1510 |
CK_310),
- CLK(i2c_omap.1, fck,i2c_fck, CK_16XX | CK_1510 |
CK_310 | CK_7XX),
- CLK(i2c_omap.1, ick,i2c_ick, CK_16XX),
- CLK(i2c_omap.1, ick,dummy_ck, CK_1510 | CK_310 |
CK_7XX),
+ CLK(omap_i2c.1, fck,i2c_fck, CK_16XX | CK_1510 |
CK_310 | CK_7XX),
+ CLK(omap_i2c.1, ick,i2c_ick, CK_16XX),
+ CLK(omap_i2c.1, ick,dummy_ck, CK_1510 | CK_310 |
CK_7XX),
CLK(omap1_spi100k.1, fck, dummy_ck, CK_7XX),
CLK(omap1_spi100k.1, ick, dummy_ck, CK_7XX),
CLK(omap1_spi100k.2, fck, dummy_ck, CK_7XX),
diff --git a/arch/arm/mach-omap2/clock2420_data.c
b/arch/arm/mach-omap2/clock2420_data.c
index 21f8562..ed61ac2 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1862,10 +1862,10 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, eac_fck, eac_fck, CK_242X),
CLK(omap_hdq.0, ick,hdq_ick, CK_242X),
CLK(omap_hdq.1, fck,hdq_fck, CK_242X),
- CLK(i2c_omap.1, ick,i2c1_ick, CK_242X),
- CLK(i2c_omap.1, fck,i2c1_fck, CK_242X),
- CLK(i2c_omap.2, ick,i2c2_ick, CK_242X),
- CLK(i2c_omap.2, fck,i2c2_fck, CK_242X),
+ CLK(omap_i2c.1, ick,i2c1_ick, CK_242X),
+ CLK(omap_i2c.1, fck,i2c1_fck, CK_242X),
+ CLK(omap_i2c.2, ick,i2c2_ick, CK_242X),
+ CLK(omap_i2c.2, fck,i2c2_fck, CK_242X),
CLK(NULL, gpmc_fck, gpmc_fck, CK_242X),
CLK(NULL, sdma_fck, sdma_fck, CK_242X),
CLK(NULL, sdma_ick, sdma_ick, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c
b/arch/arm/mach-omap2/clock2430_data.c
index e32afcb..1bded4e 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1969,10 +1969,10 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, fac_fck, fac_fck, CK_243X),
CLK(omap_hdq.0, ick,hdq_ick, CK_243X),
CLK(omap_hdq.1, fck,hdq_fck, CK_243X),
- CLK(i2c_omap.1, ick,i2c1_ick, CK_243X),
- CLK(i2c_omap.1, fck,i2chs1_fck,CK_243X),
- CLK(i2c_omap.2, ick,i2c2_ick, CK_243X),
- CLK(i2c_omap.2, fck,i2chs2_fck,CK_243X),
+ CLK(omap_i2c.1, ick,i2c1_ick, CK_243X),
+ CLK(omap_i2c.1, fck,i2chs1_fck,CK_243X),
+ CLK(omap_i2c.2, ick,i2c2_ick, CK_243X),
+ CLK(omap_i2c.2, fck,i2chs2_fck,CK_243X),
CLK(NULL, gpmc_fck, gpmc_fck, CK_243X),
CLK(NULL, sdma_fck, sdma_fck, CK_243X),
CLK(NULL, sdma_ick, sdma_ick, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..ee8aa39 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3285,9 +3285,9 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(mmci-omap-hs.1, fck, mmchs2_fck,CK_3XXX),
CLK(NULL, mspro_fck,mspro_fck, CK_343X),
CLK(mmci-omap-hs.0, fck, mmchs1_fck,CK_3XXX),
- CLK(i2c_omap.3, fck,i2c3_fck, CK_3XXX),
- CLK(i2c_omap.2, fck,i2c2_fck, CK_3XXX),
- CLK(i2c_omap.1, fck,i2c1_fck, CK_3XXX),
+ CLK(omap_i2c.3, fck,i2c3_fck, CK_3XXX),
+ CLK(omap_i2c.2, fck,i2c2_fck, CK_3XXX),
+ CLK(omap_i2c.1, fck,i2c1_fck, CK_3XXX),
CLK(omap-mcbsp.5, fck
[PATCH v2 0/8] OMAP34: clock data: Fixes and add new clocks nodes
Hi Paul, Here is a collections of fixes and clock nodes addition done on OMAP3 and OMAP4 clock data files. I have included the one that Thara already submitted after fixing the various comments done on the original version. That revision include as well a new fix from Jon. Thanks to both fixes, the clocks rate are now accurate and the func_48m_fclk does report 48MHz now! Cool isn't it? Tested on sdp4430 + ES2.0. The series is based on 2.6.37-rc5 and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/clock Regards, Benoit Benoit Cousson (3): OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk OMAP3: clock data: Add wkup_clkdm in sr1_fck and sr2_fck OMAP4: PRCM: Add SCRM header file Jon Hunter (1): OMAP4: clock data: Add missing fixed divisors Jonathan Bergsagel (1): OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck Rajendra Nayak (2): OMAP4: clock data: Add SCRM auxiliary clock nodes OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks Thara Gopinath (1): OMAP4: clock data: Add missing DPLL x2 clock nodes arch/arm/mach-omap2/clock3xxx_data.c |2 + arch/arm/mach-omap2/clock44xx_data.c | 653 -- arch/arm/mach-omap2/scrm44xx.h | 176 + 3 files changed, 640 insertions(+), 191 deletions(-) create mode 100644 arch/arm/mach-omap2/scrm44xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/8] OMAP4: clock data: Add control for pad_clks_ck and slimbus_clk
The gating of pad_clks and slimbus_ck is controlled by the PRCM, but
since the clock source is external, this is the SW responsability
to gate / un-gate it when the mcpdm or slimbus module need to be used.
There is no autogating possible with such external clock.
Add SW control to enable / disable this SW gating in the pad_clks_ck
and slimbus_clk clock node.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Sebastien Guiriec s-guir...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 1599836..4395e2e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -47,7 +47,9 @@ static struct clk extalt_clkin_ck = {
static struct clk pad_clks_ck = {
.name = pad_clks_ck,
.rate = 1200,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
+ .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT,
};
static struct clk pad_slimbus_core_clks_ck = {
@@ -65,7 +67,9 @@ static struct clk secure_32k_clk_src_ck = {
static struct clk slimbus_clk = {
.name = slimbus_clk,
.rate = 1200,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_CLKSEL_ABE,
+ .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT,
};
static struct clk sys_32k_ck = {
--
1.7.0.4
--
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[PATCH v2 2/8] OMAP3: clock data: Add wkup_clkdm in sr1_fck and sr2_fck
The smartreflex modules belong to an ALWON_FCLK clock domain that
does not have any SW control. The gating of that interface clock
is triggered by a transition of the WKUP clock domain to idle.
Attach both smartreflex instances on OMAP3 to the WKUP clock domain.
The missing clock domain field in srX_fck clock nodes was reported by
Kevin during the discussion about smartreflex on OMAP3:
https://patchwork.kernel.org/patch/199342/
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d85ecd5..741f6a0 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3044,6 +3044,7 @@ static struct clk sr1_fck = {
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR1_SHIFT,
+ .clkdm_name = wkup_clkdm,
.recalc = followparent_recalc,
};
@@ -3054,6 +3055,7 @@ static struct clk sr2_fck = {
.parent = sys_ck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_SR2_SHIFT,
+ .clkdm_name = wkup_clkdm,
.recalc = followparent_recalc,
};
--
1.7.0.4
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[PATCH v2 4/8] OMAP4: clock data: Add missing fields in iva_hsd_byp_clk_mux_ck
From: Jonathan Bergsagel jbergsa...@ti.com
Add register address, mask and link to the clksel structure that
were missing in the IVA DPLL mux clock node.
Signed-off-by: Jonathan Bergsagel jbergsa...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 123aa6d..6558d91 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -636,8 +636,12 @@ static const struct clksel iva_hsd_byp_clk_mux_sel[] = {
static struct clk iva_hsd_byp_clk_mux_ck = {
.name = iva_hsd_byp_clk_mux_ck,
.parent = sys_clkin_ck,
+ .clksel = iva_hsd_byp_clk_mux_sel,
+ .init = omap2_init_clksel_parent,
+ .clksel_reg = OMAP4430_CM_CLKSEL_DPLL_IVA,
+ .clksel_mask= OMAP4430_DPLL_BYP_CLKSEL_MASK,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .recalc = omap2_clksel_recalc,
};
/* DPLL_IVA */
--
1.7.0.4
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[PATCH v2 3/8] OMAP4: clock data: Add missing DPLL x2 clock nodes
From: Thara Gopinath th...@ti.com
This patch extends the OMAP4 clock data to include
various x2 clock nodes between DPLL and HS dividers as the
clock framework skips a x2 while calculating the dpll locked
frequency.
The clock database extensions are autogenerated using
the scripts maintained by Benoit Cousson.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Thara Gopinath th...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 423 --
1 files changed, 248 insertions(+), 175 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 4395e2e..123aa6d 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -269,11 +269,63 @@ static struct clk dpll_abe_ck = {
.set_rate = omap3_noncore_dpll_set_rate,
};
+static struct clk dpll_abe_x2_ck = {
+ .name = dpll_abe_x2_ck,
+ .parent = dpll_abe_ck,
+ .ops= clkops_null,
+ .recalc = omap3_clkoutx2_recalc,
+};
+
+static const struct clksel_rate div31_1to31_rates[] = {
+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
+ { .div = 2, .val = 2, .flags = RATE_IN_4430 },
+ { .div = 3, .val = 3, .flags = RATE_IN_4430 },
+ { .div = 4, .val = 4, .flags = RATE_IN_4430 },
+ { .div = 5, .val = 5, .flags = RATE_IN_4430 },
+ { .div = 6, .val = 6, .flags = RATE_IN_4430 },
+ { .div = 7, .val = 7, .flags = RATE_IN_4430 },
+ { .div = 8, .val = 8, .flags = RATE_IN_4430 },
+ { .div = 9, .val = 9, .flags = RATE_IN_4430 },
+ { .div = 10, .val = 10, .flags = RATE_IN_4430 },
+ { .div = 11, .val = 11, .flags = RATE_IN_4430 },
+ { .div = 12, .val = 12, .flags = RATE_IN_4430 },
+ { .div = 13, .val = 13, .flags = RATE_IN_4430 },
+ { .div = 14, .val = 14, .flags = RATE_IN_4430 },
+ { .div = 15, .val = 15, .flags = RATE_IN_4430 },
+ { .div = 16, .val = 16, .flags = RATE_IN_4430 },
+ { .div = 17, .val = 17, .flags = RATE_IN_4430 },
+ { .div = 18, .val = 18, .flags = RATE_IN_4430 },
+ { .div = 19, .val = 19, .flags = RATE_IN_4430 },
+ { .div = 20, .val = 20, .flags = RATE_IN_4430 },
+ { .div = 21, .val = 21, .flags = RATE_IN_4430 },
+ { .div = 22, .val = 22, .flags = RATE_IN_4430 },
+ { .div = 23, .val = 23, .flags = RATE_IN_4430 },
+ { .div = 24, .val = 24, .flags = RATE_IN_4430 },
+ { .div = 25, .val = 25, .flags = RATE_IN_4430 },
+ { .div = 26, .val = 26, .flags = RATE_IN_4430 },
+ { .div = 27, .val = 27, .flags = RATE_IN_4430 },
+ { .div = 28, .val = 28, .flags = RATE_IN_4430 },
+ { .div = 29, .val = 29, .flags = RATE_IN_4430 },
+ { .div = 30, .val = 30, .flags = RATE_IN_4430 },
+ { .div = 31, .val = 31, .flags = RATE_IN_4430 },
+ { .div = 0 },
+};
+
+static const struct clksel dpll_abe_m2x2_div[] = {
+ { .parent = dpll_abe_x2_ck, .rates = div31_1to31_rates },
+ { .parent = NULL },
+};
+
static struct clk dpll_abe_m2x2_ck = {
.name = dpll_abe_m2x2_ck,
- .parent = dpll_abe_ck,
+ .parent = dpll_abe_x2_ck,
+ .clksel = dpll_abe_m2x2_div,
+ .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
+ .clksel_mask= OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .recalc = omap2_clksel_recalc,
+ .round_rate = omap2_clksel_round_rate,
+ .set_rate = omap2_clksel_set_rate,
};
static struct clk abe_24m_fclk = {
@@ -330,50 +382,10 @@ static struct clk aess_fclk = {
.set_rate = omap2_clksel_set_rate,
};
-static const struct clksel_rate div31_1to31_rates[] = {
- { .div = 1, .val = 1, .flags = RATE_IN_4430 },
- { .div = 2, .val = 2, .flags = RATE_IN_4430 },
- { .div = 3, .val = 3, .flags = RATE_IN_4430 },
- { .div = 4, .val = 4, .flags = RATE_IN_4430 },
- { .div = 5, .val = 5, .flags = RATE_IN_4430 },
- { .div = 6, .val = 6, .flags = RATE_IN_4430 },
- { .div = 7, .val = 7, .flags = RATE_IN_4430 },
- { .div = 8, .val = 8, .flags = RATE_IN_4430 },
- { .div = 9, .val = 9, .flags = RATE_IN_4430 },
- { .div = 10, .val = 10, .flags = RATE_IN_4430 },
- { .div = 11, .val = 11, .flags = RATE_IN_4430 },
- { .div = 12, .val = 12, .flags = RATE_IN_4430 },
- { .div = 13, .val = 13, .flags = RATE_IN_4430 },
- { .div = 14, .val = 14, .flags = RATE_IN_4430 },
- { .div = 15, .val = 15, .flags = RATE_IN_4430 },
- { .div = 16, .val = 16, .flags = RATE_IN_4430 },
- { .div = 17, .val = 17, .flags = RATE_IN_4430 },
- { .div = 18, .val = 18, .flags = RATE_IN_4430 },
- { .div = 19, .val = 19, .flags = RATE_IN_4430 },
- { .div = 20, .val = 20, .flags
[PATCH v2 5/8] OMAP4: PRCM: Add SCRM header file
Add the header file with scrm registers absolute address, offset and bitfields. Signed-off-by: Benoit Cousson b-cous...@ti.com Signed-off-by: Rajendra Nayak rna...@ti.com Cc: Paul Walmsley p...@pwsan.com --- arch/arm/mach-omap2/scrm44xx.h | 176 1 files changed, 176 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/scrm44xx.h diff --git a/arch/arm/mach-omap2/scrm44xx.h b/arch/arm/mach-omap2/scrm44xx.h new file mode 100644 index 000..d29bf27 --- /dev/null +++ b/arch/arm/mach-omap2/scrm44xx.h @@ -0,0 +1,176 @@ +/* + * OMAP44xx SCRM registers and bitfields + * + * Copyright (C) 2010 Texas Instruments, Inc. + * + * Benoit Cousson (b-cous...@ti.com) + * + * This file is automatically generated from the OMAP hardware databases. + * We respectfully ask that any modifications to this file be coordinated + * with the public linux-omap@vger.kernel.org mailing list and the + * authors above to ensure that the autogeneration scripts are kept + * up-to-date with the file contents. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H +#define __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H + +/* Base address */ +#define OMAP4_SCRM 0x4a30a000 + +#define OMAP44XX_SCRM_REGADDR(reg) \ + OMAP2_L4_IO_ADDRESS(OMAP4_SCRM + (reg)) + +/* Registers offset */ +#define OMAP4_SCRM_REVISION_SCRM_OFFSET0x +#define OMAP4_SCRM_REVISION_SCRM OMAP44XX_SCRM_REGADDR(0x) +#define OMAP4_SCRM_CLKSETUPTIME_OFFSET 0x0100 +#define OMAP4_SCRM_CLKSETUPTIME OMAP44XX_SCRM_REGADDR(0x0100) +#define OMAP4_SCRM_PMICSETUPTIME_OFFSET0x0104 +#define OMAP4_SCRM_PMICSETUPTIME OMAP44XX_SCRM_REGADDR(0x0104) +#define OMAP4_SCRM_ALTCLKSRC_OFFSET0x0110 +#define OMAP4_SCRM_ALTCLKSRC OMAP44XX_SCRM_REGADDR(0x0110) +#define OMAP4_SCRM_MODEMCLKM_OFFSET0x0118 +#define OMAP4_SCRM_MODEMCLKM OMAP44XX_SCRM_REGADDR(0x0118) +#define OMAP4_SCRM_D2DCLKM_OFFSET 0x011c +#define OMAP4_SCRM_D2DCLKM OMAP44XX_SCRM_REGADDR(0x011c) +#define OMAP4_SCRM_EXTCLKREQ_OFFSET0x0200 +#define OMAP4_SCRM_EXTCLKREQ OMAP44XX_SCRM_REGADDR(0x0200) +#define OMAP4_SCRM_ACCCLKREQ_OFFSET0x0204 +#define OMAP4_SCRM_ACCCLKREQ OMAP44XX_SCRM_REGADDR(0x0204) +#define OMAP4_SCRM_PWRREQ_OFFSET 0x0208 +#define OMAP4_SCRM_PWRREQ OMAP44XX_SCRM_REGADDR(0x0208) +#define OMAP4_SCRM_AUXCLKREQ0_OFFSET 0x0210 +#define OMAP4_SCRM_AUXCLKREQ0 OMAP44XX_SCRM_REGADDR(0x0210) +#define OMAP4_SCRM_AUXCLKREQ1_OFFSET 0x0214 +#define OMAP4_SCRM_AUXCLKREQ1 OMAP44XX_SCRM_REGADDR(0x0214) +#define OMAP4_SCRM_AUXCLKREQ2_OFFSET 0x0218 +#define OMAP4_SCRM_AUXCLKREQ2 OMAP44XX_SCRM_REGADDR(0x0218) +#define OMAP4_SCRM_AUXCLKREQ3_OFFSET 0x021c +#define OMAP4_SCRM_AUXCLKREQ3 OMAP44XX_SCRM_REGADDR(0x021c) +#define OMAP4_SCRM_AUXCLKREQ4_OFFSET 0x0220 +#define OMAP4_SCRM_AUXCLKREQ4 OMAP44XX_SCRM_REGADDR(0x0220) +#define OMAP4_SCRM_AUXCLKREQ5_OFFSET 0x0224 +#define OMAP4_SCRM_AUXCLKREQ5 OMAP44XX_SCRM_REGADDR(0x0224) +#define OMAP4_SCRM_D2DCLKREQ_OFFSET0x0234 +#define OMAP4_SCRM_D2DCLKREQ OMAP44XX_SCRM_REGADDR(0x0234) +#define OMAP4_SCRM_AUXCLK0_OFFSET 0x0310 +#define OMAP4_SCRM_AUXCLK0 OMAP44XX_SCRM_REGADDR(0x0310) +#define OMAP4_SCRM_AUXCLK1_OFFSET 0x0314 +#define OMAP4_SCRM_AUXCLK1 OMAP44XX_SCRM_REGADDR(0x0314) +#define OMAP4_SCRM_AUXCLK2_OFFSET 0x0318 +#define OMAP4_SCRM_AUXCLK2 OMAP44XX_SCRM_REGADDR(0x0318) +#define OMAP4_SCRM_AUXCLK3_OFFSET 0x031c +#define OMAP4_SCRM_AUXCLK3 OMAP44XX_SCRM_REGADDR(0x031c) +#define OMAP4_SCRM_AUXCLK4_OFFSET 0x0320 +#define OMAP4_SCRM_AUXCLK4 OMAP44XX_SCRM_REGADDR(0x0320) +#define OMAP4_SCRM_AUXCLK5_OFFSET 0x0324 +#define OMAP4_SCRM_AUXCLK5 OMAP44XX_SCRM_REGADDR(0x0324) +#define OMAP4_SCRM_RSTTIME_OFFSET 0x0400 +#define OMAP4_SCRM_RSTTIME OMAP44XX_SCRM_REGADDR(0x0400) +#define OMAP4_SCRM_MODEMRSTCTRL_OFFSET 0x0418 +#define OMAP4_SCRM_MODEMRSTCTRL OMAP44XX_SCRM_REGADDR(0x0418) +#define OMAP4_SCRM_D2DRSTCTRL_OFFSET 0x041c +#define OMAP4_SCRM_D2DRSTCTRL OMAP44XX_SCRM_REGADDR(0x041c) +#define OMAP4_SCRM_EXTPWRONRSTCTRL_OFFSET 0x0420 +#define OMAP4_SCRM_EXTPWRONRSTCTRL
[PATCH v2 6/8] OMAP4: clock data: Add SCRM auxiliary clock nodes
From: Rajendra Nayak rna...@ti.com
Add support for auxiliary clocks nodes which are part of SCRM.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock44xx_data.c | 175 ++
1 files changed, 175 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 6558d91..fd7efe8 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -35,6 +35,7 @@
#include prm.h
#include prm-regbits-44xx.h
#include control.h
+#include scrm44xx.h
/* Root clocks */
@@ -2822,6 +2823,168 @@ static struct clk trace_clk_div_ck = {
.set_rate = omap2_clksel_set_rate,
};
+/* SCRM aux clk nodes */
+
+static const struct clksel auxclk_sel[] = {
+ { .parent = sys_clkin_ck, .rates = div_1_0_rates },
+ { .parent = dpll_core_m3x2_ck, .rates = div_1_1_rates },
+ { .parent = dpll_per_m3x2_ck, .rates = div_1_2_rates },
+ { .parent = NULL },
+};
+
+static struct clk auxclk0_ck = {
+ .name = auxclk0_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK0,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK0,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk1_ck = {
+ .name = auxclk1_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK1,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK1,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk2_ck = {
+ .name = auxclk2_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK2,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK2,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+static struct clk auxclk3_ck = {
+ .name = auxclk3_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK3,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK3,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk4_ck = {
+ .name = auxclk4_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK4,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK4,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static struct clk auxclk5_ck = {
+ .name = auxclk5_ck,
+ .parent = sys_clkin_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_omap2_dflt,
+ .clksel = auxclk_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLK5,
+ .clksel_mask= OMAP4_SRCSELECT_MASK,
+ .recalc = omap2_clksel_recalc,
+ .enable_reg = OMAP4_SCRM_AUXCLK5,
+ .enable_bit = OMAP4_ENABLE_SHIFT,
+};
+
+static const struct clksel auxclkreq_sel[] = {
+ { .parent = auxclk0_ck, .rates = div_1_0_rates },
+ { .parent = auxclk1_ck, .rates = div_1_1_rates },
+ { .parent = auxclk2_ck, .rates = div_1_2_rates },
+ { .parent = auxclk3_ck, .rates = div_1_3_rates },
+ { .parent = auxclk4_ck, .rates = div_1_4_rates },
+ { .parent = auxclk5_ck, .rates = div_1_5_rates },
+ { .parent = NULL },
+};
+
+static struct clk auxclkreq0_ck = {
+ .name = auxclkreq0_ck,
+ .parent = auxclk0_ck,
+ .init = omap2_init_clksel_parent,
+ .ops= clkops_null,
+ .clksel = auxclkreq_sel,
+ .clksel_reg = OMAP4_SCRM_AUXCLKREQ0,
+ .clksel_mask= OMAP4_MAPPING_MASK,
+ .recalc = omap2_clksel_recalc,
+};
+
+static struct clk auxclkreq1_ck = {
+ .name = auxclkreq1_ck,
+ .parent = auxclk1_ck,
+ .init
[PATCH v2 8/8] OMAP4: clock data: Add missing fixed divisors
From: Jon Hunter jon-hun...@ti.com
The following OMAP4 clocks have the following fixed divisors that
determine the frequency at which these clocks operate. These
dividers are defined by the PRCM specification and without these
dividers the rates of the below clocks are calculated incorrectly.
This may cause internal peripherals using these clocks to operate
at the wrong frequency.
- abe_24m_fclk (freq = divided-by-8)
- ddrphy_ck (freq = parent divided-by-2)
- dll_clk_div_ck (freq = parent divided-by-2)
- per_hs_clk_div_ck (freq = parent divided-by-2)
- usb_hs_clk_div_ck (freq = parent divided-by-3)
- func_12m_fclk (freq = parent divided-by-16)
- func_24m_clk (freq = parent divided-by-4)
- func_24mc_fclk (freq = parent divided-by-8)
- func_48mc_fclk (freq = divided-by-4)
- lp_clk_div_ck (freq = divided-by-16)
- per_abe_24m_fclk (freq = divided-by-4)
Signed-off-by: Jon Hunter jon-hun...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 33 ++---
1 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 51f28a0..953d97e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -333,7 +333,8 @@ static struct clk abe_24m_fclk = {
.name = abe_24m_fclk,
.parent = dpll_abe_m2x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 8,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel_rate div3_1to4_rates[] = {
@@ -499,7 +500,8 @@ static struct clk ddrphy_ck = {
.name = ddrphy_ck,
.parent = dpll_core_m2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 2,
+ .recalc = omap_fixed_divisor_recalc,
};
static struct clk dpll_core_m5x2_ck = {
@@ -584,7 +586,8 @@ static struct clk dll_clk_div_ck = {
.name = dll_clk_div_ck,
.parent = dpll_core_m4x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 2,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel dpll_abe_m2_div[] = {
@@ -773,7 +776,8 @@ static struct clk per_hs_clk_div_ck = {
.name = per_hs_clk_div_ck,
.parent = dpll_abe_m3x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 2,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel per_hsd_byp_clk_mux_sel[] = {
@@ -986,7 +990,8 @@ static struct clk usb_hs_clk_div_ck = {
.name = usb_hs_clk_div_ck,
.parent = dpll_abe_m3x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 3,
+ .recalc = omap_fixed_divisor_recalc,
};
/* DPLL_USB */
@@ -1066,21 +1071,24 @@ static struct clk func_12m_fclk = {
.name = func_12m_fclk,
.parent = dpll_per_m2x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 16,
+ .recalc = omap_fixed_divisor_recalc,
};
static struct clk func_24m_clk = {
.name = func_24m_clk,
.parent = dpll_per_m2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 4,
+ .recalc = omap_fixed_divisor_recalc,
};
static struct clk func_24mc_fclk = {
.name = func_24mc_fclk,
.parent = dpll_per_m2x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 8,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel_rate div2_4to8_rates[] = {
@@ -1110,7 +1118,8 @@ static struct clk func_48mc_fclk = {
.name = func_48mc_fclk,
.parent = dpll_per_m2x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 4,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel_rate div2_2to4_rates[] = {
@@ -1227,7 +1236,8 @@ static struct clk lp_clk_div_ck = {
.name = lp_clk_div_ck,
.parent = dpll_abe_m2x2_ck,
.ops= clkops_null,
- .recalc = followparent_recalc,
+ .fixed_div = 16,
+ .recalc = omap_fixed_divisor_recalc,
};
static const struct clksel l4_wkup_clk_mux_sel[] = {
@@ -1295,7 +1305,8 @@ static struct clk per_abe_24m_fclk = {
.name
[PATCH v2 7/8] OMAP4: clock data: Export control to enable/disable CORE/PER M3 clocks
From: Rajendra Nayak rna...@ti.com
The CORE and PER M3 post dividers are different from the rest of the
DPLL post dividers as in they go to SCRM, and are used
there to export clocks for instance used by external sensor.
There is no automatic HW dependency in PRCM to manage them. Hence these
two clocks (dpll post dividers) should be managed by SW and explicitly
enabled/disabled.
Add control in clock framework to handle that.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock44xx_data.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index fd7efe8..51f28a0 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -610,7 +610,9 @@ static struct clk dpll_core_m3x2_ck = {
.clksel = dpll_core_m6x2_div,
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.clksel_mask= OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = omap2_clksel_recalc,
.round_rate = omap2_clksel_round_rate,
.set_rate = omap2_clksel_set_rate,
@@ -869,7 +871,9 @@ static struct clk dpll_per_m3x2_ck = {
.clksel = dpll_per_m2x2_div,
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.clksel_mask= OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
- .ops= clkops_null,
+ .ops= clkops_omap2_dflt,
+ .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
+ .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
.recalc = omap2_clksel_recalc,
.round_rate = omap2_clksel_round_rate,
.set_rate = omap2_clksel_set_rate,
--
1.7.0.4
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[PATCH 0/5] OMAP4: hwmod data fixes and update
Hi Paul, Here is a small set of OMAP4 hwmod data updates. Re-order properly the data that were a little bit shuffled during the previous merge window. Add the new reset flags introduced in 2.6.37 and that were not used in the hwmod data. The OMAP2 and OMAP3 fixes should come soon. Fix some missing field in the GPIO OMAP4 hwmod data that I missed during the review. IVA and DSP are added just to allow the processors device creation at boot time and avoid the warnings. Thanks to Charu for testing the GPIO / WD_TIMER changes. Thanks to Govindraj for testing the UART changes. The series is based on lo/for-next (v2.6.37-rc5-66-ga2814df) and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/hwmod_data Please note that there is a slight dependency with the following patch due to the name change of the iva fclk: OMAP4: clock data: Add missing DPLL x2 clock node https://patchwork.kernel.org/patch/396612/ Tested on sdp4430 + ES2.0/ES2.1. Regards, Benoit Benoit Cousson (5): OMAP4: hwmod data: Fix hwmod entries order OMAP4: hwmod data: Add SYSS_HAS_RESET_STATUS flag OMAP4: hwmod data: Fix missing address in DMM and EMIF_FW OMAP4: hwmod data: Add IVA and DSP OMAP4: hwmod clock data: Fix GPIO opt_clks and ocp_if iclk arch/arm/mach-omap2/clock44xx_data.c | 12 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1256 ++-- 2 files changed, 822 insertions(+), 446 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] OMAP4: hwmod data: Fix hwmod entries order
The original OMAP4 hwmod data files is fully generated from HW
database. But since the file is introduced incrementaly along
with driver that uses the data, it has to be splitted by the driver
owner and then re-merged by the maintainer.
Because of the similarity of the data, git is completely lost
during such merge and thus the data does not look like the original one
at the end.
Re-order properly the structures to stay in sync with original data set.
Add a comment that does contain all the IPs that can have a hwmod, but
do not have it in the file for the moment. It gives a good indication
of the progress.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Govindraj.R govindraj.r...@ti.com
Cc: Charulatha V ch...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1002 +++-
1 files changed, 553 insertions(+), 449 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index d258936..d8ef977 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -168,6 +168,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/* l3_main_1 interface data */
/* l3_main_2 - l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
.master = omap44xx_l3_main_2_hwmod,
@@ -384,6 +385,464 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
};
/*
+ * 'mpu_bus' class
+ * instance(s): mpu_private
+ */
+static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {
+ .name = mpu_bus,
+};
+
+/* mpu_private interface data */
+/* mpu - mpu_private */
+static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
+ .master = omap44xx_mpu_hwmod,
+ .slave = omap44xx_mpu_private_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mpu_private slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
+ omap44xx_mpu__mpu_private,
+};
+
+static struct omap_hwmod omap44xx_mpu_private_hwmod = {
+ .name = mpu_private,
+ .class = omap44xx_mpu_bus_hwmod_class,
+ .slaves = omap44xx_mpu_private_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * Modules omap_hwmod structures
+ *
+ * The following IPs are excluded for the moment because:
+ * - They do not need an explicit SW control using omap_hwmod API.
+ * - They still need to be validated with the driver
+ * properly adapted to omap_hwmod / omap_device
+ *
+ * aess
+ * bandgap
+ * c2c
+ * c2c_target_fw
+ * cm_core
+ * cm_core_aon
+ * counter_32k
+ * ctrl_module_core
+ * ctrl_module_pad_core
+ * ctrl_module_pad_wkup
+ * ctrl_module_wkup
+ * debugss
+ * dma_system
+ * dmic
+ * dsp
+ * dss
+ * dss_dispc
+ * dss_dsi1
+ * dss_dsi2
+ * dss_hdmi
+ * dss_rfbi
+ * dss_venc
+ * efuse_ctrl_cust
+ * efuse_ctrl_std
+ * elm
+ * emif1
+ * emif2
+ * fdif
+ * gpmc
+ * gpu
+ * hdq1w
+ * hsi
+ * ipu
+ * iss
+ * iva
+ * kbd
+ * mailbox
+ * mcasp
+ * mcbsp1
+ * mcbsp2
+ * mcbsp3
+ * mcbsp4
+ * mcpdm
+ * mcspi1
+ * mcspi2
+ * mcspi3
+ * mcspi4
+ * mmc1
+ * mmc2
+ * mmc3
+ * mmc4
+ * mmc5
+ * mpu_c0
+ * mpu_c1
+ * ocmc_ram
+ * ocp2scp_usb_phy
+ * ocp_wp_noc
+ * prcm
+ * prcm_mpu
+ * prm
+ * scrm
+ * sl2if
+ * slimbus1
+ * slimbus2
+ * smartreflex_core
+ * smartreflex_iva
+ * smartreflex_mpu
+ * spinlock
+ * timer1
+ * timer10
+ * timer11
+ * timer2
+ * timer3
+ * timer4
+ * timer5
+ * timer6
+ * timer7
+ * timer8
+ * timer9
+ * usb_host_fs
+ * usb_host_hs
+ * usb_otg_hs
+ * usb_phy_cm
+ * usb_tll_hs
+ * usim
+ */
+
+/*
+ * 'gpio' class
+ * general purpose io module
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0114,
+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
+ .name = gpio,
+ .sysc = omap44xx_gpio_sysc,
+ .rev = 2,
+};
+
+/* gpio dev_attr */
+static struct omap_gpio_dev_attr gpio_dev_attr = {
+ .bank_width = 32,
+ .dbck_flag = true,
+};
+
+/* gpio1 */
+static struct omap_hwmod omap44xx_gpio1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {
+ { .irq = 29 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_gpio1_addrs
[PATCH 3/5] OMAP4: hwmod data: Fix missing address in DMM and EMIF_FW
The DMM is a piece of interconnect that need to be configured properly
for the tiler functionnality. It thus exposes some configuration registers
that were missing previously.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 26 +++---
1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e3a94e..7dccba3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -68,7 +68,15 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
.master = omap44xx_l3_main_1_hwmod,
.slave = omap44xx_dmm_hwmod,
.clk= l3_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .user = OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {
+ {
+ .pa_start = 0x4e00,
+ .pa_end = 0x4e0007ff,
+ .flags = ADDR_TYPE_RT
+ },
};
/* mpu - dmm */
@@ -76,7 +84,9 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
.master = omap44xx_mpu_hwmod,
.slave = omap44xx_dmm_hwmod,
.clk= l3_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .addr = omap44xx_dmm_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs),
+ .user = OCP_USER_MPU,
};
/* dmm slave ports */
@@ -116,12 +126,22 @@ static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {
+ {
+ .pa_start = 0x4a20c000,
+ .pa_end = 0x4a20c0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
/* l4_cfg - emif_fw */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
.master = omap44xx_l4_cfg_hwmod,
.slave = omap44xx_emif_fw_hwmod,
.clk= l4_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .addr = omap44xx_emif_fw_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs),
+ .user = OCP_USER_MPU,
};
/* emif_fw slave ports */
--
1.7.0.4
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[PATCH 2/5] OMAP4: hwmod data: Add SYSS_HAS_RESET_STATUS flag
Update the data for GPIO, UART, WD_TIMER and I2C in order to
support the new reset status flag introduce in the following
commit:
commit 2cb068149c365f1c2b10f2ece6786139527dcc16
OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs
Without this flag properly set, the reset is done, but the hwmod
core code will not wait for the reset completion to continue its
excecution.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Tested-by: Charulatha V ch...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Govindraj.R govindraj.r...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index d8ef977..1e3a94e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -518,8 +518,9 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc
= {
.rev_offs = 0x,
.sysc_offs = 0x0010,
.syss_offs = 0x0114,
- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -852,7 +853,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc
= {
.syss_offs = 0x0090,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -1124,7 +1125,8 @@ static struct omap_hwmod_class_sysconfig
omap44xx_uart_sysc = {
.sysc_offs = 0x0054,
.syss_offs = 0x0058,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -1354,7 +1356,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_wd_timer_sysc = {
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
--
1.7.0.4
--
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[PATCH 4/5] OMAP4: hwmod data: Add IVA and DSP
Add IVA and DSP hwmods in order to allow the pm code to
initialize properly the processors devices during
omap2_init_processor_devices.
It will avoid the following warnings.
_init_omap_device: could not find omap_hwmod for iva
_init_omap_device: could not find omap_hwmod for dsp
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 243 +++-
1 files changed, 241 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 7dccba3..102c76f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -37,7 +37,9 @@
/* Backward references (IPs with Bus Master capability) */
static struct omap_hwmod omap44xx_dmm_hwmod;
+static struct omap_hwmod omap44xx_dsp_hwmod;
static struct omap_hwmod omap44xx_emif_fw_hwmod;
+static struct omap_hwmod omap44xx_iva_hwmod;
static struct omap_hwmod omap44xx_l3_instr_hwmod;
static struct omap_hwmod omap44xx_l3_main_1_hwmod;
static struct omap_hwmod omap44xx_l3_main_2_hwmod;
@@ -167,6 +169,14 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
};
/* l3_instr interface data */
+/* iva - l3_instr */
+static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {
+ .master = omap44xx_iva_hwmod,
+ .slave = omap44xx_l3_instr_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_3 - l3_instr */
static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
.master = omap44xx_l3_main_3_hwmod,
@@ -177,6 +187,7 @@ static struct omap_hwmod_ocp_if
omap44xx_l3_main_3__l3_instr = {
/* l3_instr slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
+ omap44xx_iva__l3_instr,
omap44xx_l3_main_3__l3_instr,
};
@@ -189,6 +200,14 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
};
/* l3_main_1 interface data */
+/* dsp - l3_main_1 */
+static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {
+ .master = omap44xx_dsp_hwmod,
+ .slave = omap44xx_l3_main_1_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_2 - l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
.master = omap44xx_l3_main_2_hwmod,
@@ -215,6 +234,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
/* l3_main_1 slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
+ omap44xx_dsp__l3_main_1,
omap44xx_l3_main_2__l3_main_1,
omap44xx_l4_cfg__l3_main_1,
omap44xx_mpu__l3_main_1,
@@ -229,6 +249,14 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
};
/* l3_main_2 interface data */
+/* iva - l3_main_2 */
+static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {
+ .master = omap44xx_iva_hwmod,
+ .slave = omap44xx_l3_main_2_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_1 - l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
.master = omap44xx_l3_main_1_hwmod,
@@ -247,6 +275,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2
= {
/* l3_main_2 slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
+ omap44xx_iva__l3_main_2,
omap44xx_l3_main_1__l3_main_2,
omap44xx_l4_cfg__l3_main_2,
};
@@ -308,6 +337,14 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
};
/* l4_abe interface data */
+/* dsp - l4_abe */
+static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = {
+ .master = omap44xx_dsp_hwmod,
+ .slave = omap44xx_l4_abe_hwmod,
+ .clk= ocp_abe_iclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_1 - l4_abe */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {
.master = omap44xx_l3_main_1_hwmod,
@@ -326,6 +363,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
/* l4_abe slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
+ omap44xx_dsp__l4_abe,
omap44xx_l3_main_1__l4_abe,
omap44xx_mpu__l4_abe,
};
@@ -456,7 +494,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* debugss
* dma_system
* dmic
- * dsp
* dss
* dss_dispc
* dss_dsi1
@@ -476,7 +513,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* hsi
* ipu
* iss
- * iva
* kbd
* mailbox
* mcasp
@@ -530,6 +566,91 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
*/
/*
+ * 'dsp' class
+ * dsp sub-system
+ */
+
+static struct omap_hwmod_class omap44xx_dsp_hwmod_class
[PATCH 5/5] OMAP4: hwmod clock data: Fix GPIO opt_clks and ocp_if iclk
Fix opt clocks name in clock framework and hwmod.
Add the missing iclk in the ocp_if structure.
Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to ensure
the the GPIO optional clock is enable during reset.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Tested-by: Charulatha V ch...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 12 ++--
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 23 +--
2 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 1599836..c59a5a9 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -2856,17 +2856,17 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, emif2_fck,emif2_fck,
CK_443X),
CLK(NULL, fdif_fck, fdif_fck,
CK_443X),
CLK(NULL, fpka_fck, fpka_fck,
CK_443X),
- CLK(NULL, gpio1_dbck, gpio1_dbclk,
CK_443X),
+ CLK(NULL, gpio1_dbclk, gpio1_dbclk,
CK_443X),
CLK(NULL, gpio1_ick,gpio1_ick,
CK_443X),
- CLK(NULL, gpio2_dbck, gpio2_dbclk,
CK_443X),
+ CLK(NULL, gpio2_dbclk, gpio2_dbclk,
CK_443X),
CLK(NULL, gpio2_ick,gpio2_ick,
CK_443X),
- CLK(NULL, gpio3_dbck, gpio3_dbclk,
CK_443X),
+ CLK(NULL, gpio3_dbclk, gpio3_dbclk,
CK_443X),
CLK(NULL, gpio3_ick,gpio3_ick,
CK_443X),
- CLK(NULL, gpio4_dbck, gpio4_dbclk,
CK_443X),
+ CLK(NULL, gpio4_dbclk, gpio4_dbclk,
CK_443X),
CLK(NULL, gpio4_ick,gpio4_ick,
CK_443X),
- CLK(NULL, gpio5_dbck, gpio5_dbclk,
CK_443X),
+ CLK(NULL, gpio5_dbclk, gpio5_dbclk,
CK_443X),
CLK(NULL, gpio5_ick,gpio5_ick,
CK_443X),
- CLK(NULL, gpio6_dbck, gpio6_dbclk,
CK_443X),
+ CLK(NULL, gpio6_dbclk, gpio6_dbclk,
CK_443X),
CLK(NULL, gpio6_ick,gpio6_ick,
CK_443X),
CLK(NULL, gpmc_ick, gpmc_ick,
CK_443X),
CLK(NULL, gpu_fck, gpu_fck,
CK_443X),
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 102c76f..0ed9cdd 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -696,6 +696,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {
.master = omap44xx_l4_wkup_hwmod,
.slave = omap44xx_gpio1_hwmod,
+ .clk= l4_wkup_clk_mux_ck,
.addr = omap44xx_gpio1_addrs,
.addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs),
.user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -707,7 +708,7 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = {
};
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
- { .role = dbclk, .clk = sys_32k_ck },
+ { .role = dbclk, .clk = gpio1_dbclk },
};
static struct omap_hwmod omap44xx_gpio1_hwmod = {
@@ -747,6 +748,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {
.master = omap44xx_l4_per_hwmod,
.slave = omap44xx_gpio2_hwmod,
+ .clk= l4_div_ck,
.addr = omap44xx_gpio2_addrs,
.addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs),
.user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -758,12 +760,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[]
= {
};
static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
- { .role = dbclk, .clk = sys_32k_ck },
+ { .role = dbclk, .clk = gpio2_dbclk },
};
static struct omap_hwmod omap44xx_gpio2_hwmod = {
.name = gpio2,
.class = omap44xx_gpio_hwmod_class,
+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs),
.main_clk = gpio2_ick,
@@ -798,6 +801,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {
.master = omap44xx_l4_per_hwmod,
.slave = omap44xx_gpio3_hwmod,
+ .clk= l4_div_ck,
.addr = omap44xx_gpio3_addrs
[PATCH 0/5] OMAP34: Fixes in setup/suspend/powerdomain
Hi Paul, This is a series of fixes on OMAP3/4 in setup apis, in the suspend framework and in powerdomain modelling for OMAP4. The series is based on your power domain series and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/power Tested on 4430sdp + ES2.0 with omap2plus_defconfig. Tested on 3430sdp - validate OFF in suspend, with omap3_pm_defconfig from Kevin's tree. Tested on 2430sdp after fixing the break on linux-omap master. See http://www.spinics.net/lists/linux-omap/msg42050.html Regards, Rajendra, Santosh Benoit Rajendra Nayak (3): OMAP4: PM: Use the lowpwrstatechange feature on OMAP4 OMAP4: PM: Do not assume clkdm supports hw transitions OMAP4: powerdomain: l4per pwrdm does not support OFF Santosh Shilimkar (2): OMAP4: powerdomain: Remove L3INIT_PD OFF state OMAP4: clock data: Keep L3INSTR clock domain modulemode under HW control arch/arm/mach-omap2/clock44xx_data.c|3 +++ arch/arm/mach-omap2/pm.c| 16 +--- arch/arm/mach-omap2/powerdomains44xx_data.c |4 ++-- 3 files changed, 18 insertions(+), 5 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] OMAP4: PM: Use the lowpwrstatechange feature on OMAP4
From: Rajendra Nayak rna...@ti.com
For pwrdm's which support lowperstatechange, do not try waking
up the domain to put it back to deeper sleep state.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/pm.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index cf1c4c9..dc68044 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -114,6 +114,14 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32
state)
return ret;
if (pwrdm_read_pwrst(pwrdm) PWRDM_POWER_ON) {
+ if ((pwrdm_read_pwrst(pwrdm) state)
+ (pwrdm-flags PWRDM_HAS_LOWPOWERSTATECHANGE)) {
+ ret = pwrdm_set_next_pwrst(pwrdm, state);
+ pwrdm_set_lowpwrstchange(pwrdm);
+ pwrdm_wait_transition(pwrdm);
+ pwrdm_state_switch(pwrdm);
+ return ret;
+ }
omap2_clkdm_wakeup(pwrdm-pwrdm_clkdms[0]);
sleep_switch = 1;
pwrdm_wait_transition(pwrdm);
--
1.7.0.4
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[PATCH 4/5] OMAP4: powerdomain: Remove L3INIT_PD OFF state
From: Santosh Shilimkar santosh.shilim...@ti.com
On OMAP4, there is an issue when L3INIT transitions to OFF mode without
device OFF. The SAR restore mechanism will not get triggered without
wakeup from device OFF and hence the USB host and USB TLL context
will not be restored.
Hardware team recommended to remove the OFF state support for L3INIT_PD
since there is no power impact. It will be removed on next OMAP revision
(OMAP4440 and beyond).
Hence this patch removed the OFF state from L3INIT_PD. The deepest
state supported on L3INIT_PD is OSWR just like CORE_PD and PER_PD
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
[b-cous...@ti.com: update the changelog with next OMAP info]
Signed-off-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/powerdomains44xx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c
b/arch/arm/mach-omap2/powerdomains44xx_data.c
index cec9c09..26d7641 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -267,7 +267,7 @@ static struct powerdomain l3init_44xx_pwrdm = {
.prcm_offs= OMAP4430_PRM_L3INIT_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
- .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks= 1,
.pwrsts_mem_ret = {
--
1.7.0.4
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[PATCH 2/5] OMAP4: PM: Do not assume clkdm supports hw transitions
From: Rajendra Nayak rna...@ti.com
omap_set_pwrdm_state today assumes a clkdm supports hw_auto
transitions and hence leaves some which do not support this
in sw wkup state preventing low power transitions.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/pm.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index dc68044..a2a70e1 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -91,8 +91,7 @@ static void omap2_init_processor_devices(void)
/*
* This sets pwrdm state (other than mpu core. Currently only ON
- * RET are supported. Function is assuming that clkdm doesn't have
- * hw_sup mode enabled.
+ * RET are supported.
*/
int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
{
@@ -135,7 +134,10 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32
state)
}
if (sleep_switch) {
- omap2_clkdm_allow_idle(pwrdm-pwrdm_clkdms[0]);
+ if (pwrdm-pwrdm_clkdms[0]-flags CLKDM_CAN_ENABLE_AUTO)
+ omap2_clkdm_allow_idle(pwrdm-pwrdm_clkdms[0]);
+ else
+ omap2_clkdm_sleep(pwrdm-pwrdm_clkdms[0]);
pwrdm_wait_transition(pwrdm);
pwrdm_state_switch(pwrdm);
}
--
1.7.0.4
--
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[PATCH 3/5] OMAP4: powerdomain: l4per pwrdm does not support OFF
From: Rajendra Nayak rna...@ti.com
The l4per power domain in ES2.0 does support only RET and ON states.
The previous ES1.0 HW database was wrong and thus fixed on ES2.
Change the pwrsts field to reflect that.
Signed-off-by: Rajendra Nayak rna...@ti.com
Acked-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/powerdomains44xx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c
b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 5fdf485..cec9c09 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -285,7 +285,7 @@ static struct powerdomain l4per_44xx_pwrdm = {
.prcm_offs= OMAP4430_PRM_L4PER_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
- .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts = PWRSTS_RET_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks= 2,
.pwrsts_mem_ret = {
--
1.7.0.4
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[PATCH 5/5] OMAP4: clock data: Keep L3INSTR clock domain modulemode under HW control
From: Santosh Shilimkar santosh.shilim...@ti.com
L3INSTR clock domain is read only register and its reset value is
HW_AUTO. The modules withing this clock domain needs to be kept under
hardware control.
MODULEMODE:
- 0x0: Module is disable by software. Any INTRCONN access to module
results in an error, except if resulting from a module wakeup
(asynchronous wakeup).
- 0x1: Module is managed automatically by hardware according to
clock domain transition. A clock domain sleep transition put
module into idle. A wakeup domain transition put it back
into function. If CLKTRCTRL=3, any INTRCONN access to module
is always granted. Module clocks may be gated according to
the clock domain state.
This patch keeps CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL
and CM_L3INSTR_INTRCONN_WP1_CLKCTRL module mode under hardware control
by using ENABLE_ON_INIT flag.
Without this the OMAP4 device OFF mode SAR restore phase aborts during
interconnect register restore phase. This can be also handled by doing
explicit a clock enable and disable in the low power code since there
is no direct module associated with it. But that seems not necessary
since the clock domain is under HW control.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index 76e900b..a72f6ab 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1755,6 +1755,7 @@ static struct clk l3_instr_ick = {
.enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = l3_instr_clkdm,
+ .flags = ENABLE_ON_INIT,
.parent = l3_div_ck,
.recalc = followparent_recalc,
};
@@ -1765,6 +1766,7 @@ static struct clk l3_main_3_ick = {
.enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = l3_instr_clkdm,
+ .flags = ENABLE_ON_INIT,
.parent = l3_div_ck,
.recalc = followparent_recalc,
};
@@ -2069,6 +2071,7 @@ static struct clk ocp_wp_noc_ick = {
.enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = l3_instr_clkdm,
+ .flags = ENABLE_ON_INIT,
.parent = l3_div_ck,
.recalc = followparent_recalc,
};
--
1.7.0.4
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[PATCH v2 0/7] OMAP4: hwmod data fixes and update
Hi Paul, Here is a small set of OMAP4 hwmod data updates. Re-order properly the data that were a little bit shuffled during the previous merge window. Add the new reset flags introduced in 2.6.37 and that were not used in the hwmod data. The OMAP2 and OMAP3 fixes should come soon... ...maybe not that soon :-) Fix some missing field in the GPIO OMAP4 hwmod data that I missed during the review. IVA and DSP are added just to allow the processors device creation at boot time and avoid the warnings. Thanks to Charu for testing the GPIO / WD_TIMER changes. Thanks to Govindraj for testing the UART changes. The series is based on your clk_a_2.6.38 branch from your integration tree (git://git.pwsan.com/linux-integration) and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/hwmod_data Please note that there is a slight dependency with the following patch due to the name change of the iva fclk: OMAP4: clock data: Add missing DPLL x2 clock node https://patchwork.kernel.org/patch/396612/ Tested on sdp4430 + ES2.0/ES2.1. Regards, Benoit Changes since v1: http://www.spinics.net/lists/arm-kernel/msg107082.html: - Include the changelog fixes from Paul - Fix the order of the dsp hwmod data - Fix OMAP2430 i2c dev_attr warning (minor fix, but not tested) - Include Kevin's patch to fix wakeup in hwmod core Benoit Cousson (6): OMAP4: hwmod data: Fix hwmod entries order OMAP4: hwmod data: Add SYSS_HAS_RESET_STATUS flag OMAP4: hwmod data: Fix missing address in DMM and EMIF_FW OMAP4: hwmod data: Add IVA and DSP OMAP4: hwmod clock data: Fix GPIO opt_clks and ocp_if iclk OMAP2430: hwmod data: Use common dev_attr for i2c1 and i2c2 Kevin Hilman (1): OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency arch/arm/mach-omap2/clock44xx_data.c | 12 +- arch/arm/mach-omap2/omap_hwmod.c | 32 +- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 16 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1258 ++-- 4 files changed, 845 insertions(+), 473 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/7] OMAP4: hwmod data: Fix hwmod entries order
The original OMAP4 hwmod data files is fully generated from HW
database. But since the file is introduced incrementaly along
with driver that uses the data, it has to be splitted by the driver
owner and then re-merged by the maintainer.
Because of the similarity of the data, git is completely lost
during such merge and thus the data does not look like the original one
at the end.
Re-order properly the structures to stay in sync with original data set.
This makes it much easier to diff the autogenerated script output with
what's in mainline, see differences, and generate patches for those
diffs. The goal is to stay in sync with the autogenerated data from now
on.
Add a comment that does contain all the IPs that can have a hwmod, but
do not have it in the file for the moment. It gives a good indication
of the progress.
Signed-off-by: Benoit Cousson b-cous...@ti.com
[p...@pwsan.com: updated to apply against current core integration branch,
commit message slightly amplified; fixed opt_clks_cnt whitespace]
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Govindraj.R govindraj.r...@ti.com
Cc: Charulatha V ch...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1004 +++-
1 files changed, 554 insertions(+), 450 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index ae14bd5..872d360 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -171,6 +171,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/* l3_main_1 interface data */
/* l3_main_2 - l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
.master = omap44xx_l3_main_2_hwmod,
@@ -387,6 +388,464 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
};
/*
+ * 'mpu_bus' class
+ * instance(s): mpu_private
+ */
+static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = {
+ .name = mpu_bus,
+};
+
+/* mpu_private interface data */
+/* mpu - mpu_private */
+static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
+ .master = omap44xx_mpu_hwmod,
+ .slave = omap44xx_mpu_private_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mpu_private slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = {
+ omap44xx_mpu__mpu_private,
+};
+
+static struct omap_hwmod omap44xx_mpu_private_hwmod = {
+ .name = mpu_private,
+ .class = omap44xx_mpu_bus_hwmod_class,
+ .slaves = omap44xx_mpu_private_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * Modules omap_hwmod structures
+ *
+ * The following IPs are excluded for the moment because:
+ * - They do not need an explicit SW control using omap_hwmod API.
+ * - They still need to be validated with the driver
+ * properly adapted to omap_hwmod / omap_device
+ *
+ * aess
+ * bandgap
+ * c2c
+ * c2c_target_fw
+ * cm_core
+ * cm_core_aon
+ * counter_32k
+ * ctrl_module_core
+ * ctrl_module_pad_core
+ * ctrl_module_pad_wkup
+ * ctrl_module_wkup
+ * debugss
+ * dma_system
+ * dmic
+ * dsp
+ * dss
+ * dss_dispc
+ * dss_dsi1
+ * dss_dsi2
+ * dss_hdmi
+ * dss_rfbi
+ * dss_venc
+ * efuse_ctrl_cust
+ * efuse_ctrl_std
+ * elm
+ * emif1
+ * emif2
+ * fdif
+ * gpmc
+ * gpu
+ * hdq1w
+ * hsi
+ * ipu
+ * iss
+ * iva
+ * kbd
+ * mailbox
+ * mcasp
+ * mcbsp1
+ * mcbsp2
+ * mcbsp3
+ * mcbsp4
+ * mcpdm
+ * mcspi1
+ * mcspi2
+ * mcspi3
+ * mcspi4
+ * mmc1
+ * mmc2
+ * mmc3
+ * mmc4
+ * mmc5
+ * mpu_c0
+ * mpu_c1
+ * ocmc_ram
+ * ocp2scp_usb_phy
+ * ocp_wp_noc
+ * prcm
+ * prcm_mpu
+ * prm
+ * scrm
+ * sl2if
+ * slimbus1
+ * slimbus2
+ * smartreflex_core
+ * smartreflex_iva
+ * smartreflex_mpu
+ * spinlock
+ * timer1
+ * timer10
+ * timer11
+ * timer2
+ * timer3
+ * timer4
+ * timer5
+ * timer6
+ * timer7
+ * timer8
+ * timer9
+ * usb_host_fs
+ * usb_host_hs
+ * usb_otg_hs
+ * usb_phy_cm
+ * usb_tll_hs
+ * usim
+ */
+
+/*
+ * 'gpio' class
+ * general purpose io module
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0114,
+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_gpio_hwmod_class = {
+ .name = gpio,
+ .sysc = omap44xx_gpio_sysc,
+ .rev = 2,
+};
+
+/* gpio
[PATCH v2 2/7] OMAP4: hwmod data: Add SYSS_HAS_RESET_STATUS flag
Update the data for GPIO, UART, WD_TIMER and I2C in order to
support the new reset status flag introduce in the following
commit:
commit 2cb068149c365f1c2b10f2ece6786139527dcc16
OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs
Without this flag properly set, the reset is done, but the hwmod
core code will not wait for the reset completion to continue its
excecution.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Tested-by: Charulatha V ch...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Govindraj.R govindraj.r...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 872d360..00a670d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -521,8 +521,9 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc
= {
.rev_offs = 0x,
.sysc_offs = 0x0010,
.syss_offs = 0x0114,
- .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -855,7 +856,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc
= {
.syss_offs = 0x0090,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -1127,7 +1128,8 @@ static struct omap_hwmod_class_sysconfig
omap44xx_uart_sysc = {
.sysc_offs = 0x0054,
.syss_offs = 0x0058,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_ENAWAKEUP |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -1357,7 +1359,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_wd_timer_sysc = {
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET),
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields= omap_hwmod_sysc_type1,
};
--
1.7.0.4
--
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[PATCH v2 4/7] OMAP4: hwmod data: Add IVA and DSP
Add IVA and DSP hwmods in order to allow the pm code to
initialize properly the processors devices during
omap2_init_processor_devices.
It will avoid the following warnings.
_init_omap_device: could not find omap_hwmod for iva
_init_omap_device: could not find omap_hwmod for dsp
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 243 +++-
1 files changed, 241 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index afc35d0..8524d92 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -40,7 +40,9 @@
/* Backward references (IPs with Bus Master capability) */
static struct omap_hwmod omap44xx_dmm_hwmod;
+static struct omap_hwmod omap44xx_dsp_hwmod;
static struct omap_hwmod omap44xx_emif_fw_hwmod;
+static struct omap_hwmod omap44xx_iva_hwmod;
static struct omap_hwmod omap44xx_l3_instr_hwmod;
static struct omap_hwmod omap44xx_l3_main_1_hwmod;
static struct omap_hwmod omap44xx_l3_main_2_hwmod;
@@ -170,6 +172,14 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = {
};
/* l3_instr interface data */
+/* iva - l3_instr */
+static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = {
+ .master = omap44xx_iva_hwmod,
+ .slave = omap44xx_l3_instr_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_3 - l3_instr */
static struct omap_hwmod_ocp_if omap44xx_l3_main_3__l3_instr = {
.master = omap44xx_l3_main_3_hwmod,
@@ -180,6 +190,7 @@ static struct omap_hwmod_ocp_if
omap44xx_l3_main_3__l3_instr = {
/* l3_instr slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = {
+ omap44xx_iva__l3_instr,
omap44xx_l3_main_3__l3_instr,
};
@@ -192,6 +203,14 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
};
/* l3_main_1 interface data */
+/* dsp - l3_main_1 */
+static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = {
+ .master = omap44xx_dsp_hwmod,
+ .slave = omap44xx_l3_main_1_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_2 - l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l3_main_1 = {
.master = omap44xx_l3_main_2_hwmod,
@@ -218,6 +237,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
/* l3_main_1 slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
+ omap44xx_dsp__l3_main_1,
omap44xx_l3_main_2__l3_main_1,
omap44xx_l4_cfg__l3_main_1,
omap44xx_mpu__l3_main_1,
@@ -232,6 +252,14 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
};
/* l3_main_2 interface data */
+/* iva - l3_main_2 */
+static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {
+ .master = omap44xx_iva_hwmod,
+ .slave = omap44xx_l3_main_2_hwmod,
+ .clk= l3_div_ck,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_1 - l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
.master = omap44xx_l3_main_1_hwmod,
@@ -250,6 +278,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2
= {
/* l3_main_2 slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = {
+ omap44xx_iva__l3_main_2,
omap44xx_l3_main_1__l3_main_2,
omap44xx_l4_cfg__l3_main_2,
};
@@ -311,6 +340,14 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = {
};
/* l4_abe interface data */
+/* dsp - l4_abe */
+static struct omap_hwmod_ocp_if omap44xx_dsp__l4_abe = {
+ .master = omap44xx_dsp_hwmod,
+ .slave = omap44xx_l4_abe_hwmod,
+ .clk= ocp_abe_iclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_1 - l4_abe */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = {
.master = omap44xx_l3_main_1_hwmod,
@@ -329,6 +366,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = {
/* l4_abe slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = {
+ omap44xx_dsp__l4_abe,
omap44xx_l3_main_1__l4_abe,
omap44xx_mpu__l4_abe,
};
@@ -459,7 +497,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* debugss
* dma_system
* dmic
- * dsp
* dss
* dss_dispc
* dss_dsi1
@@ -479,7 +516,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* hsi
* ipu
* iss
- * iva
* kbd
* mailbox
* mcasp
@@ -533,6 +569,91 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
*/
/*
+ * 'dsp' class
+ * dsp sub-system
+ */
+
+static struct omap_hwmod_class omap44xx_dsp_hwmod_class
[PATCH v2 3/7] OMAP4: hwmod data: Fix missing address in DMM and EMIF_FW
The DMM is a piece of interconnect that need to be configured properly
for the tiler functionnality. It thus exposes some configuration registers
that were missing previously.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 26 +++---
1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 00a670d..afc35d0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -71,7 +71,15 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
.master = omap44xx_l3_main_1_hwmod,
.slave = omap44xx_dmm_hwmod,
.clk= l3_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .user = OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {
+ {
+ .pa_start = 0x4e00,
+ .pa_end = 0x4e0007ff,
+ .flags = ADDR_TYPE_RT
+ },
};
/* mpu - dmm */
@@ -79,7 +87,9 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
.master = omap44xx_mpu_hwmod,
.slave = omap44xx_dmm_hwmod,
.clk= l3_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .addr = omap44xx_dmm_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs),
+ .user = OCP_USER_MPU,
};
/* dmm slave ports */
@@ -119,12 +129,22 @@ static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {
+ {
+ .pa_start = 0x4a20c000,
+ .pa_end = 0x4a20c0ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
/* l4_cfg - emif_fw */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
.master = omap44xx_l4_cfg_hwmod,
.slave = omap44xx_emif_fw_hwmod,
.clk= l4_div_ck,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
+ .addr = omap44xx_emif_fw_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs),
+ .user = OCP_USER_MPU,
};
/* emif_fw slave ports */
--
1.7.0.4
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[PATCH v2 7/7] OMAP2430: hwmod data: Use common dev_attr for i2c1 and i2c2
Since i2c1 and i2c2 are using the same data, remove the two previous
instances and use a common i2c_dev_attr one.
Moreover, that will fix the following warning:
arch/arm/mach-omap2/omap_hwmod_2430_data.c:485:
warning: 'i2c_dev_attr' defined but not used
Signed-off-by: Benoit Cousson b-cous...@ti.com
Acked-by: Rajendra Nayak rna...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 16 +---
1 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 0f87736..eb73e5c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -482,14 +482,12 @@ static struct omap_hwmod_class i2c_class = {
.sysc = i2c_sysc,
};
-static struct omap_i2c_dev_attr i2c_dev_attr;
-
-/* I2C1 */
-
-static struct omap_i2c_dev_attr i2c1_dev_attr = {
+static struct omap_i2c_dev_attr i2c_dev_attr = {
.fifo_depth = 8, /* bytes */
};
+/* I2C1 */
+
static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
{ .irq = INT_24XX_I2C1_IRQ, },
};
@@ -530,16 +528,12 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
.slaves = omap2430_i2c1_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
.class = i2c_class,
- .dev_attr = i2c1_dev_attr,
+ .dev_attr = i2c_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
/* I2C2 */
-static struct omap_i2c_dev_attr i2c2_dev_attr = {
- .fifo_depth = 8, /* bytes */
-};
-
static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
{ .irq = INT_24XX_I2C2_IRQ, },
};
@@ -572,7 +566,7 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
.slaves = omap2430_i2c2_slaves,
.slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves),
.class = i2c_class,
- .dev_attr = i2c2_dev_attr,
+ .dev_attr = i2c_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};
--
1.7.0.4
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[PATCH v2 5/7] OMAP4: hwmod clock data: Fix GPIO opt_clks and ocp_if iclk
Fix opt clocks name in clock framework and hwmod.
Add the missing iclk in the ocp_if structure.
Add the HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to ensure
the the GPIO optional clock is enable during reset.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Tested-by: Charulatha V ch...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 12 ++--
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 23 +--
2 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index a807adc..94a1eb3 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3110,17 +3110,17 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, emif2_fck,emif2_fck,
CK_443X),
CLK(NULL, fdif_fck, fdif_fck,
CK_443X),
CLK(NULL, fpka_fck, fpka_fck,
CK_443X),
- CLK(NULL, gpio1_dbck, gpio1_dbclk,
CK_443X),
+ CLK(NULL, gpio1_dbclk, gpio1_dbclk,
CK_443X),
CLK(NULL, gpio1_ick,gpio1_ick,
CK_443X),
- CLK(NULL, gpio2_dbck, gpio2_dbclk,
CK_443X),
+ CLK(NULL, gpio2_dbclk, gpio2_dbclk,
CK_443X),
CLK(NULL, gpio2_ick,gpio2_ick,
CK_443X),
- CLK(NULL, gpio3_dbck, gpio3_dbclk,
CK_443X),
+ CLK(NULL, gpio3_dbclk, gpio3_dbclk,
CK_443X),
CLK(NULL, gpio3_ick,gpio3_ick,
CK_443X),
- CLK(NULL, gpio4_dbck, gpio4_dbclk,
CK_443X),
+ CLK(NULL, gpio4_dbclk, gpio4_dbclk,
CK_443X),
CLK(NULL, gpio4_ick,gpio4_ick,
CK_443X),
- CLK(NULL, gpio5_dbck, gpio5_dbclk,
CK_443X),
+ CLK(NULL, gpio5_dbclk, gpio5_dbclk,
CK_443X),
CLK(NULL, gpio5_ick,gpio5_ick,
CK_443X),
- CLK(NULL, gpio6_dbck, gpio6_dbclk,
CK_443X),
+ CLK(NULL, gpio6_dbclk, gpio6_dbclk,
CK_443X),
CLK(NULL, gpio6_ick,gpio6_ick,
CK_443X),
CLK(NULL, gpmc_ick, gpmc_ick,
CK_443X),
CLK(NULL, gpu_fck, gpu_fck,
CK_443X),
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 8524d92..aaeb3e3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -699,6 +699,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {
.master = omap44xx_l4_wkup_hwmod,
.slave = omap44xx_gpio1_hwmod,
+ .clk= l4_wkup_clk_mux_ck,
.addr = omap44xx_gpio1_addrs,
.addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs),
.user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -710,7 +711,7 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio1_slaves[] = {
};
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
- { .role = dbclk, .clk = sys_32k_ck },
+ { .role = dbclk, .clk = gpio1_dbclk },
};
static struct omap_hwmod omap44xx_gpio1_hwmod = {
@@ -750,6 +751,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {
.master = omap44xx_l4_per_hwmod,
.slave = omap44xx_gpio2_hwmod,
+ .clk= l4_div_ck,
.addr = omap44xx_gpio2_addrs,
.addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs),
.user = OCP_USER_MPU | OCP_USER_SDMA,
@@ -761,12 +763,13 @@ static struct omap_hwmod_ocp_if *omap44xx_gpio2_slaves[]
= {
};
static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
- { .role = dbclk, .clk = sys_32k_ck },
+ { .role = dbclk, .clk = gpio2_dbclk },
};
static struct omap_hwmod omap44xx_gpio2_hwmod = {
.name = gpio2,
.class = omap44xx_gpio_hwmod_class,
+ .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap44xx_gpio2_irqs,
.mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs),
.main_clk = gpio2_ick,
@@ -801,6 +804,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[]
= {
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {
.master = omap44xx_l4_per_hwmod,
.slave = omap44xx_gpio3_hwmod,
+ .clk= l4_div_ck,
.addr
[PATCH v2 6/7] OMAP2+: omap_hwmod: fix wakeup enable/disable for consistency
From: Kevin Hilman khil...@deeprootsystems.com
In the omap_hwmod core, most of the SYSCONFIG register helper
functions do not directly write the register, but instead just modify
a value passed in.
This patch converts the _enable_wakeup() and _disable_wakeup() helper
functions to take a value argument and only modify it instead of
actually writing the register. This makes the wakeup helpers
consistent with the other helper functions and avoids unintentional
problems like the following.
This problem was found after discovering that GPIO wakeups were no
longer functional. The root cause was that the ENAWAKEUP bit of the
SYSCONFIG register was being unintentionaly overwritten, leaving
wakeups disabled after the following two commits were combined:
commit: 9980ce53c97392a3dbdc9d1ac3e455d79b4167ed
OMAP: hwmod: Enable module wakeup if in smartidle
commit: 78f26e872f77b6312273216de1a8f836c6f2e143
OMAP: hwmod: Set autoidle after smartidle during _sysc_enable
There resulting in code in _enable_sysc() was this:
/*
* XXX The clock framework should handle this, by
* calling into this code. But this must wait until the
* clock structures are tagged with omap_hwmod entries
*/
if ((oh-flags HWMOD_SET_DEFAULT_CLOCKACT)
(sf SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh-class-sysc-clockact, v);
_write_sysconfig(v, oh);
so here, 'v' has wakeups disabled.
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf SYSC_HAS_SIDLEMODE) !(oh-flags HWMOD_SWSUP_SIDLE))
_enable_wakeup(oh);
Here wakeup is enabled in the SYSCONFIG register (but 'v' is not updated)
/*
* Set the autoidle bit only after setting the smartidle bit
* Setting this will not have any impact on the other modules.
*/
if (sf SYSC_HAS_AUTOIDLE) {
idlemode = (oh-flags HWMOD_NO_OCP_AUTOIDLE) ?
0 : 1;
_set_module_autoidle(oh, idlemode, v);
_write_sysconfig(v, oh);
}
And here, SYSCONFIG is updated again using 'v', which does not have
wakeups enabled, resulting in ENAWAKEUP being cleared.
Special thanks to Benoit Cousson for pointing out that wakeups were
supposed to be automatically enabled when a hwmod is enabled, and thus
helping target the root cause of this problem.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoit Cousson b-cous...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 32 +---
1 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 12856eb..81c1097 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -390,9 +390,9 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8
autoidle,
* Allow the hardware module @oh to send wakeups. Returns -EINVAL
* upon error or 0 upon success.
*/
-static int _enable_wakeup(struct omap_hwmod *oh)
+static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
{
- u32 v, wakeup_mask;
+ u32 wakeup_mask;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_ENAWAKEUP))
@@ -405,9 +405,7 @@ static int _enable_wakeup(struct omap_hwmod *oh)
wakeup_mask = (0x1 oh-class-sysc-sysc_fields-enwkup_shift);
- v = oh-_sysc_cache;
- v |= wakeup_mask;
- _write_sysconfig(v, oh);
+ *v |= wakeup_mask;
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
@@ -423,9 +421,9 @@ static int _enable_wakeup(struct omap_hwmod *oh)
* Prevent the hardware module @oh to send wakeups. Returns -EINVAL
* upon error or 0 upon success.
*/
-static int _disable_wakeup(struct omap_hwmod *oh)
+static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
{
- u32 v, wakeup_mask;
+ u32 wakeup_mask;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_ENAWAKEUP))
@@ -438,9 +436,7 @@ static int _disable_wakeup(struct omap_hwmod *oh)
wakeup_mask = (0x1 oh-class-sysc-sysc_fields-enwkup_shift);
- v = oh-_sysc_cache;
- v = ~wakeup_mask;
- _write_sysconfig(v, oh);
+ *v = ~wakeup_mask;
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
@@ -788,11 +784,11 @@ static void _enable_sysc(struct omap_hwmod *oh)
(sf SYSC_HAS_CLOCKACTIVITY))
_set_clockactivity(oh, oh-class-sysc-clockact, v);
- _write_sysconfig(v, oh);
-
/* If slave is in SMARTIDLE, also enable wakeup */
if ((sf SYSC_HAS_SIDLEMODE) !(oh-flags HWMOD_SWSUP_SIDLE))
- _enable_wakeup(oh);
+ _enable_wakeup(oh, v);
+
+ _write_sysconfig(v, oh);
/*
* Set the autoidle bit only after setting the smartidle bit
@@ -2011,13 +2007,16 @@ int
[PATCH v2 0/6] OMAP: hwmod core fix and cleanup for 2.6.38
Hi Paul, Here is a small series that just remove the omap_hwmod_mutex and move functions not needed at runtime to the __init section. It fix as well a bug discovered during the on-going hwmod migration of device that does have a functional clock external (mcpdm). It extends as well the fix Kevin did for wakeup for OMAP4 IP with smart idle with wakeup support. The series is based on my for_2.6.38/hwmod_data branch and is available here: git://gitorious.org/omap-pm/linux.git for_2.6.38/hwmod Tested on sdp4430 ES2.0 with omap2plus_defconfig. It still requires some test on OMAP3 and OMAP2. Thanks to Seb Guiriec for testing the SIDLE_SMART_WKUP fix. Regards, Benoit Changes since v1: http://www.spinics.net/lists/linux-omap/msg40580.html: - Add SIDLE_SMART_WKUP flag support for OMAP4 Benoit Cousson (5): OMAP2+: hwmod: Make omap_hwmod_register private and remove omap_hwmod_unregister OMAP2+: hwmod: Mark functions used only during initialization with __init OMAP2+: hwmod: Remove omap_hwmod_mutex OMAP2+: hwmod: Add wakeup support for new OMAP4 IPs OMAP4: hwmod data: Add SIDLE_SMART_WKUP modes to several IPs Rajendra Nayak (1): OMAP2+: hwmod: Disable clocks when hwmod enable fails arch/arm/mach-omap2/omap_hwmod.c | 172 +++--- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 12 ++- arch/arm/plat-omap/include/plat/omap_hwmod.h |7 +- 3 files changed, 82 insertions(+), 109 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/6] OMAP2+: hwmod: Make omap_hwmod_register private and remove omap_hwmod_unregister
Do not allow omap_hwmod_register to be used outside the core
hwmod code. An omap_hwmod should be registered only at init time.
Remove the omap_hwmod_unregister that is not used today since the
hwmod list will be built once at init time and never be modified
at runtime.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 137 ++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 -
2 files changed, 55 insertions(+), 84 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 81c1097..298fc3b 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1418,60 +1418,8 @@ static int _setup(struct omap_hwmod *oh, void *data)
return 0;
}
-
-
-/* Public functions */
-
-u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
-{
- if (oh-flags HWMOD_16BIT_REG)
- return __raw_readw(oh-_mpu_rt_va + reg_offs);
- else
- return __raw_readl(oh-_mpu_rt_va + reg_offs);
-}
-
-void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
-{
- if (oh-flags HWMOD_16BIT_REG)
- __raw_writew(v, oh-_mpu_rt_va + reg_offs);
- else
- __raw_writel(v, oh-_mpu_rt_va + reg_offs);
-}
-
-/**
- * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
- * @oh: struct omap_hwmod *
- * @idlemode: SIDLEMODE field bits (shifted to bit 0)
- *
- * Sets the IP block's OCP slave idlemode in hardware, and updates our
- * local copy. Intended to be used by drivers that have some erratum
- * that requires direct manipulation of the SIDLEMODE bits. Returns
- * -EINVAL if @oh is null, or passes along the return value from
- * _set_slave_idlemode().
- *
- * XXX Does this function have any current users? If not, we should
- * remove it; it is better to let the rest of the hwmod code handle this.
- * Any users of this function should be scrutinized carefully.
- */
-int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
-{
- u32 v;
- int retval = 0;
-
- if (!oh)
- return -EINVAL;
-
- v = oh-_sysc_cache;
-
- retval = _set_slave_idlemode(oh, idlemode, v);
- if (!retval)
- _write_sysconfig(v, oh);
-
- return retval;
-}
-
/**
- * omap_hwmod_register - register a struct omap_hwmod
+ * _register - register a struct omap_hwmod
* @oh: struct omap_hwmod *
*
* Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
@@ -1487,7 +1435,7 @@ int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh,
u8 idlemode)
* that the copy process would be relatively complex due to the large number
* of substructures.
*/
-int omap_hwmod_register(struct omap_hwmod *oh)
+static int _register(struct omap_hwmod *oh)
{
int ret, ms_id;
@@ -1525,6 +1473,57 @@ ohr_unlock:
return ret;
}
+
+/* Public functions */
+
+u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
+{
+ if (oh-flags HWMOD_16BIT_REG)
+ return __raw_readw(oh-_mpu_rt_va + reg_offs);
+ else
+ return __raw_readl(oh-_mpu_rt_va + reg_offs);
+}
+
+void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
+{
+ if (oh-flags HWMOD_16BIT_REG)
+ __raw_writew(v, oh-_mpu_rt_va + reg_offs);
+ else
+ __raw_writel(v, oh-_mpu_rt_va + reg_offs);
+}
+
+/**
+ * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
+ * @oh: struct omap_hwmod *
+ * @idlemode: SIDLEMODE field bits (shifted to bit 0)
+ *
+ * Sets the IP block's OCP slave idlemode in hardware, and updates our
+ * local copy. Intended to be used by drivers that have some erratum
+ * that requires direct manipulation of the SIDLEMODE bits. Returns
+ * -EINVAL if @oh is null, or passes along the return value from
+ * _set_slave_idlemode().
+ *
+ * XXX Does this function have any current users? If not, we should
+ * remove it; it is better to let the rest of the hwmod code handle this.
+ * Any users of this function should be scrutinized carefully.
+ */
+int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
+{
+ u32 v;
+ int retval = 0;
+
+ if (!oh)
+ return -EINVAL;
+
+ v = oh-_sysc_cache;
+
+ retval = _set_slave_idlemode(oh, idlemode, v);
+ if (!retval)
+ _write_sysconfig(v, oh);
+
+ return retval;
+}
+
/**
* omap_hwmod_lookup - look up a registered omap_hwmod by name
* @name: name of the omap_hwmod to look up
@@ -1604,8 +1603,8 @@ int omap_hwmod_init(struct omap_hwmod **ohs)
oh = *ohs;
while (oh) {
if (omap_chip_is(oh-omap_chip)) {
- r = omap_hwmod_register(oh);
- WARN(r, omap_hwmod: %s: omap_hwmod_register returned
+ r = _register(oh
[PATCH v2 2/6] OMAP2+: hwmod: Mark functions used only during initialization with __init
_register, _find_mpu_port_index and _find_mpu_rt_base are static APIs
that will be used only during the omap_hwmod initialization phase.
There is no need to keep them for runtime.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 298fc3b..1a0dd56 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -673,7 +673,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
* Returns the array index of the OCP slave port that the MPU
* addresses the device on, or -EINVAL upon error or not found.
*/
-static int _find_mpu_port_index(struct omap_hwmod *oh)
+static int __init _find_mpu_port_index(struct omap_hwmod *oh)
{
int i;
int found = 0;
@@ -707,7 +707,7 @@ static int _find_mpu_port_index(struct omap_hwmod *oh)
* Return the virtual address of the base of the register target of
* device @oh, or NULL on error.
*/
-static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
+static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
{
struct omap_hwmod_ocp_if *os;
struct omap_hwmod_addr_space *mem;
@@ -1435,7 +1435,7 @@ static int _setup(struct omap_hwmod *oh, void *data)
* that the copy process would be relatively complex due to the large number
* of substructures.
*/
-static int _register(struct omap_hwmod *oh)
+static int __init _register(struct omap_hwmod *oh)
{
int ret, ms_id;
@@ -1587,7 +1587,7 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh,
void *data),
* listed in @ohs that are valid for this chip. Returns -EINVAL if
* omap_hwmod_init() has already been called or 0 otherwise.
*/
-int omap_hwmod_init(struct omap_hwmod **ohs)
+int __init omap_hwmod_init(struct omap_hwmod **ohs)
{
struct omap_hwmod *oh;
int r;
--
1.7.0.4
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[PATCH v2 4/6] OMAP2+: hwmod: Disable clocks when hwmod enable fails
From: Rajendra Nayak rna...@ti.com
In cases where a module (hwmod) does not become accesible on enabling
the main clocks (can happen if there are external clocks needed
for the module to become accesible), make sure the clocks are not
left enabled.
This ensures that when the requisite external dependencies are met
a omap_hwmod_enable and omap_hwmod_idle/shutdown would rightly enable
and disable clocks using clk framework. Leaving the clocks enabled in
the error case causes additional usecounting at the clock framework
level leaving the clock enabled forever.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 91b011e..c576121 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1233,6 +1233,7 @@ static int _enable(struct omap_hwmod *oh)
_enable_sysc(oh);
}
} else {
+ _disable_clocks(oh);
pr_debug(omap_hwmod: %s: _wait_target_ready: %d\n,
oh-name, r);
}
--
1.7.0.4
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