Re: [PATCH V4 00/16] irqchip: crossbar: Driver fixes
Hi Tony, On Tuesday 01 July 2014 01:29 PM, Tony Lindgren wrote: * Jason Cooper ja...@lakedaemon.net [140630 12:30]: Whole series applied to irqchip/crossbar, I'll give it a day or two in -next, then I'll merge it into irqchip/core. Tony: Right now, it's immutable unless you tell me I applied something incorrectly. Once it goes into irqchip/core, it's immutable no matter what you say. ;-) Thanks, looks good to me. Sricharan and Nishant, can you please check that we can now apply the related .dts changes on top of Jason's branch at: git://git.infradead.org/users/jcooper/linux.git irqchip/crossbar I applied the dts patches on top of this and it worked fine for me on dra72 evm Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 08/16] irqchip: crossbar: Fix kerneldoc warning
From: Nishanth Menon n...@ti.com
Adding missing properties for kerneldoc (@write) and cleanup
of harmless warnings while we are here.
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
2 warnings
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index f7eda9f..cee556b 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -22,12 +22,14 @@
#define IRQ_SKIP -3
#define GIC_IRQ_START 32
-/*
+/**
+ * struct crossbar_device - crossbar device description
* @int_max: maximum number of supported interrupts
* @safe_map: safe default value to initialize the crossbar
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
+ * @write: register write function pointer
*/
struct crossbar_device {
uint int_max;
--
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[PATCH V4 04/16] irqchip: crossbar: Initialise the crossbar with a safe value
From: Nishanth Menon n...@ti.com
Since crossbar is s/w configurable, the initial settings of the
crossbar cannot be assumed to be sane. This implies that:
a) On initialization all un-reserved crossbars must be initialized to
a known 'safe' value.
b) When unmapping the interrupt, the safe value must be written to
ensure that the crossbar mapping matches with interrupt controller
usage.
So provide a safe value in the dt data to map if
'0' is not safe for the platform and use it during init and unmap
While at this, fix the below checkpatch warning.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |3 +++
drivers/irqchip/irq-crossbar.c | 19 +--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 0795765..5f45c78 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -22,6 +22,9 @@ Optional properties:
SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
crossbar. These irqs have a crossbar register, but still cannot be used.
+- ti,irqs-safe-map: integer which maps to a safe configuration to use
+ when the interrupt controller irq is unused (when not provided, default is 0)
+
Examples:
crossbar_mpu: @4a02 {
compatible = ti,irq-crossbar;
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 0533a71..4be30c0 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -23,16 +23,18 @@
/*
* @int_max: maximum number of supported interrupts
+ * @safe_map: safe default value to initialize the crossbar
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
*/
struct crossbar_device {
uint int_max;
+ uint safe_map;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
- void (*write) (int, int);
+ void (*write)(int, int);
};
static struct crossbar_device *cb;
@@ -88,8 +90,10 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START)
+ if (hw GIC_IRQ_START) {
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
+ cb-write(hw - GIC_IRQ_START, cb-safe_map);
+ }
}
static int crossbar_domain_xlate(struct irq_domain *d,
@@ -214,6 +218,17 @@ static int __init crossbar_of_init(struct device_node
*node)
reserved += size;
}
+ of_property_read_u32(node, ti,irqs-safe-map, cb-safe_map);
+
+ /* Initialize the crossbar with safe map to start with */
+ for (i = 0; i max; i++) {
+ if (cb-irq_map[i] == IRQ_RESERVED ||
+ cb-irq_map[i] == IRQ_SKIP)
+ continue;
+
+ cb-write(i, cb-safe_map);
+ }
+
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
--
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[PATCH V4 16/16] irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GIC
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 35356b6..51a85c3 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -44,8 +44,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped as
a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -53,3 +55,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+ device_y@0x4a033000 {
+ /* Direct mapped GIC SPI 1 used */
+ interrupts = GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 83f803b..85c2985 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -86,8 +86,13 @@ static inline int allocate_free_irq(int cb_no)
static inline bool needs_crossbar_write(irq_hw_number_t hw)
{
- if (hw GIC_IRQ_START)
- return true;
+ int cb_no;
+
+ if (hw GIC_IRQ_START) {
+ cb_no = cb-irq_map[hw - GIC_IRQ_START];
+ if (cb_no != IRQ_RESERVED cb_no != IRQ_SKIP)
+ return true;
+ }
return false;
}
@@ -130,8 +135,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
int ret;
int req_num = intspec[1];
+ int direct_map_num;
if (req_num = cb-max_crossbar_sources) {
+ direct_map_num = req_num - cb-max_crossbar_sources;
+ if (direct_map_num cb-int_max) {
+ ret = cb-irq_map[direct_map_num];
+ if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
+ /* We use the interrupt num as h/w irq num */
+ ret = direct_map_num;
+ goto found;
+ }
+ }
+
pr_err(%s: requested crossbar number %d max %d\n,
__func__, req_num, cb-max_crossbar_sources);
return -EINVAL;
--
1.7.9.5
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[PATCH V4 15/16] documentation: dt: omap: crossbar: Add description for interrupt consumer
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 6923531..35356b6 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -36,3 +36,20 @@ Examples:
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
ti,irqs-skip = 10 133 139 140;
};
+
+Consumer:
+
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
+Documentation/devicetree/bindings/arm/gic.txt for further details.
+
+An interrupt consumer on an SoC using crossbar will use:
+ interrupts = GIC_SPI request_number interrupt_level
+request number shall be between 0 to that described by
+ti,max-crossbar-sources
+
+Example:
+ device_x@0x4a023000 {
+ /* Crossbar 8 used */
+ interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
--
1.7.9.5
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[PATCH V4 14/16] irqchip: crossbar: Introduce centralized check for crossbar write
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c9f068c..83f803b 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -84,10 +84,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -106,7 +116,7 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START) {
+ if (needs_crossbar_write(hw)) {
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
cb-write(hw - GIC_IRQ_START, cb-safe_map);
}
--
1.7.9.5
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[PATCH V4 11/16] irqchip: crossbar: Set cb pointer to null in case of error
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R r.sricha...@ti.com Acked-by: Santosh Shilimkar santosh.shilim...@ti.com --- drivers/irqchip/irq-crossbar.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index afc35fd..a8c6156 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -250,6 +250,8 @@ err_base: iounmap(cb-crossbar_base); err_cb: kfree(cb); + + cb = NULL; return ret; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 05/16] irqchip: crossbar: Change allocation logic by reversing search for free irqs
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This makes the below bugs visible sooner.
class 1. address space errors - example:
reg = a size_b
ti,max-irqs = is a wrong parameter
class 2: irq-reserved list - which decides which entries in the
address space is not actually wired in
class 3: wrong list of routable-irqs.
In general allocating from max to min tends to have benefits in
ensuring the different issues that may be present in dts is easily
caught at definition time, rather than at a later point in time.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 4be30c0..a39cb31 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -58,7 +58,7 @@ static inline int get_prev_map_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++)
+ for (i = cb-int_max - 1; i = 0; i--)
if (cb-irq_map[i] == cb_no)
return i;
@@ -69,7 +69,7 @@ static inline int allocate_free_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++) {
+ for (i = cb-int_max - 1; i = 0; i--) {
if (cb-irq_map[i] == IRQ_FREE) {
cb-irq_map[i] = cb_no;
return i;
--
1.7.9.5
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[PATCH V4 07/16] irqchip: crossbar: Fix sparse and checkpatch warnings
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Also fix a couple of checkpatch warnings.
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it be static?
drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was
not declared. Should it be static?
Checkpatch warnings:
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 88fbe0f..f7eda9f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -15,6 +15,7 @@
#include linux/of_irq.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
@@ -118,7 +119,7 @@ found:
return 0;
}
-const struct irq_domain_ops routable_irq_domain_ops = {
+static const struct irq_domain_ops routable_irq_domain_ops = {
.map = crossbar_domain_map,
.unmap = crossbar_domain_unmap,
.xlate = crossbar_domain_xlate
@@ -139,7 +140,7 @@ static int __init crossbar_of_init(struct device_node *node)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
- cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -184,7 +185,7 @@ static int __init crossbar_of_init(struct device_node *node)
}
- cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
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[PATCH V4 09/16] irqchip: crossbar: Return proper error value
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors.
There can be other causes of failure like invalid data from
DT. So return a appropriate error value for that case.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index cee556b..10d723d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -129,19 +129,25 @@ static const struct irq_domain_ops
routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node)
{
- int i, size, max, reserved = 0, entry;
+ int i, size, max = 0, reserved = 0, entry;
const __be32 *irqsr;
+ int ret = -ENOMEM;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
if (!cb)
- return -ENOMEM;
+ return ret;
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
+ if (!max) {
+ pr_err(missing 'ti,max-irqs' property\n);
+ ret = -EINVAL;
+ goto err2;
+ }
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -162,6 +168,7 @@ static int __init crossbar_of_init(struct device_node *node)
i, entry);
if (entry max) {
pr_err(Invalid reserved entry\n);
+ ret = -EINVAL;
goto err3;
}
cb-irq_map[entry] = IRQ_RESERVED;
@@ -205,6 +212,7 @@ static int __init crossbar_of_init(struct device_node *node)
break;
default:
pr_err(Invalid reg-size property\n);
+ ret = -EINVAL;
goto err4;
break;
}
@@ -243,7 +251,7 @@ err2:
iounmap(cb-crossbar_base);
err1:
kfree(cb);
- return -ENOMEM;
+ return ret;
}
static const struct of_device_id crossbar_match[] __initconst = {
--
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[PATCH V4 10/16] irqchip: crossbar: Change the goto naming
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 10d723d..afc35fd 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -140,17 +140,17 @@ static int __init crossbar_of_init(struct device_node
*node)
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
- goto err1;
+ goto err_cb;
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
ret = -EINVAL;
- goto err2;
+ goto err_base;
}
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
- goto err2;
+ goto err_base;
cb-int_max = max;
@@ -169,7 +169,7 @@ static int __init crossbar_of_init(struct device_node *node)
if (entry max) {
pr_err(Invalid reserved entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_RESERVED;
}
@@ -187,7 +187,7 @@ static int __init crossbar_of_init(struct device_node *node)
if (entry max) {
pr_err(Invalid skip entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_SKIP;
}
@@ -196,7 +196,7 @@ static int __init crossbar_of_init(struct device_node *node)
cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
- goto err3;
+ goto err_irq_map;
of_property_read_u32(node, ti,reg-size, size);
@@ -213,7 +213,7 @@ static int __init crossbar_of_init(struct device_node *node)
default:
pr_err(Invalid reg-size property\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
break;
}
@@ -230,7 +230,6 @@ static int __init crossbar_of_init(struct device_node *node)
}
of_property_read_u32(node, ti,irqs-safe-map, cb-safe_map);
-
/* Initialize the crossbar with safe map to start with */
for (i = 0; i max; i++) {
if (cb-irq_map[i] == IRQ_RESERVED ||
@@ -243,13 +242,13 @@ static int __init crossbar_of_init(struct device_node
*node)
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
-err4:
+err_reg_offset:
kfree(cb-register_offsets);
-err3:
+err_irq_map:
kfree(cb-irq_map);
-err2:
+err_base:
iounmap(cb-crossbar_base);
-err1:
+err_cb:
kfree(cb);
return ret;
}
--
1.7.9.5
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[PATCH V4 13/16] irqchip: crossbar: Introduce ti,max-crossbar-sources to identify valid crossbar mapping
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 5f45c78..6923531 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -30,6 +31,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ ti,max-crossbar-sources = MAX_SOURCES;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
ti,irqs-skip = 10 133 139 140;
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 518d712..c9f068c 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
* struct crossbar_device - crossbar device description
* @int_max: maximum number of supported interrupts
* @safe_map: safe default value to initialize the crossbar
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -34,6 +35,7 @@
struct crossbar_device {
uint int_max;
uint safe_map;
+ uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -117,12 +119,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+ int req_num = intspec[1];
- ret = get_prev_map_irq(intspec[1]);
+ if (req_num = cb-max_crossbar_sources) {
+ pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+ return -EINVAL;
+ }
+
+ ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
- ret = allocate_free_irq(intspec[1]);
+ ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -153,6 +162,14 @@ static int __init crossbar_of_init(struct device_node
*node)
if (!cb-crossbar_base)
goto err_cb;
+ of_property_read_u32(node, ti,max-crossbar-sources,
+cb-max_crossbar_sources);
+ if (!cb-max_crossbar_sources) {
+ pr_err(missing 'ti,max-crossbar-sources' property\n);
+ ret = -EINVAL;
+ goto err_base;
+ }
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
--
1.7.9.5
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[PATCH V4 12/16] irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
Adding kerneldoc for unmap callback function.
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index a8c6156..518d712 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -89,6 +89,17 @@ static int crossbar_domain_map(struct irq_domain *d,
unsigned int irq,
return 0;
}
+/**
+ * crossbar_domain_unmap - unmap a crossbar-irq connection
+ * @d: domain of irq to unmap
+ * @irq: virq number
+ *
+ * We do not maintain a use count of total number of map/unmap
+ * calls for a particular irq to find out if a irq can be really
+ * unmapped. This is because unmap is called during irq_dispose_mapping(irq),
+ * after which irq is anyways unusable. So an explicit map has to be called
+ * after that.
+ */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
--
1.7.9.5
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[PATCH V4 01/16] irqchip: crossbar: Dont use '0' to mark reserved interrupts
From: Nishanth Menon n...@ti.com
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 3d15d16..20105bc 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -17,6 +17,7 @@
#include linux/irqchip/arm-gic.h
#define IRQ_FREE -1
+#define IRQ_RESERVED -2
#define GIC_IRQ_START 32
/*
@@ -139,7 +140,7 @@ static int __init crossbar_of_init(struct device_node *node)
pr_err(Invalid reserved entry\n);
goto err3;
}
- cb-irq_map[entry] = 0;
+ cb-irq_map[entry] = IRQ_RESERVED;
}
}
@@ -170,7 +171,7 @@ static int __init crossbar_of_init(struct device_node *node)
* reserved irqs. so find and store the offsets once.
*/
for (i = 0; i max; i++) {
- if (!cb-irq_map[i])
+ if (cb-irq_map[i] == IRQ_RESERVED)
continue;
cb-register_offsets[i] = reserved;
--
1.7.9.5
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[PATCH V4 00/16] irqchip: crossbar: Driver fixes
This series does some cleanups, fixes for handling two interrupts getting mapped twice to same crossbar and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on 3.16 rc2 mainline. All the patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates The fixes series[1] earlier posted is merged in to this. [1] http://www.spinics.net/lists/arm-kernel/msg328273.html [V2] Merged the above series and rebased on 3.15 mainline [V3] Modified patch#3 to get irqs-skip properties from DT, merged path#8 for checkpatch warning to other relevant patches and fixed comments for other patches. [V4] Based on 3.16rc2 and fixed Jason's ja...@lakedaemon.net comments. Nishanth Menon (14): irqchip: crossbar: Dont use '0' to mark reserved interrupts irqchip: crossbar: Check for premapped crossbar before allocating irqchip: crossbar: Introduce ti,irqs-skip to skip irqs that bypass crossbar irqchip: crossbar: Initialise the crossbar with a safe value irqchip: crossbar: Change allocation logic by reversing search for free irqs irqchip: crossbar: Remove IS_ERR_VALUE check irqchip: crossbar: Fix sparse and checkpatch warnings irqchip: crossbar: Fix kerneldoc warning irqchip: crossbar: Return proper error value irqchip: crossbar: Change the goto naming irqchip: crossbar: Introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: Introduce centralized check for crossbar write documentation: dt: omap: crossbar: Add description for interrupt consumer irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GIC Sricharan R (2): irqchip: crossbar: Set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 36 + drivers/irqchip/irq-crossbar.c | 168 +--- 2 files changed, 179 insertions(+), 25 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 03/16] irqchip: crossbar: Introduce ti,irqs-skip to skip irqs that bypass crossbar
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |6 ++
drivers/irqchip/irq-crossbar.c | 20
2 files changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..0795765 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -17,6 +17,11 @@ Required properties:
so crossbar bar driver should not consider them as free
lines.
+Optional properties:
+- ti,irqs-skip: This is similar to ti,irqs-reserved, but these are for
+ SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
+ crossbar. These irqs have a crossbar register, but still cannot be used.
+
Examples:
crossbar_mpu: @4a02 {
compatible = ti,irq-crossbar;
@@ -24,4 +29,5 @@ Examples:
ti,max-irqs = 160;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
+ ti,irqs-skip = 10 133 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 51d4b87..0533a71 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -18,6 +18,7 @@
#define IRQ_FREE -1
#define IRQ_RESERVED -2
+#define IRQ_SKIP -3
#define GIC_IRQ_START 32
/*
@@ -160,6 +161,25 @@ static int __init crossbar_of_init(struct device_node
*node)
}
}
+ /* Skip irqs hardwired to bypass the crossbar */
+ irqsr = of_get_property(node, ti,irqs-skip, size);
+ if (irqsr) {
+ size /= sizeof(__be32);
+
+ for (i = 0; i size; i++) {
+ of_property_read_u32_index(node,
+ ti,irqs-skip,
+ i, entry);
+ if (entry max) {
+ pr_err(Invalid skip entry\n);
+ ret = -EINVAL;
+ goto err3;
+ }
+ cb-irq_map[entry] = IRQ_SKIP;
+ }
+ }
+
+
cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
1.7.9.5
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[PATCH V4 02/16] irqchip: crossbar: Check for premapped crossbar before allocating
From: Nishanth Menon n...@ti.com
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two
different GIC interrupts. This is completely undesirable. Instead, check
if the requested crossbar event is pre-allocated and provide that GIC
mapping back to caller if already allocated.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -51,6 +51,17 @@ static inline void crossbar_writeb(int irq_no, int cb_no)
writeb(cb_no, cb-crossbar_base + cb-register_offsets[irq_no]);
}
+static inline int get_prev_map_irq(int cb_no)
+{
+ int i;
+
+ for (i = 0; i cb-int_max; i++)
+ if (cb-irq_map[i] == cb_no)
+ return i;
+
+ return -ENODEV;
+}
+
static inline int allocate_free_irq(int cb_no)
{
int i;
@@ -88,11 +99,16 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
unsigned long ret;
+ ret = get_prev_map_irq(intspec[1]);
+ if (!IS_ERR_VALUE(ret))
+ goto found;
+
ret = allocate_free_irq(intspec[1]);
if (IS_ERR_VALUE(ret))
return ret;
+found:
*out_hwirq = ret + GIC_IRQ_START;
return 0;
}
--
1.7.9.5
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[PATCH V4 06/16] irqchip: crossbar: Remove IS_ERR_VALUE check
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index a39cb31..88fbe0f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -102,15 +102,15 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- unsigned long ret;
+ int ret;
ret = get_prev_map_irq(intspec[1]);
- if (!IS_ERR_VALUE(ret))
+ if (ret = 0)
goto found;
ret = allocate_free_irq(intspec[1]);
- if (IS_ERR_VALUE(ret))
+ if (ret 0)
return ret;
found:
--
1.7.9.5
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[PATCH V4 0/2] arm: dts: dra7: add crossbar dt support
This series introduces DT support for crossbar device and changes dra7 peripherals to use crossbar number instead of irq. This depends on below driver fixes and cleanup series. http://marc.info/?l=linux-omapm=140376708127157w=2 [V2] Rebased on 3.15 mainline. [V3] Added ti,irqs-skip property and ti,irqs-safe-map property to crossbar dt node. [V4] Introduced macros MAX_SOURCES and DIRECT_IRQ R Sricharan (2): arm: dts: dra7: add routable-irqs property for gic node arm: dts: dra7: add crossbar device binding arch/arm/boot/dts/dra7.dtsi | 139 +-- 1 file changed, 81 insertions(+), 58 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 2/2] arm: dts: dra7: add crossbar device binding
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Benoit Cousson bcous...@baylibre.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
arch/arm/boot/dts/dra7.dtsi | 138 +--
1 file changed, 80 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1cf4ee1..961be6b 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -12,6 +12,9 @@
#include skeleton.dtsi
+#define MAX_SOURCES 400
+#define DIRECT_IRQ(irq) (MAX_SOURCES + irq)
+
/ {
#address-cells = 1;
#size-cells = 1;
@@ -80,8 +83,8 @@
ti,hwmods = l3_main_1, l3_main_2;
reg = 0x4400 0x100,
0x4500 0x1000;
- interrupts = GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI DIRECT_IRQ(10) IRQ_TYPE_LEVEL_HIGH;
prm: prm@4ae06000 {
compatible = ti,dra7-prm;
@@ -156,10 +159,10 @@
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
- interrupts = GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
#dma-cells = 1;
#dma-channels = 32;
#dma-requests = 127;
@@ -168,7 +171,7 @@
gpio1: gpio@4ae1 {
compatible = ti,omap4-gpio;
reg = 0x4ae1 0x200;
- interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio1;
gpio-controller;
#gpio-cells = 2;
@@ -179,7 +182,7 @@
gpio2: gpio@48055000 {
compatible = ti,omap4-gpio;
reg = 0x48055000 0x200;
- interrupts = GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio2;
gpio-controller;
#gpio-cells = 2;
@@ -190,7 +193,7 @@
gpio3: gpio@48057000 {
compatible = ti,omap4-gpio;
reg = 0x48057000 0x200;
- interrupts = GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio3;
gpio-controller;
#gpio-cells = 2;
@@ -201,7 +204,7 @@
gpio4: gpio@48059000 {
compatible = ti,omap4-gpio;
reg = 0x48059000 0x200;
- interrupts = GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio4;
gpio-controller;
#gpio-cells = 2;
@@ -212,7 +215,7 @@
gpio5: gpio@4805b000 {
compatible = ti,omap4-gpio;
reg = 0x4805b000 0x200;
- interrupts = GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio5;
gpio-controller;
#gpio-cells = 2;
@@ -223,7 +226,7 @@
gpio6: gpio@4805d000 {
compatible = ti,omap4-gpio;
reg = 0x4805d000 0x200;
- interrupts = GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH;
+ interrupts
[PATCH V4 1/2] arm: dts: dra7: add routable-irqs property for gic node
From: R Sricharan r.sricha...@ti.com There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Cc: Benoit Cousson bcous...@baylibre.com Cc: Santosh Shilimkar santosh.shilim...@ti.com Cc: Rajendra Nayak rna...@ti.com Cc: Tony Lindgren t...@atomide.com --- arch/arm/boot/dts/dra7.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e..1cf4ee1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -45,6 +45,7 @@ compatible = arm,cortex-a15-gic; interrupt-controller; #interrupt-cells = 3; + arm,routable-irqs = 192; reg = 0x48211000 0x1000, 0x48212000 0x1000, 0x48214000 0x2000, -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V4 2/2] arm: dts: dra7: add crossbar device binding
Hi Tony, On Thursday 26 June 2014 01:14 PM, Tony Lindgren wrote: * Sricharan R r.sricha...@ti.com [140626 00:29]: From: R Sricharan r.sricha...@ti.com There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Here, adding a new crossbar device node and replacing all the peripheral interrupt numbers with its fixed crossbar input lines. I think these two patches need to be a single patch to avoid breaking booting for git bisect inbetween these patches? This does not cause booting issues. irq_desc gets allocated linearly, but that does not create boot issues. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 03/16] irqchip: crossbar: introduce ti,irqs-skip to skip
On Saturday 21 June 2014 08:03 AM, Jason Cooper wrote:
Sricharan,
Your subject line seems truncated:
irqchip: crossbar: introduce ti,irqs-skip to skip
maybe ... Introduce DT property to skip hardwired irqs ?
Also note that you need to correct the subject line for *every* patch in
the series wrt capitalization.
I don't mind correcting it when I apply it, provided that:
ha, i think this got truncated unintentionally. Sorry will fix this.
- the patch is otherwise ready
- I only have to do it once or twice for the series
- I never had a chance to ask since you created a rockstar patch series
the first time out of the gate (except for capitalization).
Once I've looked over the whole series, please resend with the subject
lines corrected.
Ok. I will look for your comments on the rest of the patches and
resend with capitalization fix said above.
On Mon, Jun 16, 2014 at 04:53:03PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] introduced ti,irqs-skip dt property to list the
irqs to be skipped.
.../devicetree/bindings/arm/omap/crossbar.txt |4
drivers/irqchip/irq-crossbar.c | 20
2 files changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..cfcbd52 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -17,6 +17,10 @@ Required properties:
so crossbar bar driver should not consider them as free
lines.
+Optional properties:
+- ti,irqs-skip: This is similar to ti,irqs-reserved, but are irq mappings
+ which are not supposed to be used for errata or other
reasons(virtualization).
I would specifically mention SoC-specific hard-wiring of irqs here.
Also the fact that the hardwiring unexpectedly bypasses the crossbar.
ok, that will be more easily understandable and will add that.
+
Examples:
crossbar_mpu: @4a02 {
compatible = ti,irq-crossbar;
Please include a ti,irqs-skip example here.
ok.
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 51d4b87..27049de 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -18,6 +18,7 @@
#define IRQ_FREE-1
#define IRQ_RESERVED-2
+#define IRQ_SKIP-3
#define GIC_IRQ_START 32
/*
@@ -160,6 +161,25 @@ static int __init crossbar_of_init(struct device_node
*node)
}
}
+/* Skip the ones marked as skip */
This comment is redundant, perhaps Skip irqs hardwired to bypass the
crossbar.?
ok, will change this.
Regards,
Sricharan
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Re: [PATCH V3 16/16] irqchip: crossbar: allow for quirky hardware with direct hardwiring of GIC
Hi Jason,
On Saturday 21 June 2014 08:27 AM, Jason Cooper wrote:
On Mon, Jun 16, 2014 at 04:53:16PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20
++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 8210ea4..438ccab 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -42,8 +42,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped
as a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -51,3 +53,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+device_y@0x4a033000 {
+/* Direct mapped GIC SPI 1 used */
+interrupts = GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH;
Ideally, I'd like to see a macro here so that it's clear that we crossed
a magic threshold. eg:
#define MAX_SOURCES 400
#define DIRECT_IRQ(irq) (MAX_SOURCES + irq)
...
interrupts = GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH;
and, then:
ti,max-crossbar-sources = MAX_SOURCES;
Ok, thats more good for readability. Will add that macro then.
Regards,
Sricharan
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Re: [PATCH V3 00/16] irqchip: crossbar: driver fixes
On Monday 16 June 2014 07:34 PM, Santosh Shilimkar wrote: Sricharan, On Monday 16 June 2014 07:23 AM, Sricharan R wrote: This series does some cleanups, fixes for handling two interrupts getting mapped twice to same crossbar and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on 3.15 mainline. All the patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates The fixes series[1] earlier posted is merged in to this. [1] http://www.spinics.net/lists/arm-kernel/msg328273.html [V2] Merged the above series and rebased on 3.15 mainline [V3] Modified patch#3 to get irqs-skip properties from DT, merged path#8 for checkpatch warning to other relevant patches and fixed comments for other patches. I scanned entire series again including your updates on Jason's comments. All look good to my eyes. Hopefully after this series now, we can actually enable the crossbar support on those machines. FWIW, Acked-by: Santosh Shilimkar santosh.shilim...@ti.com Thanks Santosh. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 00/16] irqchip: crossbar: driver fixes
This series does some cleanups, fixes for handling two interrupts getting mapped twice to same crossbar and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on 3.15 mainline. All the patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates The fixes series[1] earlier posted is merged in to this. [1] http://www.spinics.net/lists/arm-kernel/msg328273.html [V2] Merged the above series and rebased on 3.15 mainline [V3] Modified patch#3 to get irqs-skip properties from DT, merged path#8 for checkpatch warning to other relevant patches and fixed comments for other patches. Nishanth Menon (14): irqchip: crossbar: dont use '0' to mark reserved interrupts irqchip: crossbar: check for premapped crossbar before allocating irqchip: crossbar: introduce ti,irqs-skip to skip irqchip: crossbar: initialise the crossbar with a safe value irqchip: crossbar: change allocation logic by reversing search for free irqs irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse and checkpatch warnings irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write documentation: dt: omap: crossbar: add description for interrupt consumer irqchip: crossbar: allow for quirky hardware with direct hardwiring of GIC Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 34 drivers/irqchip/irq-crossbar.c | 168 +--- 2 files changed, 177 insertions(+), 25 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 15/16] documentation: dt: omap: crossbar: add description for interrupt consumer
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 41aef44..8210ea4 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -34,3 +34,20 @@ Examples:
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
+
+Consumer:
+
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
+Documentation/devicetree/bindings/arm/gic.txt for further details.
+
+An interrupt consumer on an SoC using crossbar will use:
+ interrupts = GIC_SPI request_number interrupt_level
+request number shall be between 0 to that described by
+ti,max-crossbar-sources
+
+Example:
+ device_x@0x4a023000 {
+ /* Crossbar 8 used */
+ interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
--
1.7.9.5
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[PATCH V3 16/16] irqchip: crossbar: allow for quirky hardware with direct hardwiring of GIC
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 8210ea4..438ccab 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -42,8 +42,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped as
a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -51,3 +53,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+ device_y@0x4a033000 {
+ /* Direct mapped GIC SPI 1 used */
+ interrupts = GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index ef613c4..fff6218 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -86,8 +86,13 @@ static inline int allocate_free_irq(int cb_no)
static inline bool needs_crossbar_write(irq_hw_number_t hw)
{
- if (hw GIC_IRQ_START)
- return true;
+ int cb_no;
+
+ if (hw GIC_IRQ_START) {
+ cb_no = cb-irq_map[hw - GIC_IRQ_START];
+ if (cb_no != IRQ_RESERVED cb_no != IRQ_SKIP)
+ return true;
+ }
return false;
}
@@ -130,8 +135,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
int ret;
int req_num = intspec[1];
+ int direct_map_num;
if (req_num = cb-max_crossbar_sources) {
+ direct_map_num = req_num - cb-max_crossbar_sources;
+ if (direct_map_num cb-int_max) {
+ ret = cb-irq_map[direct_map_num];
+ if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
+ /* We use the interrupt num as h/w irq num */
+ ret = direct_map_num;
+ goto found;
+ }
+ }
+
pr_err(%s: requested crossbar number %d max %d\n,
__func__, req_num, cb-max_crossbar_sources);
return -EINVAL;
--
1.7.9.5
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[PATCH V3 11/16] irqchip: crossbar: set cb pointer to null in case of error
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R r.sricha...@ti.com --- drivers/irqchip/irq-crossbar.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index 5bd7f3d..9b4c0f1 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -250,6 +250,8 @@ err_base: iounmap(cb-crossbar_base); err_cb: kfree(cb); + + cb = NULL; return ret; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 13/16] irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index e54d1fb..41aef44 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -29,6 +30,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ ti,max-crossbar-sources = 400;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index df16ef8..c46e14b 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
* struct crossbar_device - crossbar device description
* @int_max: maximum number of supported interrupts
* @safe_map: safe default value to initialize the crossbar
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -34,6 +35,7 @@
struct crossbar_device {
uint int_max;
uint safe_map;
+ uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -117,12 +119,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+ int req_num = intspec[1];
- ret = get_prev_map_irq(intspec[1]);
+ if (req_num = cb-max_crossbar_sources) {
+ pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+ return -EINVAL;
+ }
+
+ ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
- ret = allocate_free_irq(intspec[1]);
+ ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -153,6 +162,14 @@ static int __init crossbar_of_init(struct device_node
*node)
if (!cb-crossbar_base)
goto err_cb;
+ of_property_read_u32(node, ti,max-crossbar-sources,
+cb-max_crossbar_sources);
+ if (!cb-max_crossbar_sources) {
+ pr_err(missing 'ti,max-crossbar-sources' property\n);
+ ret = -EINVAL;
+ goto err_base;
+ }
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
--
1.7.9.5
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[PATCH V3 14/16] irqchip: crossbar: introduce centralized check for crossbar write
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c46e14b..ef613c4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -84,10 +84,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -106,7 +116,7 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START) {
+ if (needs_crossbar_write(hw)) {
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
cb-write(hw - GIC_IRQ_START, cb-safe_map);
}
--
1.7.9.5
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[PATCH V3 09/16] irqchip: crossbar: return proper error value
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors.
There can be other causes of failure like invalid data from
DT. So return a appropriate error value for that case.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Changed commit log
drivers/irqchip/irq-crossbar.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 6eee61b..5bcedc0 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -129,19 +129,25 @@ static const struct irq_domain_ops
routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node)
{
- int i, size, max, reserved = 0, entry;
+ int i, size, max = 0, reserved = 0, entry;
const __be32 *irqsr;
+ int ret = -ENOMEM;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
if (!cb)
- return -ENOMEM;
+ return ret;
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
+ if (!max) {
+ pr_err(missing 'ti,max-irqs' property\n);
+ ret = -EINVAL;
+ goto err2;
+ }
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -162,6 +168,7 @@ static int __init crossbar_of_init(struct device_node *node)
i, entry);
if (entry max) {
pr_err(Invalid reserved entry\n);
+ ret = -EINVAL;
goto err3;
}
cb-irq_map[entry] = IRQ_RESERVED;
@@ -205,6 +212,7 @@ static int __init crossbar_of_init(struct device_node *node)
break;
default:
pr_err(Invalid reg-size property\n);
+ ret = -EINVAL;
goto err4;
break;
}
@@ -243,7 +251,7 @@ err2:
iounmap(cb-crossbar_base);
err1:
kfree(cb);
- return -ENOMEM;
+ return ret;
}
static const struct of_device_id crossbar_match[] __initconst = {
--
1.7.9.5
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[PATCH V3 12/16] irqchip: crossbar: add kerneldoc for crossbar_domain_unmap callback
Adding kerneldoc for unmap callback function.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Reworded the kerneldoc
drivers/irqchip/irq-crossbar.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 9b4c0f1..df16ef8 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -89,6 +89,17 @@ static int crossbar_domain_map(struct irq_domain *d,
unsigned int irq,
return 0;
}
+/**
+ * crossbar_domain_unmap - unmap a crossbar-irq connection
+ * @d: domain of irq to unmap
+ * @irq: virq number
+ *
+ * We do not maintain a use count of total number of map/unmap
+ * calls for a particular irq to find out if a irq can be really
+ * unmapped. This is because unmap is called during irq_dispose_mapping(irq),
+ * after which irq is anyways unusable. So an explicit map has to be called
+ * after that.
+ */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
--
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[PATCH V3 08/16] irqchip: crossbar: fix kerneldoc warning
From: Nishanth Menon n...@ti.com
Adding missing properties for kerneldoc (@write) and cleanup
of harmless warnings while we are here.
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
2 warnings
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Reworded the commit log
drivers/irqchip/irq-crossbar.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 2d7fbdb..6eee61b 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -22,12 +22,14 @@
#define IRQ_SKIP -3
#define GIC_IRQ_START 32
-/*
+/**
+ * struct crossbar_device - crossbar device description
* @int_max: maximum number of supported interrupts
* @safe_map: safe default value to initialize the crossbar
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
+ * @write: register write function pointer
*/
struct crossbar_device {
uint int_max;
--
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[PATCH V3 07/16] irqchip: crossbar: fix sparse and checkpatch warnings
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Also fix a couple of checkpatch warnings.
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it be static?
drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was
not declared. Should it be static?
Checkpatch warnings:
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Added checkpatch fixes as well to this.
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 42ea49d..2d7fbdb 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -15,6 +15,7 @@
#include linux/of_irq.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
@@ -118,7 +119,7 @@ found:
return 0;
}
-const struct irq_domain_ops routable_irq_domain_ops = {
+static const struct irq_domain_ops routable_irq_domain_ops = {
.map = crossbar_domain_map,
.unmap = crossbar_domain_unmap,
.xlate = crossbar_domain_xlate
@@ -139,7 +140,7 @@ static int __init crossbar_of_init(struct device_node *node)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
- cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -184,7 +185,7 @@ static int __init crossbar_of_init(struct device_node *node)
}
- cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
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[PATCH V3 06/16] irqchip: crossbar: remove IS_ERR_VALUE check
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 9528cf2..42ea49d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -102,15 +102,15 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- unsigned long ret;
+ int ret;
ret = get_prev_map_irq(intspec[1]);
- if (!IS_ERR_VALUE(ret))
+ if (ret = 0)
goto found;
ret = allocate_free_irq(intspec[1]);
- if (IS_ERR_VALUE(ret))
+ if (ret 0)
return ret;
found:
--
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[PATCH V3 10/16] irqchip: crossbar: change the goto naming
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5bcedc0..5bd7f3d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -140,17 +140,17 @@ static int __init crossbar_of_init(struct device_node
*node)
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
- goto err1;
+ goto err_cb;
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
ret = -EINVAL;
- goto err2;
+ goto err_base;
}
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
- goto err2;
+ goto err_base;
cb-int_max = max;
@@ -169,7 +169,7 @@ static int __init crossbar_of_init(struct device_node *node)
if (entry max) {
pr_err(Invalid reserved entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_RESERVED;
}
@@ -187,7 +187,7 @@ static int __init crossbar_of_init(struct device_node *node)
if (entry max) {
pr_err(Invalid skip entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_SKIP;
}
@@ -196,7 +196,7 @@ static int __init crossbar_of_init(struct device_node *node)
cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
- goto err3;
+ goto err_irq_map;
of_property_read_u32(node, ti,reg-size, size);
@@ -213,7 +213,7 @@ static int __init crossbar_of_init(struct device_node *node)
default:
pr_err(Invalid reg-size property\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
break;
}
@@ -230,7 +230,6 @@ static int __init crossbar_of_init(struct device_node *node)
}
of_property_read_u32(node, ti,irqs-safe-map, cb-safe_map);
-
/* Initialize the crossbar with safe map to start with */
for (i = 0; i max; i++) {
if (cb-irq_map[i] == IRQ_RESERVED ||
@@ -243,13 +242,13 @@ static int __init crossbar_of_init(struct device_node
*node)
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
-err4:
+err_reg_offset:
kfree(cb-register_offsets);
-err3:
+err_irq_map:
kfree(cb-irq_map);
-err2:
+err_base:
iounmap(cb-crossbar_base);
-err1:
+err_cb:
kfree(cb);
return ret;
}
--
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[PATCH V3 05/16] irqchip: crossbar: change allocation logic by reversing search for free irqs
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This makes the below bugs visible sooner.
class 1. address space errors - example:
reg = a size_b
ti,max-irqs = is a wrong parameter
class 2: irq-reserved list - which decides which entries in the
address space is not actually wired in
class 3: wrong list of routable-irqs.
In general allocating from max to min tends to have benefits in
ensuring the different issues that may be present in dts is easily
caught at definition time, rather than at a later point in time.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] Added more description to commit log.
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index d1f67f6..9528cf2 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -58,7 +58,7 @@ static inline int get_prev_map_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++)
+ for (i = cb-int_max - 1; i = 0; i--)
if (cb-irq_map[i] == cb_no)
return i;
@@ -69,7 +69,7 @@ static inline int allocate_free_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++) {
+ for (i = cb-int_max - 1; i = 0; i--) {
if (cb-irq_map[i] == IRQ_FREE) {
cb-irq_map[i] = cb_no;
return i;
--
1.7.9.5
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[PATCH V3 04/16] irqchip: crossbar: initialise the crossbar with a safe value
From: Nishanth Menon n...@ti.com
Since crossbar is s/w configurable, the initial settings of the
crossbar cannot be assumed to be sane. This implies that:
a) On initialization all un-reserved crossbars must be initialized to
a known 'safe' value.
b) When unmapping the interrupt, the safe value must be written to
ensure that the crossbar mapping matches with interrupt controller
usage.
So provide a safe value in the dt data to map if
'0' is not safe for the platform and use it during init and unmap
While at this, fix the below checkpatch warning.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] introduced ti,irqs-safe-map which defines a safe value
to initialize the crossbar.
.../devicetree/bindings/arm/omap/crossbar.txt |3 +++
drivers/irqchip/irq-crossbar.c | 19 +--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index cfcbd52..e54d1fb 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -21,6 +21,9 @@ Optional properties:
- ti,irqs-skip: This is similar to ti,irqs-reserved, but are irq mappings
which are not supposed to be used for errata or other
reasons(virtualization).
+- ti,irqs-safe-map: integer which maps to a safe configuration to use
+ when the interrupt controller irq is unused (when not provided, default is 0)
+
Examples:
crossbar_mpu: @4a02 {
compatible = ti,irq-crossbar;
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 27049de..d1f67f6 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -23,16 +23,18 @@
/*
* @int_max: maximum number of supported interrupts
+ * @safe_map: safe default value to initialize the crossbar
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
*/
struct crossbar_device {
uint int_max;
+ uint safe_map;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
- void (*write) (int, int);
+ void (*write)(int, int);
};
static struct crossbar_device *cb;
@@ -88,8 +90,10 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START)
+ if (hw GIC_IRQ_START) {
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
+ cb-write(hw - GIC_IRQ_START, cb-safe_map);
+ }
}
static int crossbar_domain_xlate(struct irq_domain *d,
@@ -214,6 +218,17 @@ static int __init crossbar_of_init(struct device_node
*node)
reserved += size;
}
+ of_property_read_u32(node, ti,irqs-safe-map, cb-safe_map);
+
+ /* Initialize the crossbar with safe map to start with */
+ for (i = 0; i max; i++) {
+ if (cb-irq_map[i] == IRQ_RESERVED ||
+ cb-irq_map[i] == IRQ_SKIP)
+ continue;
+
+ cb-write(i, cb-safe_map);
+ }
+
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
--
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[PATCH V3 03/16] irqchip: crossbar: introduce ti,irqs-skip to skip
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V3] introduced ti,irqs-skip dt property to list the
irqs to be skipped.
.../devicetree/bindings/arm/omap/crossbar.txt |4
drivers/irqchip/irq-crossbar.c | 20
2 files changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..cfcbd52 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -17,6 +17,10 @@ Required properties:
so crossbar bar driver should not consider them as free
lines.
+Optional properties:
+- ti,irqs-skip: This is similar to ti,irqs-reserved, but are irq mappings
+ which are not supposed to be used for errata or other
reasons(virtualization).
+
Examples:
crossbar_mpu: @4a02 {
compatible = ti,irq-crossbar;
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 51d4b87..27049de 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -18,6 +18,7 @@
#define IRQ_FREE -1
#define IRQ_RESERVED -2
+#define IRQ_SKIP -3
#define GIC_IRQ_START 32
/*
@@ -160,6 +161,25 @@ static int __init crossbar_of_init(struct device_node
*node)
}
}
+ /* Skip the ones marked as skip */
+ irqsr = of_get_property(node, ti,irqs-skip, size);
+ if (irqsr) {
+ size /= sizeof(__be32);
+
+ for (i = 0; i size; i++) {
+ of_property_read_u32_index(node,
+ ti,irqs-skip,
+ i, entry);
+ if (entry max) {
+ pr_err(Invalid skip entry\n);
+ ret = -EINVAL;
+ goto err3;
+ }
+ cb-irq_map[entry] = IRQ_SKIP;
+ }
+ }
+
+
cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
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[PATCH V3 02/16] irqchip: crossbar: check for premapped crossbar before allocating
From: Nishanth Menon n...@ti.com
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two
different GIC interrupts. This is completely undesirable. Instead, check
if the requested crossbar event is pre-allocated and provide that GIC
mapping back to caller if already allocated.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -51,6 +51,17 @@ static inline void crossbar_writeb(int irq_no, int cb_no)
writeb(cb_no, cb-crossbar_base + cb-register_offsets[irq_no]);
}
+static inline int get_prev_map_irq(int cb_no)
+{
+ int i;
+
+ for (i = 0; i cb-int_max; i++)
+ if (cb-irq_map[i] == cb_no)
+ return i;
+
+ return -ENODEV;
+}
+
static inline int allocate_free_irq(int cb_no)
{
int i;
@@ -88,11 +99,16 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
unsigned long ret;
+ ret = get_prev_map_irq(intspec[1]);
+ if (!IS_ERR_VALUE(ret))
+ goto found;
+
ret = allocate_free_irq(intspec[1]);
if (IS_ERR_VALUE(ret))
return ret;
+found:
*out_hwirq = ret + GIC_IRQ_START;
return 0;
}
--
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[PATCH V3 01/16] irqchip: crossbar: dont use '0' to mark reserved interrupts
From: Nishanth Menon n...@ti.com
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 3d15d16..20105bc 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -17,6 +17,7 @@
#include linux/irqchip/arm-gic.h
#define IRQ_FREE -1
+#define IRQ_RESERVED -2
#define GIC_IRQ_START 32
/*
@@ -139,7 +140,7 @@ static int __init crossbar_of_init(struct device_node *node)
pr_err(Invalid reserved entry\n);
goto err3;
}
- cb-irq_map[entry] = 0;
+ cb-irq_map[entry] = IRQ_RESERVED;
}
}
@@ -170,7 +171,7 @@ static int __init crossbar_of_init(struct device_node *node)
* reserved irqs. so find and store the offsets once.
*/
for (i = 0; i max; i++) {
- if (!cb-irq_map[i])
+ if (cb-irq_map[i] == IRQ_RESERVED)
continue;
cb-register_offsets[i] = reserved;
--
1.7.9.5
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[PATCH V3 0/2] arm: dts: dra7: add crossbar dt support
This series introduces DT support for crossbar device and changes dra7 peripherals to use crossbar number instead of irq. This depends on below driver fixes and cleanup series. https://lkml.org/lkml/2014/6/16/218 [V2] Rebased on 3.15 mainline. [V3] Added ti,irqs-skip property and ti,irqs-safe-map property to crossbar dt node. R Sricharan (2): arm: dts: dra7: add routable-irqs property for gic node arm: dts: dra7: add crossbar device binding arch/arm/boot/dts/dra7.dtsi | 136 +-- 1 file changed, 78 insertions(+), 58 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 1/2] arm: dts: dra7: add routable-irqs property for gic node
From: R Sricharan r.sricha...@ti.com There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Cc: Benoit Cousson bcous...@baylibre.com Cc: Santosh Shilimkar santosh.shilim...@ti.com Cc: Rajendra Nayak rna...@ti.com Cc: Tony Lindgren t...@atomide.com --- arch/arm/boot/dts/dra7.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e..1cf4ee1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -45,6 +45,7 @@ compatible = arm,cortex-a15-gic; interrupt-controller; #interrupt-cells = 3; + arm,routable-irqs = 192; reg = 0x48211000 0x1000, 0x48212000 0x1000, 0x48214000 0x2000, -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V3 2/2] arm: dts: dra7: add crossbar device binding
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Benoit Cousson bcous...@baylibre.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
---
[V3] Added ti,irqs-skip and ti,irqs-safe-map properties
to the crossbar device node.
arch/arm/boot/dts/dra7.dtsi | 135 ---
1 file changed, 77 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1cf4ee1..6de99c2 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -80,8 +80,8 @@
ti,hwmods = l3_main_1, l3_main_2;
reg = 0x4400 0x100,
0x4500 0x1000;
- interrupts = GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH;
prm: prm@4ae06000 {
compatible = ti,dra7-prm;
@@ -156,10 +156,10 @@
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
- interrupts = GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
#dma-cells = 1;
#dma-channels = 32;
#dma-requests = 127;
@@ -168,7 +168,7 @@
gpio1: gpio@4ae1 {
compatible = ti,omap4-gpio;
reg = 0x4ae1 0x200;
- interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio1;
gpio-controller;
#gpio-cells = 2;
@@ -179,7 +179,7 @@
gpio2: gpio@48055000 {
compatible = ti,omap4-gpio;
reg = 0x48055000 0x200;
- interrupts = GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio2;
gpio-controller;
#gpio-cells = 2;
@@ -190,7 +190,7 @@
gpio3: gpio@48057000 {
compatible = ti,omap4-gpio;
reg = 0x48057000 0x200;
- interrupts = GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio3;
gpio-controller;
#gpio-cells = 2;
@@ -201,7 +201,7 @@
gpio4: gpio@48059000 {
compatible = ti,omap4-gpio;
reg = 0x48059000 0x200;
- interrupts = GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio4;
gpio-controller;
#gpio-cells = 2;
@@ -212,7 +212,7 @@
gpio5: gpio@4805b000 {
compatible = ti,omap4-gpio;
reg = 0x4805b000 0x200;
- interrupts = GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio5;
gpio-controller;
#gpio-cells = 2;
@@ -223,7 +223,7 @@
gpio6: gpio@4805d000 {
compatible = ti,omap4-gpio;
reg = 0x4805d000 0x200;
- interrupts = GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio6
Re: [PATCH V2 05/19] irqchip: crossbar: Change allocation logic by reversing search for free irqs
Hi Jason, On Thursday 12 June 2014 06:26 PM, Jason Cooper wrote: On Thu, Jun 12, 2014 at 05:23:13PM +0530, Sricharan R wrote: From: Nishanth Menon n...@ti.com Reverse the search algorithm to ensure that address mapping and IRQ allocation logics are proper. This can open up new bugs which are easily fixable rather than wait till allocation logic approaches the limit to find new bugs. Could you expand on this logic some more? What class of bugs are you hoping to discover more easily? class 1. address space errors - example: reg = a size_b ti,max-irqs = is a wrong parameter class 2: irq-reserved list - which decides which entries in the address space is not actually wired in class 3: wrong list of routable-irqs. in general allocating from max to min tends to have benefits in ensuring the different issues that may be present in dts is easily caught at definition time, rather than at a later point in time. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 08/19] irqchip: crossbar: fix checkpatch warning
Hi Jason, On Thursday 12 June 2014 09:35 PM, Joe Perches wrote: On Thu, 2014-06-12 at 11:32 -0400, Jason Cooper wrote: Hi Jason. But bugfix backports haven't been much of an issue in other subsystems with fairly active whitespace/style changes. Most of the mvebu fixes we've had that failed to apply were generally due to a large whitespace change (dts node shuffling, admittedly not checkpatch-related). So not due to this. I've also frequently been stymied by code cleanups when using git blame to find the commit introducing a regression. git blame -w can frequently help there. So, my general rule is: If you're submitting a patch to make checkpatch be quiet, re-assess the need. If you're making changes and you can fix some checkpatch items while you're there, then do so. Decent rule. There are certainly legitimate checkpatch-only patches, I just don't think this is one qualifies. Of course it's the maintainer's choice (and last I saw, that's you) to ignore whatever doesn't fit the appropriate vision for the code. $ ./scripts/get_maintainer.pl -f drivers/irqchip/irq-crossbar.c Thomas Gleixner t...@linutronix.de (maintainer:IRQCHIP DRIVERS) Jason Cooper ja...@lakedaemon.net (maintainer:IRQCHIP DRIVERS) Ok, if this is not qualifying as a separate patch then i will merge this with other patches in the series which touch them. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
On Thursday 12 June 2014 07:27 PM, Tony Lindgren wrote: * Jason Cooper ja...@lakedaemon.net [140612 05:52]: On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote: From: Nishanth Menon n...@ti.com When, in the system due to varied reasons, interrupts might be unusable due to hardware behavior, but register maps do exist, then those interrupts should be skipped while mapping irq to crossbars. Signed-off-by: Nishanth Menon n...@ti.com Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Tony Lindgren t...@atomide.com Tony, have you applied these somewhere already? I think some of these I had applied into a branch ready for merging but then it was discovered that further changes were needed and the branch was dropped. Sricharan, please remove my Signed-off-by from this series. If I end up applying it for merging my scripts will add it automatically. Ok, will remove it. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
Hi Jason,
On Thursday 12 June 2014 07:37 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 06:49:17PM +0530, Sricharan R wrote:
Hi Jason,
On Thursday 12 June 2014 06:21 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Tony, have you applied these somewhere already?
---
drivers/irqchip/irq-crossbar.c | 47
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c
b/drivers/irqchip/irq-crossbar.c
index 51d4b87..847f6e3 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -13,11 +13,13 @@
#include linux/io.h
#include linux/of_address.h
#include linux/of_irq.h
+#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
+#define IRQ_SKIP -3
#define GIC_IRQ_START 32
/*
@@ -34,6 +36,16 @@ struct crossbar_device {
void (*write) (int, int);
};
+/**
+ * struct crossbar_data: Platform specific data
+ * @irqs_unused: array of irqs that cannot be used because of hw erratas
+ * @size: size of the irqs_unused array
+ */
+struct crossbar_data {
+ const uint *irqs_unused;
+ const uint size;
+};
+
static struct crossbar_device *cb;
static inline void crossbar_writel(int irq_no, int cb_no)
@@ -119,10 +131,12 @@ const struct irq_domain_ops routable_irq_domain_ops
= {
.xlate = crossbar_domain_xlate
};
-static int __init crossbar_of_init(struct device_node *node)
+static int __init crossbar_of_init(struct device_node *node,
+ const struct crossbar_data *data)
{
int i, size, max, reserved = 0, entry;
const __be32 *irqsr;
+ const int *irqsk = NULL;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
@@ -194,6 +208,22 @@ static int __init crossbar_of_init(struct device_node
*node)
reserved += size;
}
+ /* Skip the ones marked as unused */
+ if (data) {
+ irqsk = data-irqs_unused;
+ size = data-size;
+
+ for (i = 0; i size; i++) {
+ entry = irqsk[i];
+
+ if (entry max) {
+ pr_err(Invalid skip entry\n);
+ goto err3;
+ }
+ cb-irq_map[entry] = IRQ_SKIP;
+ }
+ }
+
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
@@ -208,18 +238,27 @@ err1:
return -ENOMEM;
}
+/* irq number 10 cannot be used because of hw bug */
+int dra_irqs_unused[] = { 10 };
+struct crossbar_data cb_dra_data = { dra_irqs_unused,
+ ARRAY_SIZE(dra_irqs_unused) };
+
static const struct of_device_id crossbar_match[] __initconst = {
- { .compatible = ti,irq-crossbar },
+ { .compatible = ti,irq-crossbar, .data = cb_dra_data },
{}
};
This is a bug in all implementations of this IP? Or, a specific
SoC's implementation? Would this be better expressed in the dts via a
property? Can we expect future implementations to be fixed?
thx,
Jason.
Infact this and PATCH#10 should be merged. I will change that.
So in Socs's (2 so far) that do have a crossbar, some irqs are mapped
through a crossbar and some are directly wired to the irqchip.
These 'unused irqs' are those which are directly wired but they still
have a crossbar register. Their routing cannot be changed. So this
is not really expected usage of the crossbar hw ip. We initially thought
having a dts property separately for this, but took this path to avoid
loading the dts with additional bindings which may not be generic.
How do you plan to handle future SoCs with this IP and possibly
different hard-wired irqs?
Yes, that would require adding a new compatible in the above list and dts.
So if adding a new binding in the dts would be cleaner, then i will change
it that way.
Regards,
Sricharan
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Re: [PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
Hi Jason, On Thursday 12 June 2014 07:35 PM, Jason Cooper wrote: On Thu, Jun 12, 2014 at 06:57:15AM -0700, Tony Lindgren wrote: * Jason Cooper ja...@lakedaemon.net [140612 05:52]: On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote: From: Nishanth Menon n...@ti.com When, in the system due to varied reasons, interrupts might be unusable due to hardware behavior, but register maps do exist, then those interrupts should be skipped while mapping irq to crossbars. Signed-off-by: Nishanth Menon n...@ti.com Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Tony Lindgren t...@atomide.com Tony, have you applied these somewhere already? I think some of these I had applied into a branch ready for merging but then it was discovered that further changes were needed and the branch was dropped. Ok. Sricharan, please remove my Signed-off-by from this series. If I end up applying it for merging my scripts will add it automatically. Do you have other changes outside of irqchip depending on this series? If so, I can set up a topic branch for you guys to base off of. Otherwise, I'll just apply them to irqchip/core when they're ready. There are dts changes which are dependent upon this series. http://www.spinics.net/lists/linux-omap/msg108116.html Also, Sricharan, when you respin this, please clearly identify (in the comment section) those patches that need to be flagged for stable. It would be helpful if they were the first patches in the series as well. Ok, i will point this out clearly. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 16/19] irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping
Hi Jason,
On Thursday 12 June 2014 07:24 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:24PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21
++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..6d2e2f5 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -22,6 +23,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ti,max-crossbar-sources = 400;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 2a73a66..cf69c4d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
/**
* struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -33,6 +34,7 @@
*/
struct crossbar_device {
uint int_max;
+uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -126,12 +128,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+int req_num = intspec[1];
-ret = get_prev_map_irq(intspec[1]);
+if (req_num = cb-max_crossbar_sources) {
+pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+return -EINVAL;
+}
+
+ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
-ret = allocate_free_irq(intspec[1]);
+ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -164,6 +173,14 @@ static int __init crossbar_of_init(struct device_node
*node,
if (!cb-crossbar_base)
goto err_cb;
+of_property_read_u32(node, ti,max-crossbar-sources,
+ cb-max_crossbar_sources);
+if (!cb-max_crossbar_sources) {
+pr_err(missing 'ti,max-crossbar-sources' property\n);
+ret = -EINVAL;
+goto err_base;
+}
This completely breaks all boards using old dtbs. Please set
max_crossbar_sources to a sane value (400) when the property is missing.
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
I know this is context, but you may want to look at this property as
well and set it to a sane value instead of erroring out.
crossbar dts node itself is not there in any dts yet. So this is not applicable
for any old boards. Any future dts with crossbar node should have this property
defined.
Regards,
Sricharan
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Re: [PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
On Friday 13 June 2014 12:26 PM, Sricharan R wrote: Hi Jason, On Thursday 12 June 2014 07:35 PM, Jason Cooper wrote: On Thu, Jun 12, 2014 at 06:57:15AM -0700, Tony Lindgren wrote: * Jason Cooper ja...@lakedaemon.net [140612 05:52]: On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote: From: Nishanth Menon n...@ti.com When, in the system due to varied reasons, interrupts might be unusable due to hardware behavior, but register maps do exist, then those interrupts should be skipped while mapping irq to crossbars. Signed-off-by: Nishanth Menon n...@ti.com Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Tony Lindgren t...@atomide.com Tony, have you applied these somewhere already? I think some of these I had applied into a branch ready for merging but then it was discovered that further changes were needed and the branch was dropped. Ok. Sricharan, please remove my Signed-off-by from this series. If I end up applying it for merging my scripts will add it automatically. Do you have other changes outside of irqchip depending on this series? If so, I can set up a topic branch for you guys to base off of. Otherwise, I'll just apply them to irqchip/core when they're ready. There are dts changes which are dependent upon this series. http://www.spinics.net/lists/linux-omap/msg108116.html Also, Sricharan, when you respin this, please clearly identify (in the comment section) those patches that need to be flagged for stable. It would be helpful if they were the first patches in the series as well. Ok, i will point this out clearly. Infact since the dts node is not present in the older kernel (even now), the driver itself is not used. So i feel there is nothing to be flagged for stable as such. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 2/2] ARM: DRA7: hwmod: remove interrupts for DMA
From: Nishanth Menon n...@ti.com
DMA interrupts are now available in of, and the definitions are
duplicates in hwmod. This prevents us from dynamically allocating
interrupt resources for dma from devicetree.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c |9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..31fd260 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -343,19 +343,10 @@ static struct omap_dma_dev_attr dma_dev_attr = {
};
/* dma_system */
-static struct omap_hwmod_irq_info dra7xx_dma_system_irqs[] = {
- { .name = 0, .irq = 12 + DRA7XX_IRQ_GIC_START },
- { .name = 1, .irq = 13 + DRA7XX_IRQ_GIC_START },
- { .name = 2, .irq = 14 + DRA7XX_IRQ_GIC_START },
- { .name = 3, .irq = 15 + DRA7XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod dra7xx_dma_system_hwmod = {
.name = dma_system,
.class = dra7xx_dma_hwmod_class,
.clkdm_name = dma_clkdm,
- .mpu_irqs = dra7xx_dma_system_irqs,
.main_clk = l3_iclk_div,
.prcm = {
.omap4 = {
--
1.7.9.5
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[PATCH V2 1/2] ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver
From: Nishanth Menon n...@ti.com
we have currently 2 DMA drivers that try to co-exist.
drivers/dma/omap-dma.c which registers it's own IRQ and is device tree
aware and uses arch/arm/plat-omap/dma.c instance created by
arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).
Currently both try to register interrupts and mach-omap2/plat-omap dma.c
attempts to use the IRQ number registered by hwmod to register it's own
interrupt handler.
Now, there is no reasonable way of static allocating DMA irq in GIC
SPI when we use crossbar. However, since the dma_chan structure is
freed as a result of IRQ not being present due to devm allocation,
maintaining information of channel by platform code fails at a later
point in time when that region of memory is reused.
So, if hwmod does not indicate an IRQ number, then, assume that
dma-engine will take care of the interrupt handling.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/dma.c |3 +++
arch/arm/plat-omap/dma.c |5 +++--
include/linux/omap-dma.h |1 +
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index a6d2cf1..e1a56d8 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -259,6 +259,9 @@ static int __init omap2_system_dma_init_dev(struct
omap_hwmod *oh, void *unused)
if (cpu_is_omap34xx() (omap_type() != OMAP2_DEVICE_TYPE_GP))
d-dev_caps |= HS_CHANNELS_RESERVED;
+ if (platform_get_irq_byname(pdev, 0) 0)
+ d-dev_caps |= DMA_ENGINE_HANDLE_IRQ;
+
/* Check the capabilities register for descriptor loading feature */
if (dma_read(CAPS_0, 0) DMA_HAS_DESCRIPTOR_CAPS)
dma_common_ch_end = CCDN;
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index b5608b1..7aae0e5 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2100,7 +2100,7 @@ static int omap_system_dma_probe(struct platform_device
*pdev)
omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
DMA_DEFAULT_FIFO_DEPTH, 0);
- if (dma_omap2plus()) {
+ if (dma_omap2plus() !(d-dev_caps DMA_ENGINE_HANDLE_IRQ)) {
strcpy(irq_name, 0);
dma_irq = platform_get_irq_byname(pdev, irq_name);
if (dma_irq 0) {
@@ -2145,7 +2145,8 @@ static int omap_system_dma_remove(struct platform_device
*pdev)
char irq_name[4];
strcpy(irq_name, 0);
dma_irq = platform_get_irq_byname(pdev, irq_name);
- remove_irq(dma_irq, omap24xx_dma_irq);
+ if (dma_irq = 0)
+ remove_irq(dma_irq, omap24xx_dma_irq);
} else {
int irq_rel = 0;
for ( ; irq_rel dma_chan_count; irq_rel++) {
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 88e6ea4..6f06f8b 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -130,6 +130,7 @@
#define IS_WORD_16 BIT(0xd)
#define ENABLE_16XX_MODE BIT(0xe)
#define HS_CHANNELS_RESERVED BIT(0xf)
+#define DMA_ENGINE_HANDLE_IRQ BIT(0x10)
/* Defines for DMA Capabilities */
#define DMA_HAS_TRANSPARENT_CAPS (0x1 18)
--
1.7.9.5
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[PATCH V2 0/2] ARM: OMAP2+: remove DMA interrupt if DT provided
This series removes the DMA interrupt registration if DT provides interrupts, so we have no need for hwmod provided interrupt number. This is a pre-req for crossbar migration as DMA is the last driver to use interrupt definition from hwmod. [V2] Rebased on 3.15 mainline Nishanth Menon (2): ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver ARM: DRA7: hwmod: remove interrupts for DMA arch/arm/mach-omap2/dma.c |3 +++ arch/arm/mach-omap2/omap_hwmod_7xx_data.c |9 - arch/arm/plat-omap/dma.c |5 +++-- include/linux/omap-dma.h |1 + 4 files changed, 7 insertions(+), 11 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 01/19] irqchip: crossbar: dont use '0' to mark reserved interrupts
From: Nishanth Menon n...@ti.com
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/irqchip/irq-crossbar.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 3d15d16..20105bc 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -17,6 +17,7 @@
#include linux/irqchip/arm-gic.h
#define IRQ_FREE -1
+#define IRQ_RESERVED -2
#define GIC_IRQ_START 32
/*
@@ -139,7 +140,7 @@ static int __init crossbar_of_init(struct device_node *node)
pr_err(Invalid reserved entry\n);
goto err3;
}
- cb-irq_map[entry] = 0;
+ cb-irq_map[entry] = IRQ_RESERVED;
}
}
@@ -170,7 +171,7 @@ static int __init crossbar_of_init(struct device_node *node)
* reserved irqs. so find and store the offsets once.
*/
for (i = 0; i max; i++) {
- if (!cb-irq_map[i])
+ if (cb-irq_map[i] == IRQ_RESERVED)
continue;
cb-register_offsets[i] = reserved;
--
1.7.9.5
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[PATCH V2 19/19] irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 816d11b..7476d9b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -35,8 +35,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped as
a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -44,3 +46,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+ device_y@0x4a033000 {
+ /* Direct mapped GIC SPI 1 used */
+ interrupts = GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 745ad0a..2b61bbb 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -98,8 +98,13 @@ static inline int allocate_free_irq(int cb_no)
static inline bool needs_crossbar_write(irq_hw_number_t hw)
{
- if (hw GIC_IRQ_START)
- return true;
+ int cb_no;
+
+ if (hw GIC_IRQ_START) {
+ cb_no = cb-irq_map[hw - GIC_IRQ_START];
+ if (cb_no != IRQ_RESERVED cb_no != IRQ_SKIP)
+ return true;
+ }
return false;
}
@@ -139,8 +144,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
int ret;
int req_num = intspec[1];
+ int direct_map_num;
if (req_num = cb-max_crossbar_sources) {
+ direct_map_num = req_num - cb-max_crossbar_sources;
+ if (direct_map_num cb-int_max) {
+ ret = cb-irq_map[direct_map_num];
+ if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
+ /* We use the interrupt num as h/w irq num */
+ ret = direct_map_num;
+ goto found;
+ }
+ }
+
pr_err(%s: requested crossbar number %d max %d\n,
__func__, req_num, cb-max_crossbar_sources);
return -EINVAL;
--
1.7.9.5
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[PATCH V2 18/19] Documentation: dt: OMAP: crossbar: add description for interrupt consumer
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 6d2e2f5..816d11b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -27,3 +27,20 @@ Examples:
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
+
+Consumer:
+
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
+Documentation/devicetree/bindings/arm/gic.txt for further details.
+
+An interrupt consumer on an SoC using crossbar will use:
+ interrupts = GIC_SPI request_number interrupt_level
+request number shall be between 0 to that described by
+ti,max-crossbar-sources
+
+Example:
+ device_x@0x4a023000 {
+ /* Crossbar 8 used */
+ interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
--
1.7.9.5
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[PATCH V2 17/19] irqchip: crossbar: introduce centralized check for crossbar write
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index cf69c4d..745ad0a 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -96,10 +96,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -117,7 +127,7 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START)
+ if (needs_crossbar_write(hw))
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
}
--
1.7.9.5
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[PATCH V2 13/19] irqchip: crossbar: change the goto naming
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 524e6e9..cf0d79f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -152,17 +152,17 @@ static int __init crossbar_of_init(struct device_node
*node,
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
- goto err1;
+ goto err_cb;
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
ret = -EINVAL;
- goto err2;
+ goto err_base;
}
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
- goto err2;
+ goto err_base;
cb-int_max = max;
@@ -181,7 +181,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid reserved entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_RESERVED;
}
@@ -189,7 +189,7 @@ static int __init crossbar_of_init(struct device_node *node,
cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
- goto err3;
+ goto err_irq_map;
of_property_read_u32(node, ti,reg-size, size);
@@ -206,7 +206,7 @@ static int __init crossbar_of_init(struct device_node *node,
default:
pr_err(Invalid reg-size property\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
break;
}
@@ -234,7 +234,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
}
cb-irq_map[entry] = IRQ_SKIP;
}
@@ -251,13 +251,13 @@ static int __init crossbar_of_init(struct device_node
*node,
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
-err4:
+err_reg_offset:
kfree(cb-register_offsets);
-err3:
+err_irq_map:
kfree(cb-irq_map);
-err2:
+err_base:
iounmap(cb-crossbar_base);
-err1:
+err_cb:
kfree(cb);
return ret;
}
--
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[PATCH V2 02/19] irqchip: crossbar: check for premapped crossbar before allocating
From: Nishanth Menon n...@ti.com
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two
different GIC interrupts. This is completely undesirable. Instead, check
if the requested crossbar event is pre-allocated and provide that GIC
mapping back to caller if already allocated.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -51,6 +51,17 @@ static inline void crossbar_writeb(int irq_no, int cb_no)
writeb(cb_no, cb-crossbar_base + cb-register_offsets[irq_no]);
}
+static inline int get_prev_map_irq(int cb_no)
+{
+ int i;
+
+ for (i = 0; i cb-int_max; i++)
+ if (cb-irq_map[i] == cb_no)
+ return i;
+
+ return -ENODEV;
+}
+
static inline int allocate_free_irq(int cb_no)
{
int i;
@@ -88,11 +99,16 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
unsigned long ret;
+ ret = get_prev_map_irq(intspec[1]);
+ if (!IS_ERR_VALUE(ret))
+ goto found;
+
ret = allocate_free_irq(intspec[1]);
if (IS_ERR_VALUE(ret))
return ret;
+found:
*out_hwirq = ret + GIC_IRQ_START;
return 0;
}
--
1.7.9.5
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[PATCH V2 14/19] irqchip: crossbar: set cb pointer to null in case of error
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R r.sricha...@ti.com --- drivers/irqchip/irq-crossbar.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index cf0d79f..5f3e75a 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -259,6 +259,8 @@ err_base: iounmap(cb-crossbar_base); err_cb: kfree(cb); + + cb = NULL; return ret; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 15/19] irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq) gets called when irq_desc(irq) is disposed.
After this the irq is anyways unusable and have to mapped again.
Adding the above kerneldoc for unmap callback clarity.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5f3e75a..2a73a66 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -101,6 +101,16 @@ static int crossbar_domain_map(struct irq_domain *d,
unsigned int irq,
return 0;
}
+/**
+ * crossbar_domain_unmap - unmap a crossbar-irq connection
+ * @d: domain of irq to unmap
+ * @irq: virq number
+ *
+ * The map/unmap callbacks need not be called same number of times for
+ * a particular irq. But still use counting is not needed here, because
+ * unmap(irq) gets called when irq_desc(irq) is disposed. After this the
+ * irq is anyways unusuable and have to be mapped again.
+ */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
--
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[PATCH V2 16/19] irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..6d2e2f5 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -22,6 +23,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ ti,max-crossbar-sources = 400;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 2a73a66..cf69c4d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
/**
* struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -33,6 +34,7 @@
*/
struct crossbar_device {
uint int_max;
+ uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -126,12 +128,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+ int req_num = intspec[1];
- ret = get_prev_map_irq(intspec[1]);
+ if (req_num = cb-max_crossbar_sources) {
+ pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+ return -EINVAL;
+ }
+
+ ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
- ret = allocate_free_irq(intspec[1]);
+ ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -164,6 +173,14 @@ static int __init crossbar_of_init(struct device_node
*node,
if (!cb-crossbar_base)
goto err_cb;
+ of_property_read_u32(node, ti,max-crossbar-sources,
+cb-max_crossbar_sources);
+ if (!cb-max_crossbar_sources) {
+ pr_err(missing 'ti,max-crossbar-sources' property\n);
+ ret = -EINVAL;
+ goto err_base;
+ }
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
--
1.7.9.5
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[PATCH V2 11/19] irqchip: crossbar: fix memory leak incase of invalid entry
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
register_offsets are freed as well.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 42a2e62..fea3e5d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -225,7 +225,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
- goto err3;
+ goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
}
--
1.7.9.5
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[PATCH V2 12/19] irqchip: crossbar: return proper error value
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors, return proper
error results in case of failures.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index fea3e5d..524e6e9 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -140,20 +140,26 @@ static const struct irq_domain_ops
routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node,
const struct crossbar_data *data)
{
- int i, size, max, reserved = 0, entry, safe_map;
+ int i, size, max = 0, reserved = 0, entry, safe_map;
const __be32 *irqsr;
const int *irqsk = NULL;
+ int ret = -ENOMEM;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
if (!cb)
- return -ENOMEM;
+ return ret;
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
+ if (!max) {
+ pr_err(missing 'ti,max-irqs' property\n);
+ ret = -EINVAL;
+ goto err2;
+ }
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -174,6 +180,7 @@ static int __init crossbar_of_init(struct device_node *node,
i, entry);
if (entry max) {
pr_err(Invalid reserved entry\n);
+ ret = -EINVAL;
goto err3;
}
cb-irq_map[entry] = IRQ_RESERVED;
@@ -198,6 +205,7 @@ static int __init crossbar_of_init(struct device_node *node,
break;
default:
pr_err(Invalid reg-size property\n);
+ ret = -EINVAL;
goto err4;
break;
}
@@ -225,6 +233,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
+ ret = -EINVAL;
goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
@@ -250,7 +259,7 @@ err2:
iounmap(cb-crossbar_base);
err1:
kfree(cb);
- return -ENOMEM;
+ return ret;
}
/* irq number 10,133,139 and 140 cannot be used because of hw bug */
--
1.7.9.5
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[PATCH V2 07/19] irqchip: crossbar: fix sparse warnings
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it be static?
drivers/irqchip/irq-crossbar.c:252:5: warning: symbol 'dra_irqs_unused' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:253:22: warning: symbol 'cb_dra_data' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was
not declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c5415ae..5da9d36 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -16,6 +16,7 @@
#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
@@ -126,7 +127,7 @@ found:
return 0;
}
-const struct irq_domain_ops routable_irq_domain_ops = {
+static const struct irq_domain_ops routable_irq_domain_ops = {
.map = crossbar_domain_map,
.unmap = crossbar_domain_unmap,
.xlate = crossbar_domain_xlate
@@ -249,8 +250,8 @@ err1:
}
/* irq number 10 cannot be used because of hw bug */
-int dra_irqs_unused[] = { 10 };
-struct crossbar_data cb_dra_data = { dra_irqs_unused,
+static int dra_irqs_unused[] = { 10 };
+static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
static const struct of_device_id crossbar_match[] __initconst = {
--
1.7.9.5
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[PATCH V2 09/19] irqchip: crossbar: fix kerneldoc warning
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
Warning(drivers/irqchip/irq-crossbar.c:42): missing initial short description
on line:
* struct crossbar_data: Platform specific data
Info(drivers/irqchip/irq-crossbar.c:42): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:50): No description found for parameter
'safe_map'
4 warnings
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 58790d4..7d4db07 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -23,11 +23,13 @@
#define IRQ_SKIP -3
#define GIC_IRQ_START 32
-/*
+/**
+ * struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
+ * @write: register write function pointer
*/
struct crossbar_device {
uint int_max;
@@ -39,9 +41,10 @@ struct crossbar_device {
};
/**
- * struct crossbar_data: Platform specific data
+ * struct crossbar_data - Platform specific data
* @irqs_unused: array of irqs that cannot be used because of hw erratas
* @size: size of the irqs_unused array
+ * @safe_map: safe value to write to crossbar register
*/
struct crossbar_data {
const uint *irqs_unused;
--
1.7.9.5
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[PATCH V2 10/19] irqchip: crossbar: DRA7: Fix unused crossbar list
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
Technical Reference Manual documentation update expected
DRA72x-TRMINC00067 is being used to track the update.
Reported-by: Nishanth Menon n...@ti.com
Reported-by: Sricharan R r.sricha...@ti.com
Reported-by: Suman Anna s-a...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 7d4db07..42a2e62 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -253,8 +253,8 @@ err1:
return -ENOMEM;
}
-/* irq number 10 cannot be used because of hw bug */
-static int dra_irqs_unused[] = { 10 };
+/* irq number 10,133,139 and 140 cannot be used because of hw bug */
+static int dra_irqs_unused[] = { 10 , 133, 139, 140 };
static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
--
1.7.9.5
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[PATCH V2 08/19] irqchip: crossbar: fix checkpatch warning
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
WARNING: Missing a blank line after declarations
+ int *register_offsets;
+ void (*write)(int, int);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5da9d36..58790d4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -34,7 +34,8 @@ struct crossbar_device {
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
- void (*write) (int, int);
+
+ void (*write)(int, int);
};
/**
@@ -150,7 +151,7 @@ static int __init crossbar_of_init(struct device_node *node,
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
- cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -176,7 +177,7 @@ static int __init crossbar_of_init(struct device_node *node,
}
}
- cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
1.7.9.5
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[PATCH V2 1/2] ARM: dts: DRA7: Add routable-irqs property for gic node
From: R Sricharan r.sricha...@ti.com There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R r.sricha...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Cc: Benoit Cousson bcous...@baylibre.com Cc: Santosh Shilimkar santosh.shilim...@ti.com Cc: Rajendra Nayak rna...@ti.com Cc: Tony Lindgren t...@atomide.com Tested-by: Darren Etheridge detheri...@ti.com Tested-by: Roger Quadros rog...@ti.com --- arch/arm/boot/dts/dra7.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e..1cf4ee1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -45,6 +45,7 @@ compatible = arm,cortex-a15-gic; interrupt-controller; #interrupt-cells = 3; + arm,routable-irqs = 192; reg = 0x48211000 0x1000, 0x48212000 0x1000, 0x48214000 0x2000, -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 2/2] ARM: dts: DRA7: Add crossbar device binding
From: R Sricharan r.sricha...@ti.com
There is a IRQ crossbar device in the soc, which
maps the irq requests from the peripherals to the
mpu interrupt controller's inputs. The Peripheral irq
requests are connected to only one crossbar
input and the output of the crossbar is connected to only one
controller's input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Cc: Benoit Cousson bcous...@baylibre.com
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
Tested-by: Darren Etheridge detheri...@ti.com
Tested-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 133 ---
1 file changed, 75 insertions(+), 58 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1cf4ee1..0fedbcd 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -80,8 +80,8 @@
ti,hwmods = l3_main_1, l3_main_2;
reg = 0x4400 0x100,
0x4500 0x1000;
- interrupts = GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH;
prm: prm@4ae06000 {
compatible = ti,dra7-prm;
@@ -156,10 +156,10 @@
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
- interrupts = GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH,
-GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH;
#dma-cells = 1;
#dma-channels = 32;
#dma-requests = 127;
@@ -168,7 +168,7 @@
gpio1: gpio@4ae1 {
compatible = ti,omap4-gpio;
reg = 0x4ae1 0x200;
- interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio1;
gpio-controller;
#gpio-cells = 2;
@@ -179,7 +179,7 @@
gpio2: gpio@48055000 {
compatible = ti,omap4-gpio;
reg = 0x48055000 0x200;
- interrupts = GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio2;
gpio-controller;
#gpio-cells = 2;
@@ -190,7 +190,7 @@
gpio3: gpio@48057000 {
compatible = ti,omap4-gpio;
reg = 0x48057000 0x200;
- interrupts = GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio3;
gpio-controller;
#gpio-cells = 2;
@@ -201,7 +201,7 @@
gpio4: gpio@48059000 {
compatible = ti,omap4-gpio;
reg = 0x48059000 0x200;
- interrupts = GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio4;
gpio-controller;
#gpio-cells = 2;
@@ -212,7 +212,7 @@
gpio5: gpio@4805b000 {
compatible = ti,omap4-gpio;
reg = 0x4805b000 0x200;
- interrupts = GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio5;
gpio-controller;
#gpio-cells = 2;
@@ -223,7 +223,7 @@
gpio6: gpio@4805d000 {
compatible = ti,omap4-gpio;
reg = 0x4805d000 0x200;
- interrupts = GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH;
+ interrupts = GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = gpio6;
gpio
[PATCH V2 04/19] irqchip: crossbar: Initialise the crossbar with a safe value
From: Nishanth Menon n...@ti.com
Since crossbar is s/w configurable, the initial settings of the
crossbar cannot be assumed to be sane. This implies that:
a) On initialization all un-reserved crossbars must be initialized to
a known 'safe' value.
b) When unmapping the interrupt, the safe value must be written to
ensure that the crossbar mapping matches with interrupt controller
usage.
So provide a safe value in the compatible data to map if
'0' is not safe for the platform and use it during init and unmap
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 847f6e3..287d3ce 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -44,6 +44,7 @@ struct crossbar_device {
struct crossbar_data {
const uint *irqs_unused;
const uint size;
+ const uint safe_map;
};
static struct crossbar_device *cb;
@@ -134,7 +135,7 @@ const struct irq_domain_ops routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node,
const struct crossbar_data *data)
{
- int i, size, max, reserved = 0, entry;
+ int i, size, max, reserved = 0, entry, safe_map;
const __be32 *irqsr;
const int *irqsk = NULL;
@@ -212,6 +213,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (data) {
irqsk = data-irqs_unused;
size = data-size;
+ safe_map = data-safe_map;
for (i = 0; i size; i++) {
entry = irqsk[i];
@@ -222,6 +224,14 @@ static int __init crossbar_of_init(struct device_node
*node,
}
cb-irq_map[entry] = IRQ_SKIP;
}
+
+ for (i = 0; i max; i++) {
+ if (cb-irq_map[i] == IRQ_RESERVED ||
+ cb-irq_map[i] == IRQ_SKIP)
+ continue;
+
+ cb-write(i, safe_map);
+ }
}
register_routable_domain_ops(routable_irq_domain_ops);
@@ -241,7 +251,7 @@ err1:
/* irq number 10 cannot be used because of hw bug */
int dra_irqs_unused[] = { 10 };
struct crossbar_data cb_dra_data = { dra_irqs_unused,
-ARRAY_SIZE(dra_irqs_unused) };
+ARRAY_SIZE(dra_irqs_unused), 0 };
static const struct of_device_id crossbar_match[] __initconst = {
{ .compatible = ti,irq-crossbar, .data = cb_dra_data },
--
1.7.9.5
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[PATCH V2 05/19] irqchip: crossbar: Change allocation logic by reversing search for free irqs
From: Nishanth Menon n...@ti.com
Reverse the search algorithm to ensure that address mapping and IRQ
allocation logics are proper. This can open up new bugs which are
easily fixable rather than wait till allocation logic approaches
the limit to find new bugs.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 287d3ce..de021638 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -68,7 +68,7 @@ static inline int get_prev_map_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++)
+ for (i = cb-int_max - 1; i = 0; i--)
if (cb-irq_map[i] == cb_no)
return i;
@@ -79,7 +79,7 @@ static inline int allocate_free_irq(int cb_no)
{
int i;
- for (i = 0; i cb-int_max; i++) {
+ for (i = cb-int_max - 1; i = 0; i--) {
if (cb-irq_map[i] == IRQ_FREE) {
cb-irq_map[i] = cb_no;
return i;
--
1.7.9.5
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[PATCH V2 0/2] ARM: dts: dra7: Add crossbar dt support
This series introduces DT support for crossbar device and changes dra7 peripherals to use crossbar number instead of irq. This depends on below driver fixes and cleanup series. https://lkml.org/lkml/2014/6/12/232 [V2] Rebased on 3.15 mainline. R Sricharan (2): ARM: dts: DRA7: Add routable-irqs property for gic node ARM: dts: DRA7: Add crossbar device binding arch/arm/boot/dts/dra7.dtsi | 134 --- 1 file changed, 76 insertions(+), 58 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 06/19] irqchip: crossbar: remove IS_ERR_VALUE check
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index de021638..c5415ae 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -110,15 +110,15 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- unsigned long ret;
+ int ret;
ret = get_prev_map_irq(intspec[1]);
- if (!IS_ERR_VALUE(ret))
+ if (ret = 0)
goto found;
ret = allocate_free_irq(intspec[1]);
- if (IS_ERR_VALUE(ret))
+ if (ret 0)
return ret;
found:
--
1.7.9.5
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[PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
drivers/irqchip/irq-crossbar.c | 47
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 51d4b87..847f6e3 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -13,11 +13,13 @@
#include linux/io.h
#include linux/of_address.h
#include linux/of_irq.h
+#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
+#define IRQ_SKIP -3
#define GIC_IRQ_START 32
/*
@@ -34,6 +36,16 @@ struct crossbar_device {
void (*write) (int, int);
};
+/**
+ * struct crossbar_data: Platform specific data
+ * @irqs_unused: array of irqs that cannot be used because of hw erratas
+ * @size: size of the irqs_unused array
+ */
+struct crossbar_data {
+ const uint *irqs_unused;
+ const uint size;
+};
+
static struct crossbar_device *cb;
static inline void crossbar_writel(int irq_no, int cb_no)
@@ -119,10 +131,12 @@ const struct irq_domain_ops routable_irq_domain_ops = {
.xlate = crossbar_domain_xlate
};
-static int __init crossbar_of_init(struct device_node *node)
+static int __init crossbar_of_init(struct device_node *node,
+ const struct crossbar_data *data)
{
int i, size, max, reserved = 0, entry;
const __be32 *irqsr;
+ const int *irqsk = NULL;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
@@ -194,6 +208,22 @@ static int __init crossbar_of_init(struct device_node
*node)
reserved += size;
}
+ /* Skip the ones marked as unused */
+ if (data) {
+ irqsk = data-irqs_unused;
+ size = data-size;
+
+ for (i = 0; i size; i++) {
+ entry = irqsk[i];
+
+ if (entry max) {
+ pr_err(Invalid skip entry\n);
+ goto err3;
+ }
+ cb-irq_map[entry] = IRQ_SKIP;
+ }
+ }
+
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
@@ -208,18 +238,27 @@ err1:
return -ENOMEM;
}
+/* irq number 10 cannot be used because of hw bug */
+int dra_irqs_unused[] = { 10 };
+struct crossbar_data cb_dra_data = { dra_irqs_unused,
+ARRAY_SIZE(dra_irqs_unused) };
+
static const struct of_device_id crossbar_match[] __initconst = {
- { .compatible = ti,irq-crossbar },
+ { .compatible = ti,irq-crossbar, .data = cb_dra_data },
{}
};
int __init irqcrossbar_init(void)
{
struct device_node *np;
- np = of_find_matching_node(NULL, crossbar_match);
+ const struct of_device_id *of_id;
+ const struct crossbar_data *cdata;
+
+ np = of_find_matching_node_and_match(NULL, crossbar_match, of_id);
if (!np)
return -ENODEV;
- crossbar_of_init(np);
+ cdata = of_id-data;
+ crossbar_of_init(np, cdata);
return 0;
}
--
1.7.9.5
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[PATCH V2 00/19] irqchip: crossbar: driver fixes
This series does some cleanups, fixes for handling two interrupts getting mapped twice to same crossbar and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on 3.15 mainline. All the patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates The fixes series[1] earlier posted is merged in to this. [1] http://www.spinics.net/lists/arm-kernel/msg328273.html [V2] Merged the above series and rebased on 3.15 mainline Nishanth Menon (16): irqchip: crossbar: dont use '0' to mark reserved interrupts irqchip: crossbar: check for premapped crossbar before allocating irqchip: crossbar: Skip some irqs from getting mapped to crossbar irqchip: crossbar: Initialise the crossbar with a safe value irqchip: crossbar: Change allocation logic by reversing search for free irqs irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse warnings irqchip: crossbar: fix checkpatch warning irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: fix memory leak incase of invalid entry irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write Documentation: dt: OMAP: crossbar: add description for interrupt consumer irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC Rajendra Nayak (1): irqchip: crossbar: DRA7: Fix unused crossbar list Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 27 +++ drivers/irqchip/irq-crossbar.c | 193 +--- 2 files changed, 191 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 03/19] irqchip: crossbar: Skip some irqs from getting mapped to crossbar
Hi Jason,
On Thursday 12 June 2014 06:21 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:11PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
Tony, have you applied these somewhere already?
---
drivers/irqchip/irq-crossbar.c | 47
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 51d4b87..847f6e3 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -13,11 +13,13 @@
#include linux/io.h
#include linux/of_address.h
#include linux/of_irq.h
+#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
#define IRQ_FREE-1
#define IRQ_RESERVED-2
+#define IRQ_SKIP-3
#define GIC_IRQ_START 32
/*
@@ -34,6 +36,16 @@ struct crossbar_device {
void (*write) (int, int);
};
+/**
+ * struct crossbar_data: Platform specific data
+ * @irqs_unused: array of irqs that cannot be used because of hw erratas
+ * @size: size of the irqs_unused array
+ */
+struct crossbar_data {
+const uint *irqs_unused;
+const uint size;
+};
+
static struct crossbar_device *cb;
static inline void crossbar_writel(int irq_no, int cb_no)
@@ -119,10 +131,12 @@ const struct irq_domain_ops routable_irq_domain_ops = {
.xlate = crossbar_domain_xlate
};
-static int __init crossbar_of_init(struct device_node *node)
+static int __init crossbar_of_init(struct device_node *node,
+ const struct crossbar_data *data)
{
int i, size, max, reserved = 0, entry;
const __be32 *irqsr;
+const int *irqsk = NULL;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
@@ -194,6 +208,22 @@ static int __init crossbar_of_init(struct device_node
*node)
reserved += size;
}
+/* Skip the ones marked as unused */
+if (data) {
+irqsk = data-irqs_unused;
+size = data-size;
+
+for (i = 0; i size; i++) {
+entry = irqsk[i];
+
+if (entry max) {
+pr_err(Invalid skip entry\n);
+goto err3;
+}
+cb-irq_map[entry] = IRQ_SKIP;
+}
+}
+
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
@@ -208,18 +238,27 @@ err1:
return -ENOMEM;
}
+/* irq number 10 cannot be used because of hw bug */
+int dra_irqs_unused[] = { 10 };
+struct crossbar_data cb_dra_data = { dra_irqs_unused,
+ ARRAY_SIZE(dra_irqs_unused) };
+
static const struct of_device_id crossbar_match[] __initconst = {
-{ .compatible = ti,irq-crossbar },
+{ .compatible = ti,irq-crossbar, .data = cb_dra_data },
{}
};
This is a bug in all implementations of this IP? Or, a specific
SoC's implementation? Would this be better expressed in the dts via a
property? Can we expect future implementations to be fixed?
thx,
Jason.
Infact this and PATCH#10 should be merged. I will change that.
So in Socs's (2 so far) that do have a crossbar, some irqs are mapped
through a crossbar and some are directly wired to the irqchip.
These 'unused irqs' are those which are directly wired but they still
have a crossbar register. Their routing cannot be changed. So this
is not really expected usage of the crossbar hw ip. We initially thought
having a dts property separately for this, but took this path to avoid
loading the dts with additional bindings which may not be generic.
Regards,
Sricharan
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Re: [PATCH V2 10/19] irqchip: crossbar: DRA7: Fix unused crossbar list
Hi Jason,
On Thursday 12 June 2014 06:46 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:18PM +0530, Sricharan R wrote:
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
Technical Reference Manual documentation update expected
DRA72x-TRMINC00067 is being used to track the update.
Reported-by: Nishanth Menon n...@ti.com
Reported-by: Sricharan R r.sricha...@ti.com
Reported-by: Suman Anna s-a...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 7d4db07..42a2e62 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -253,8 +253,8 @@ err1:
return -ENOMEM;
}
-/* irq number 10 cannot be used because of hw bug */
-static int dra_irqs_unused[] = { 10 };
+/* irq number 10,133,139 and 140 cannot be used because of hw bug */
+static int dra_irqs_unused[] = { 10 , 133, 139, 140 };
see my earlier comment regarding a potential dts property.
Ok, if dts would be the better approach then I can change this.
Regards,
Sricharan
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Re: [PATCH V2 08/19] irqchip: crossbar: fix checkpatch warning
Hi Jason,
On Thursday 12 June 2014 06:40 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:16PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
WARNING: Missing a blank line after declarations
+int *register_offsets;
+void (*write)(int, int);
WARNING: Prefer kcalloc over kzalloc with multiply
+cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5da9d36..58790d4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -34,7 +34,8 @@ struct crossbar_device {
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
-void (*write) (int, int);
+
+void (*write)(int, int);
The empty line here looks bogus to me. Did you re-run checkpatch after
fixing the unnecessary space to see if it still complained about having
a 'blank line after declarations'?
Yes, it still complains even after fixing unnecessary space.
WARNING: Missing a blank line after declarations
#37: FILE: ./drivers/irqchip/irq-crossbar.c:37:
+ int *register_offsets;
+ void (*write)(int, int);
};
/**
@@ -150,7 +151,7 @@ static int __init crossbar_of_init(struct device_node
*node,
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
-cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -176,7 +177,7 @@ static int __init crossbar_of_init(struct device_node
*node,
}
}
-cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
I'm generally opposed to these sorts of checkpatch patches, especially
when they are just warnings. It's great for a new driver in the staging
tree, but it makes backporting future bugfixes that much harder when
drivers have been live in mainline.
If, in the future, you're changing code in this area, go ahead and
convert to kcalloc(), but I wouldn't do a separate patch for this kind
of thing.
Honestly, I would just drop this patch and not worry about it.
Ok, but i just hope that there may not be real needs to make changes
for this driver in future. So if that's the case then it might be
better to fix it once for now.
Regards,
Sricharan
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Re: [PATCH V2 11/19] irqchip: crossbar: fix memory leak incase of invalid entry
Hi Jason,
On Thursday 12 June 2014 06:50 PM, Jason Cooper wrote:
On Thu, Jun 12, 2014 at 05:23:19PM +0530, Sricharan R wrote:
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
s/returned/jumped/
ok, will correct.
register_offsets are freed as well.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 42a2e62..fea3e5d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -225,7 +225,7 @@ static int __init crossbar_of_init(struct device_node
*node,
if (entry max) {
pr_err(Invalid skip entry\n);
-goto err3;
+goto err4;
This would be a good opportunity to reduce the possibility of future
errors. Please consider renaming err{1,2,3,4} to something more
recognizable while you are here.
Ok, this is done as a part of patch#13.
Regards,
Sricharan
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Re: [PATCH V2 09/19] irqchip: crossbar: fix kerneldoc warning
Hi Jason, On Thursday 12 June 2014 06:44 PM, Jason Cooper wrote: On Thu, Jun 12, 2014 at 05:23:17PM +0530, Sricharan R wrote: From: Nishanth Menon n...@ti.com kernel doc style is wrong in code. fix it to squelch kerneldoc warnings: I would re-word the above to mention that we need to add missing properties for kerneldoc (@write, @safemap), and we're doing some cleanup of harmless warnings while we are here. Ok, will do this. Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description on line: * struct crossbar_device: crossbar device description Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter 'write' Warning(drivers/irqchip/irq-crossbar.c:42): missing initial short description on line: * struct crossbar_data: Platform specific data Info(drivers/irqchip/irq-crossbar.c:42): Scanning doc for struct Warning(drivers/irqchip/irq-crossbar.c:50): No description found for parameter 'safe_map' 4 warnings Signed-off-by: Nishanth Menon n...@ti.com --- drivers/irqchip/irq-crossbar.c |7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index 58790d4..7d4db07 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -23,11 +23,13 @@ #define IRQ_SKIP-3 #define GIC_IRQ_START 32 -/* +/** + * struct crossbar_device - crossbar device descriptio s/descriptio/description/ Ok, will correct. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 15/19] irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
Hi Jason, On Thursday 12 June 2014 07:19 PM, Jason Cooper wrote: On Thu, Jun 12, 2014 at 05:23:23PM +0530, Sricharan R wrote: The crossbar_domain_map/unmap callbacks need not be called same number of times for a particular irq. But still use counting is not needed here, because unmap(irq) gets called when irq_desc(irq) is disposed. After this the irq is anyways unusable and have to mapped again. There's no need to duplicate the code comment in the commit log ;-) Ok, will change this. Adding the above kerneldoc for unmap callback clarity. Signed-off-by: Sricharan R r.sricha...@ti.com --- drivers/irqchip/irq-crossbar.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index 5f3e75a..2a73a66 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -101,6 +101,16 @@ static int crossbar_domain_map(struct irq_domain *d, unsigned int irq, return 0; } +/** + * crossbar_domain_unmap - unmap a crossbar-irq connection + * @d: domain of irq to unmap + * @irq: virq number + * + * The map/unmap callbacks need not be called same number of times for s/same/the same/ ok. + * a particular irq. But still use counting is not needed here, because + * unmap(irq) gets called when irq_desc(irq) is disposed. After this the + * irq is anyways unusuable and have to be mapped again. Please re-word this. If I were new to the driver (I am ;-) ) I would have no idea what this means (and I don't :( ) hmm, will reword it better then.. Regards, Sricharan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/14] irqchip: crossbar: driver fixes
This series does some cleanup and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on linux-next next-20140602 tag + Tony's omap-for-v3.16/crossbar branch. Nishanth Menon (11): irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse warnings irqchip: crossbar: fix checkpatch warning irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: fix memory leak incase of invalid entry irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write Documentation: dt: OMAP: crossbar: add description for interrupt consumer irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC Rajendra Nayak (1): irqchip: crossbar: DRA7: Fix unused crossbar list Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 27 + drivers/irqchip/irq-crossbar.c | 127 +++- 2 files changed, 125 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/14] irqchip: crossbar: driver fixes
This series does some cleanup and provides support for hardwired IRQ and crossbar definitions. On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. This series adds support to represent such hard-wired irqs through DT and avoid generic allocation/programming of crossbar in the driver. This way of supporting hard-wired irqs was a result of the below discussions. http://www.spinics.net/lists/arm-kernel/msg329946.html Based on linux-next next-20140602 tag + Tony's omap-for-v3.16/crossbar branch. The patches are available here g...@github.com:Sricharanti/sricharan.git crossbar_updates Nishanth Menon (11): irqchip: crossbar: remove IS_ERR_VALUE check irqchip: crossbar: fix sparse warnings irqchip: crossbar: fix checkpatch warning irqchip: crossbar: fix kerneldoc warning irqchip: crossbar: fix memory leak incase of invalid entry irqchip: crossbar: return proper error value irqchip: crossbar: change the goto naming irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping irqchip: crossbar: introduce centralized check for crossbar write Documentation: dt: OMAP: crossbar: add description for interrupt consumer irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC Rajendra Nayak (1): irqchip: crossbar: DRA7: Fix unused crossbar list Sricharan R (2): irqchip: crossbar: set cb pointer to null in case of error irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback .../devicetree/bindings/arm/omap/crossbar.txt | 27 + drivers/irqchip/irq-crossbar.c | 127 +++- 2 files changed, 125 insertions(+), 29 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/14] irqchip: crossbar: fix sparse warnings
From: Nishanth Menon n...@ti.com
There is absolutely no need for crossbar driver to expose functions and
variables into global namespace. So make them all static
Fixes sparse warnings:
drivers/irqchip/irq-crossbar.c:129:29: warning: symbol
'routable_irq_domain_ops' was not declared. Should it be static?
drivers/irqchip/irq-crossbar.c:252:5: warning: symbol 'dra_irqs_unused' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:253:22: warning: symbol 'cb_dra_data' was not
declared. Should it be static?
drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was
not declared. Should it be static?
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index c5415ae..5da9d36 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -16,6 +16,7 @@
#include linux/of_device.h
#include linux/slab.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#define IRQ_FREE -1
#define IRQ_RESERVED -2
@@ -126,7 +127,7 @@ found:
return 0;
}
-const struct irq_domain_ops routable_irq_domain_ops = {
+static const struct irq_domain_ops routable_irq_domain_ops = {
.map = crossbar_domain_map,
.unmap = crossbar_domain_unmap,
.xlate = crossbar_domain_xlate
@@ -249,8 +250,8 @@ err1:
}
/* irq number 10 cannot be used because of hw bug */
-int dra_irqs_unused[] = { 10 };
-struct crossbar_data cb_dra_data = { dra_irqs_unused,
+static int dra_irqs_unused[] = { 10 };
+static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
static const struct of_device_id crossbar_match[] __initconst = {
--
1.7.9.5
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[PATCH 01/14] irqchip: crossbar: remove IS_ERR_VALUE check
From: Nishanth Menon n...@ti.com
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index de021638..c5415ae 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -110,15 +110,15 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned long *out_hwirq,
unsigned int *out_type)
{
- unsigned long ret;
+ int ret;
ret = get_prev_map_irq(intspec[1]);
- if (!IS_ERR_VALUE(ret))
+ if (ret = 0)
goto found;
ret = allocate_free_irq(intspec[1]);
- if (IS_ERR_VALUE(ret))
+ if (ret 0)
return ret;
found:
--
1.7.9.5
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[PATCH 03/14] irqchip: crossbar: fix checkpatch warning
From: Nishanth Menon n...@ti.com
remove un-necessary space in function pointer.
Fixes checkpatch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
WARNING: Missing a blank line after declarations
+ int *register_offsets;
+ void (*write)(int, int);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5da9d36..58790d4 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -34,7 +34,8 @@ struct crossbar_device {
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
- void (*write) (int, int);
+
+ void (*write)(int, int);
};
/**
@@ -150,7 +151,7 @@ static int __init crossbar_of_init(struct device_node *node,
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
- cb-irq_map = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -176,7 +177,7 @@ static int __init crossbar_of_init(struct device_node *node,
}
}
- cb-register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
+ cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
goto err3;
--
1.7.9.5
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[PATCH 04/14] irqchip: crossbar: fix kerneldoc warning
From: Nishanth Menon n...@ti.com
kernel doc style is wrong in code. fix it to squelch
kerneldoc warnings:
Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description
on line:
* struct crossbar_device: crossbar device description
Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
Warning(drivers/irqchip/irq-crossbar.c:42): missing initial short description
on line:
* struct crossbar_data: Platform specific data
Info(drivers/irqchip/irq-crossbar.c:42): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:50): No description found for parameter
'safe_map'
4 warnings
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 58790d4..7d4db07 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -23,11 +23,13 @@
#define IRQ_SKIP -3
#define GIC_IRQ_START 32
-/*
+/**
+ * struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
+ * @write: register write function pointer
*/
struct crossbar_device {
uint int_max;
@@ -39,9 +41,10 @@ struct crossbar_device {
};
/**
- * struct crossbar_data: Platform specific data
+ * struct crossbar_data - Platform specific data
* @irqs_unused: array of irqs that cannot be used because of hw erratas
* @size: size of the irqs_unused array
+ * @safe_map: safe value to write to crossbar register
*/
struct crossbar_data {
const uint *irqs_unused;
--
1.7.9.5
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[PATCH 05/14] irqchip: crossbar: DRA7: Fix unused crossbar list
From: Rajendra Nayak rna...@ti.com
On DRA7 compatible IRQ crossbar, IRQ 10 default mapped to L3_APP_IRQ,
IRQ133 is default mapped to NMI pin, 139 and 140 crossbars are
unused(not routed). Mark these as unused crossbar IRQs.
Technical Reference Manual documentation update expected
DRA72x-TRMINC00067 is being used to track the update.
Reported-by: Nishanth Menon n...@ti.com
Reported-by: Sricharan R r.sricha...@ti.com
Reported-by: Suman Anna s-a...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 7d4db07..42a2e62 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -253,8 +253,8 @@ err1:
return -ENOMEM;
}
-/* irq number 10 cannot be used because of hw bug */
-static int dra_irqs_unused[] = { 10 };
+/* irq number 10,133,139 and 140 cannot be used because of hw bug */
+static int dra_irqs_unused[] = { 10 , 133, 139, 140 };
static struct crossbar_data cb_dra_data = { dra_irqs_unused,
ARRAY_SIZE(dra_irqs_unused), 0 };
--
1.7.9.5
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[PATCH 07/14] irqchip: crossbar: return proper error value
From: Nishanth Menon n...@ti.com
crossbar_of_init always returns -ENOMEM in case of errors, return proper
error results in case of failures.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index fea3e5d..524e6e9 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -140,20 +140,26 @@ static const struct irq_domain_ops
routable_irq_domain_ops = {
static int __init crossbar_of_init(struct device_node *node,
const struct crossbar_data *data)
{
- int i, size, max, reserved = 0, entry, safe_map;
+ int i, size, max = 0, reserved = 0, entry, safe_map;
const __be32 *irqsr;
const int *irqsk = NULL;
+ int ret = -ENOMEM;
cb = kzalloc(sizeof(*cb), GFP_KERNEL);
if (!cb)
- return -ENOMEM;
+ return ret;
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
goto err1;
of_property_read_u32(node, ti,max-irqs, max);
+ if (!max) {
+ pr_err(missing 'ti,max-irqs' property\n);
+ ret = -EINVAL;
+ goto err2;
+ }
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
goto err2;
@@ -174,6 +180,7 @@ static int __init crossbar_of_init(struct device_node *node,
i, entry);
if (entry max) {
pr_err(Invalid reserved entry\n);
+ ret = -EINVAL;
goto err3;
}
cb-irq_map[entry] = IRQ_RESERVED;
@@ -198,6 +205,7 @@ static int __init crossbar_of_init(struct device_node *node,
break;
default:
pr_err(Invalid reg-size property\n);
+ ret = -EINVAL;
goto err4;
break;
}
@@ -225,6 +233,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
+ ret = -EINVAL;
goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
@@ -250,7 +259,7 @@ err2:
iounmap(cb-crossbar_base);
err1:
kfree(cb);
- return -ENOMEM;
+ return ret;
}
/* irq number 10,133,139 and 140 cannot be used because of hw bug */
--
1.7.9.5
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[PATCH 08/14] irqchip: crossbar: change the goto naming
From: Nishanth Menon n...@ti.com
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 524e6e9..cf0d79f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -152,17 +152,17 @@ static int __init crossbar_of_init(struct device_node
*node,
cb-crossbar_base = of_iomap(node, 0);
if (!cb-crossbar_base)
- goto err1;
+ goto err_cb;
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
ret = -EINVAL;
- goto err2;
+ goto err_base;
}
cb-irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-irq_map)
- goto err2;
+ goto err_base;
cb-int_max = max;
@@ -181,7 +181,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid reserved entry\n);
ret = -EINVAL;
- goto err3;
+ goto err_irq_map;
}
cb-irq_map[entry] = IRQ_RESERVED;
}
@@ -189,7 +189,7 @@ static int __init crossbar_of_init(struct device_node *node,
cb-register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
if (!cb-register_offsets)
- goto err3;
+ goto err_irq_map;
of_property_read_u32(node, ti,reg-size, size);
@@ -206,7 +206,7 @@ static int __init crossbar_of_init(struct device_node *node,
default:
pr_err(Invalid reg-size property\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
break;
}
@@ -234,7 +234,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
ret = -EINVAL;
- goto err4;
+ goto err_reg_offset;
}
cb-irq_map[entry] = IRQ_SKIP;
}
@@ -251,13 +251,13 @@ static int __init crossbar_of_init(struct device_node
*node,
register_routable_domain_ops(routable_irq_domain_ops);
return 0;
-err4:
+err_reg_offset:
kfree(cb-register_offsets);
-err3:
+err_irq_map:
kfree(cb-irq_map);
-err2:
+err_base:
iounmap(cb-crossbar_base);
-err1:
+err_cb:
kfree(cb);
return ret;
}
--
1.7.9.5
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[PATCH 06/14] irqchip: crossbar: fix memory leak incase of invalid entry
From: Nishanth Menon n...@ti.com
When the provided unused skip list entry is greater than max irqs
possible, we go to err3, but we fail to free register_offsets,
should have returned to err4 instead which ensures that allocated
register_offsets are freed as well.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 42a2e62..fea3e5d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -225,7 +225,7 @@ static int __init crossbar_of_init(struct device_node *node,
if (entry max) {
pr_err(Invalid skip entry\n);
- goto err3;
+ goto err4;
}
cb-irq_map[entry] = IRQ_SKIP;
}
--
1.7.9.5
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[PATCH 14/14] irqchip: crossbar allow for quirky hardware with direct hardwiring of GIC
From: Nishanth Menon n...@ti.com
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.
Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 816d11b..7476d9b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -35,8 +35,10 @@ Documentation/devicetree/bindings/arm/gic.txt for further
details.
An interrupt consumer on an SoC using crossbar will use:
interrupts = GIC_SPI request_number interrupt_level
-request number shall be between 0 to that described by
-ti,max-crossbar-sources
+When the request number is between 0 to that described by
+ti,max-crossbar-sources, it is assumed to be a crossbar mapping. If the
+request_number is greater than ti,max-crossbar-sources, then it is mapped as
a
+quirky hardware mapping direct to GIC.
Example:
device_x@0x4a023000 {
@@ -44,3 +46,9 @@ Example:
interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
...
};
+
+ device_y@0x4a033000 {
+ /* Direct mapped GIC SPI 1 used */
+ interrupts = GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 745ad0a..2b61bbb 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -98,8 +98,13 @@ static inline int allocate_free_irq(int cb_no)
static inline bool needs_crossbar_write(irq_hw_number_t hw)
{
- if (hw GIC_IRQ_START)
- return true;
+ int cb_no;
+
+ if (hw GIC_IRQ_START) {
+ cb_no = cb-irq_map[hw - GIC_IRQ_START];
+ if (cb_no != IRQ_RESERVED cb_no != IRQ_SKIP)
+ return true;
+ }
return false;
}
@@ -139,8 +144,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
{
int ret;
int req_num = intspec[1];
+ int direct_map_num;
if (req_num = cb-max_crossbar_sources) {
+ direct_map_num = req_num - cb-max_crossbar_sources;
+ if (direct_map_num cb-int_max) {
+ ret = cb-irq_map[direct_map_num];
+ if (ret == IRQ_RESERVED || ret == IRQ_SKIP) {
+ /* We use the interrupt num as h/w irq num */
+ ret = direct_map_num;
+ goto found;
+ }
+ }
+
pr_err(%s: requested crossbar number %d max %d\n,
__func__, req_num, cb-max_crossbar_sources);
return -EINVAL;
--
1.7.9.5
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[PATCH 13/14] Documentation: dt: OMAP: crossbar: add description for interrupt consumer
From: Nishanth Menon n...@ti.com
The current crossbar description does not include the description
required for the consumer of the crossbar, a.k.a devices whoes events
pass through the crossbar into the GIC interrupt controller.
So, provide documentation for the same.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 6d2e2f5..816d11b 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -27,3 +27,20 @@ Examples:
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
+
+Consumer:
+
+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
+Documentation/devicetree/bindings/arm/gic.txt for further details.
+
+An interrupt consumer on an SoC using crossbar will use:
+ interrupts = GIC_SPI request_number interrupt_level
+request number shall be between 0 to that described by
+ti,max-crossbar-sources
+
+Example:
+ device_x@0x4a023000 {
+ /* Crossbar 8 used */
+ interrupts = GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH;
+ ...
+ };
--
1.7.9.5
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[PATCH 12/14] irqchip: crossbar: introduce centralized check for crossbar write
From: Nishanth Menon n...@ti.com
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon n...@ti.com
---
drivers/irqchip/irq-crossbar.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index cf69c4d..745ad0a 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -96,10 +96,20 @@ static inline int allocate_free_irq(int cb_no)
return -ENODEV;
}
+static inline bool needs_crossbar_write(irq_hw_number_t hw)
+{
+ if (hw GIC_IRQ_START)
+ return true;
+
+ return false;
+}
+
static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
- cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+ if (needs_crossbar_write(hw))
+ cb-write(hw - GIC_IRQ_START, cb-irq_map[hw - GIC_IRQ_START]);
+
return 0;
}
@@ -117,7 +127,7 @@ static void crossbar_domain_unmap(struct irq_domain *d,
unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
- if (hw GIC_IRQ_START)
+ if (needs_crossbar_write(hw))
cb-irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
}
--
1.7.9.5
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[PATCH 11/14] irqchip: crossbar: introduce ti,max-crossbar-sources to identify valid crossbar mapping
From: Nishanth Menon n...@ti.com
Currently we attempt to map any crossbar value to an IRQ, however,
this is not correct from hardware perspective. There is a max crossbar
event number upto which hardware supports. So describe the same in
device tree using 'ti,max-crossbar-sources' property and use it to
validate requests.
Signed-off-by: Nishanth Menon n...@ti.com
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index fb88585..6d2e2f5 100644
--- a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
+++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be ti,irq-crossbar
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
+- ti,max-crossbar-sources: Maximum number of crossbar sources that can be
routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -22,6 +23,7 @@ Examples:
compatible = ti,irq-crossbar;
reg = 0x4a002a48 0x130;
ti,max-irqs = 160;
+ ti,max-crossbar-sources = 400;
ti,reg-size = 2;
ti,irqs-reserved = 0 1 2 3 5 6 131 132 139 140;
};
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 2a73a66..cf69c4d 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -26,6 +26,7 @@
/**
* struct crossbar_device - crossbar device descriptio
* @int_max: maximum number of supported interrupts
+ * @max_crossbar_sources: Maximum number of crossbar sources
* @irq_map: array of interrupts to crossbar number mapping
* @crossbar_base: crossbar base address
* @register_offsets: offsets for each irq number
@@ -33,6 +34,7 @@
*/
struct crossbar_device {
uint int_max;
+ uint max_crossbar_sources;
uint *irq_map;
void __iomem *crossbar_base;
int *register_offsets;
@@ -126,12 +128,19 @@ static int crossbar_domain_xlate(struct irq_domain *d,
unsigned int *out_type)
{
int ret;
+ int req_num = intspec[1];
- ret = get_prev_map_irq(intspec[1]);
+ if (req_num = cb-max_crossbar_sources) {
+ pr_err(%s: requested crossbar number %d max %d\n,
+ __func__, req_num, cb-max_crossbar_sources);
+ return -EINVAL;
+ }
+
+ ret = get_prev_map_irq(req_num);
if (ret = 0)
goto found;
- ret = allocate_free_irq(intspec[1]);
+ ret = allocate_free_irq(req_num);
if (ret 0)
return ret;
@@ -164,6 +173,14 @@ static int __init crossbar_of_init(struct device_node
*node,
if (!cb-crossbar_base)
goto err_cb;
+ of_property_read_u32(node, ti,max-crossbar-sources,
+cb-max_crossbar_sources);
+ if (!cb-max_crossbar_sources) {
+ pr_err(missing 'ti,max-crossbar-sources' property\n);
+ ret = -EINVAL;
+ goto err_base;
+ }
+
of_property_read_u32(node, ti,max-irqs, max);
if (!max) {
pr_err(missing 'ti,max-irqs' property\n);
--
1.7.9.5
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[PATCH 10/14] irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
The crossbar_domain_map/unmap callbacks need not be called same number
of times for a particular irq. But still use counting is not needed
here, because unmap(irq) gets called when irq_desc(irq) is disposed.
After this the irq is anyways unusable and have to mapped again.
Adding the above kerneldoc for unmap callback clarity.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
drivers/irqchip/irq-crossbar.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5f3e75a..2a73a66 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -101,6 +101,16 @@ static int crossbar_domain_map(struct irq_domain *d,
unsigned int irq,
return 0;
}
+/**
+ * crossbar_domain_unmap - unmap a crossbar-irq connection
+ * @d: domain of irq to unmap
+ * @irq: virq number
+ *
+ * The map/unmap callbacks need not be called same number of times for
+ * a particular irq. But still use counting is not needed here, because
+ * unmap(irq) gets called when irq_desc(irq) is disposed. After this the
+ * irq is anyways unusuable and have to be mapped again.
+ */
static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
{
irq_hw_number_t hw = irq_get_irq_data(irq)-hwirq;
--
1.7.9.5
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[PATCH 09/14] irqchip: crossbar: set cb pointer to null in case of error
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R r.sricha...@ti.com --- drivers/irqchip/irq-crossbar.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index cf0d79f..5f3e75a 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -259,6 +259,8 @@ err_base: iounmap(cb-crossbar_base); err_cb: kfree(cb); + + cb = NULL; return ret; } -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
