RE: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-06-28 Thread Hiremath, Vaibhav 
On Sat, Apr 28, 2012 at 07:04:38, Paul Walmsley wrote:
 On Fri, 17 Feb 2012, Vaibhav Hiremath wrote:
 
  In case of AM33xx family of devices (like cpsw) have different sysc
  bit field offsets defined,
  
  sysc_type3:
  |  3 2  |  10  |
  | STDBYMODE | IDLEMODE |
  
  So introduce new sysc_type3 in omap_hwmod common data.
  
  Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
  Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
 
 Thanks, queued for 3.5.
 

We missed this patch last time, can you pleas make sure to include it this 
time.

Thanks,
Vaibhav
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Re: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-06-28 Thread Vaibhav Hiremath 


On 6/28/2012 8:10 PM, Hiremath, Vaibhav wrote:
 On Sat, Apr 28, 2012 at 07:04:38, Paul Walmsley wrote:
 On Fri, 17 Feb 2012, Vaibhav Hiremath wrote:

 In case of AM33xx family of devices (like cpsw) have different sysc
 bit field offsets defined,

 sysc_type3:
 |  3 2  |  10  |
 | STDBYMODE | IDLEMODE |

 So introduce new sysc_type3 in omap_hwmod common data.

 Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
 Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com

 Thanks, queued for 3.5.

 
 We missed this patch last time, can you pleas make sure to include it this 
 time.
 

Another patch which got missed from your last pull-request is,

ARM: OMAP3/4: omap_hwmod:Add rstst_off field to struct omap_hwmod_omap4_prcm


Can you please add it to your pull request?

Thanks,
Vaibhav
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Re: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-04-27 Thread Paul Walmsley 
On Fri, 17 Feb 2012, Vaibhav Hiremath wrote:

 In case of AM33xx family of devices (like cpsw) have different sysc
 bit field offsets defined,
 
 sysc_type3:
 |  3 2  |  10  |
 | STDBYMODE | IDLEMODE |
 
 So introduce new sysc_type3 in omap_hwmod common data.
 
 Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
 Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com

Thanks, queued for 3.5.


- Paul
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RE: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-03-12 Thread Hiremath, Vaibhav 
On Tue, Feb 21, 2012 at 10:49:47, Bedia, Vaibhav wrote:
 Hi Benoit,
 
 On Fri, Feb 17, 2012 at 18:51:35, Cousson, Benoit wrote:
  Hi Vaibhav,
  
  On 2/17/2012 1:24 PM, Vaibhav Hiremath wrote:
   In case of AM33xx family of devices (like cpsw) have different sysc
   bit field offsets defined,
  
  It is really used by several IPs, or it is just an unique exception?
  
  For an exception, you can just define the omap_hwmod_sysc_fields for 
  that IP.
  This is what SmartReflex is using for example.
  
 
 I haven't really check TI81xx code but we might need to share these SYSC types
 with a few IPs in that family also. How can the sharing of the sysc data be 
 handled?
 

Benoit,

Any comments on this patch? 

Thanks,
Vaibhav

 Regards,
 Vaibhav B.
 

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RE: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-02-20 Thread Bedia, Vaibhav 
Hi Benoit,

On Fri, Feb 17, 2012 at 18:51:35, Cousson, Benoit wrote:
 Hi Vaibhav,
 
 On 2/17/2012 1:24 PM, Vaibhav Hiremath wrote:
  In case of AM33xx family of devices (like cpsw) have different sysc
  bit field offsets defined,
 
 It is really used by several IPs, or it is just an unique exception?
 
 For an exception, you can just define the omap_hwmod_sysc_fields for 
 that IP.
 This is what SmartReflex is using for example.
 

I haven't really check TI81xx code but we might need to share these SYSC types
with a few IPs in that family also. How can the sharing of the sysc data be 
handled?

Regards,
Vaibhav B.
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[PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-02-17 Thread Vaibhav Hiremath 
In case of AM33xx family of devices (like cpsw) have different sysc
bit field offsets defined,

sysc_type3:
|  3 2  |  10  |
| STDBYMODE | IDLEMODE |

So introduce new sysc_type3 in omap_hwmod common data.

Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Vaibhav Bedia vaibhav.be...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_common_data.c |9 +
 arch/arm/plat-omap/include/plat/omap_hwmod.h |   10 ++
 2 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c 
b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 51e5418..6dd922e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,6 +49,15 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
 };
 
+/**
+ * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme.
+ * Used by some IPs on AM33xx
+ */
+struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3 = {
+   .midle_shift= SYSC_TYPE3_MIDLEMODE_SHIFT,
+   .sidle_shift= SYSC_TYPE3_SIDLEMODE_SHIFT,
+};
+
 struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
.manager_count  = 2,
.has_framedonetv_irq= 0
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h 
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 9db27aa..3128364 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -41,6 +41,7 @@ struct omap_device;
 
 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
+extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
 
 /*
  * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -70,6 +71,15 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
 #define SYSC_TYPE2_MIDLEMODE_MASK  (0x3  SYSC_TYPE2_MIDLEMODE_SHIFT)
 
+/*
+ * OCP SYSCONFIG bit shifts/masks TYPE3.
+ * This is applicable for some IPs present in AM33XX
+ */
+#define SYSC_TYPE3_SIDLEMODE_SHIFT 0
+#define SYSC_TYPE3_SIDLEMODE_MASK  (0x3  SYSC_TYPE3_SIDLEMODE_SHIFT)
+#define SYSC_TYPE3_MIDLEMODE_SHIFT 2
+#define SYSC_TYPE3_MIDLEMODE_MASK  (0x3  SYSC_TYPE3_MIDLEMODE_SHIFT)
+
 /* OCP SYSSTATUS bit shifts/masks */
 #define SYSS_RESETDONE_SHIFT   0
 #define SYSS_RESETDONE_MASK(1  SYSS_RESETDONE_SHIFT)
-- 
1.7.0.4

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Re: [PATCH] ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx

2012-02-17 Thread Cousson, Benoit 

Hi Vaibhav,

On 2/17/2012 1:24 PM, Vaibhav Hiremath wrote:

In case of AM33xx family of devices (like cpsw) have different sysc
bit field offsets defined,


It is really used by several IPs, or it is just an unique exception?

For an exception, you can just define the omap_hwmod_sysc_fields for 
that IP.

This is what SmartReflex is using for example.

Regards,
Benoit



sysc_type3:
|  3 2  |  10  |
| STDBYMODE | IDLEMODE |

So introduce new sysc_type3 in omap_hwmod common data.

Signed-off-by: Vaibhav Hiremathhvaib...@ti.com
Signed-off-by: Vaibhav Bediavaibhav.be...@ti.com
---
  arch/arm/mach-omap2/omap_hwmod_common_data.c |9 +
  arch/arm/plat-omap/include/plat/omap_hwmod.h |   10 ++
  2 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c 
b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index 51e5418..6dd922e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,6 +49,15 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
  };

+/**
+ * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme.
+ * Used by some IPs on AM33xx
+ */
+struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3 = {
+   .midle_shift= SYSC_TYPE3_MIDLEMODE_SHIFT,
+   .sidle_shift= SYSC_TYPE3_SIDLEMODE_SHIFT,
+};
+
  struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
.manager_count  = 2,
.has_framedonetv_irq= 0
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h 
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 9db27aa..3128364 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -41,6 +41,7 @@ struct omap_device;

  extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
  extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
+extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;

  /*
   * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -70,6 +71,15 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
  #define SYSC_TYPE2_MIDLEMODE_SHIFT4
  #define SYSC_TYPE2_MIDLEMODE_MASK (0x3  SYSC_TYPE2_MIDLEMODE_SHIFT)

+/*
+ * OCP SYSCONFIG bit shifts/masks TYPE3.
+ * This is applicable for some IPs present in AM33XX
+ */
+#define SYSC_TYPE3_SIDLEMODE_SHIFT 0
+#define SYSC_TYPE3_SIDLEMODE_MASK  (0x3  SYSC_TYPE3_SIDLEMODE_SHIFT)
+#define SYSC_TYPE3_MIDLEMODE_SHIFT 2
+#define SYSC_TYPE3_MIDLEMODE_MASK  (0x3  SYSC_TYPE3_MIDLEMODE_SHIFT)
+
  /* OCP SYSSTATUS bit shifts/masks */
  #define SYSS_RESETDONE_SHIFT  0
  #define SYSS_RESETDONE_MASK   (1  SYSS_RESETDONE_SHIFT)


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