Re: [PATCH] adding gpmc configuration functions, west bridge related
* Sutharsan Ramamoorthy sutharsan.ramamoor...@yahoo.com [110113 15:22]:
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-gpmc/arch/arm/mach-omap2/usb-cywb-pnand.c2011-01-12
12:37:23.154716913 -0800
...
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ u32 tmp32;
+
+ /*
+ * disable gpmc CS4 operation 1st
+ */
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+ * GPMC NAND data bus can be 8 or 16 bit wide
+ */
+ if (dbus16_enabled) {
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16));
+ } else {
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+ }
+
+ /*
+ * re-enable astoria CS operation on GPMC
+ */
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+}
This should be static, right?
+int cywb_pnand_platform_retime()
+{
+ u32 tmp32;
+ struct gpmc_timings timings;
+ int retval = 0;
+
+
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+
+ memset(timings, 0, sizeof(timings));
+
+ /* cs timing */
+ timings.cs_on = WB_GPMC_CS_T_O_N;
+ timings.cs_wr_off = WB_GPMC_BUSCYC_T;
+ timings.cs_rd_off = WB_GPMC_BUSCYC_T;
+
+ /* adv timing */
+ timings.adv_on = WB_GPMC_ADV_T_O_N;
+ timings.adv_rd_off = WB_GPMC_BUSCYC_T;
+ timings.adv_wr_off = WB_GPMC_BUSCYC_T;
+
+ /* oe timing */
+ timings.oe_on = WB_GPMC_OE_T_O_N;
+ timings.oe_off = WB_GPMC_OE_T_O_F_F;
+ timings.access = WB_GPMC_RD_T_A_C_C;
+ timings.rd_cycle = WB_GPMC_BUSCYC_T;
+
+ /* we timing */
+ timings.we_on = WB_GPMC_WE_T_O_N;
+ timings.we_off = WB_GPMC_WE_T_O_F_F;
+ timings.wr_access = WB_GPMC_WR_T_A_C_C;
+ timings.wr_cycle = WB_GPMC_BUSCYC_T;
+
+ timings.page_burst_access = WB_GPMC_BUSCYC_T;
+ timings.wr_data_mux_bus = WB_GPMC_BUSCYC_T;
+ gpmc_cs_set_timings(AST_GPMC_CS, timings);
+
+ /*
+ * DISABLE cs4, NOTE GPMC REG7 is already configured
+ * at this point by gpmc_cs_request
+ */
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS, GPMC_CS_CONFIG7)
+ ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+ * PROGRAM chip select Region, (see OMAP3430 TRM PAGE 1088)
+ */
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (AS_CS_MASK | AS_CS_BADDR));
+
+ /*
+ * by default configure GPMC into 8 bit mode
+ * (to match astoria default mode)
+ */
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+
+ /*
+ * ENABLE astoria cs operation on GPMC
+ */
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+
+ return retval;
+
+}
+
+static struct cywb_platform_data cywb_plat = {
+ .retime = cywb_pnand_platform_retime,
+ .config_bus_width = cywb_gpmc_enable_16bit_bus,
+};
+
+static struct platform_device cywb_device = {
+ .name = west_bridge_dev,
+ .id = -1,
+ .dev = {
+ .platform_data = cywb_plat,
+ }
+};
+
+#ifdef CONFIG_WESTBRIDGE_ASTORIA
+void __init usb_cywb_init()
+{
+ if (platform_device_register(cywb_device) 0)
+ dev_err(cywb_device.dev, Unable to register cywb-astoria
device\n);
+}
+#else
+void __init usb_cywb_init()
+{
+}
+#endif /* CONFIG_WESTBRIDGE_ASTORIA */
Can you also move gpmc_cs_request to this file too?
Regards,
Tony
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[PATCH] adding gpmc configuration functions, west bridge related
This patch implements gpmc configuration functions needed by westbridge
device controller driver in staging tree. These functions currently
implemented in staging tree. This patch is part of the effort to bring
westbridge device controller driver out of staging tree.
Signed-off by: Sutharsan Ramamoorthy sutharsan.ramamoor...@yahoo.com
---
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/board-zoom-peripherals.c
linux-2.6.37-gpmc/arch/arm/mach-omap2/board-zoom-peripherals.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/board-zoom-peripherals.c
2010-11-29 20:42:04.0 -0800
+++ linux-2.6.37-gpmc/arch/arm/mach-omap2/board-zoom-peripherals.c
2011-01-11 13:33:20.750681000 -0800
@@ -19,6 +19,7 @@
#include linux/regulator/fixed.h
#include linux/wl12xx.h
#include linux/mmc/host.h
+#include linux/usb/cywb.h
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -348,6 +349,9 @@ void __init zoom_peripherals_init(void)
omap_i2c_init();
platform_device_register(omap_vwlan_device);
usb_musb_init(musb_board_data);
+#ifdef CONFIG_WESTBRIDGE_ASTORIA
+ usb_cywb_init();
+#endif
enable_board_wakeup_source();
omap_serial_init();
}
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile
linux-2.6.37-gpmc/arch/arm/mach-omap2/Makefile
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile 2010-11-29
20:42:04.0 -0800
+++ linux-2.6.37-gpmc/arch/arm/mach-omap2/Makefile 2010-12-28
15:24:28.218691000 -0800
@@ -182,6 +182,7 @@ obj-y += $(usbfs-m)
$(usbfs-y)
obj-y += usb-musb.o
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
obj-y += usb-ehci.o
+obj-$(CONFIG_WESTBRIDGE_ASTORIA)+= usb-cywb-pnand.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2):= gpmc-onenand.o
obj-y += $(onenand-m) $(onenand-y)
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c
linux-2.6.37-gpmc/arch/arm/mach-omap2/usb-cywb-pnand.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-gpmc/arch/arm/mach-omap2/usb-cywb-pnand.c 2011-01-12
12:37:23.154716913 -0800
@@ -0,0 +1,171 @@
+/*
+ * linux /arch/arm/mach-omap2/usb-cywb-pnand.c
+ *
+ * Copyright (C) 2010 Cypress Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/device.h
+#include linux/usb/cywb.h
+#include plat/gpmc.h
+
+/*
+ * chip select number on GPMC ( 0..7 )
+ */
+#define AST_GPMC_CS 4
+
+/*
+ * for use by gpmc_set_timings api, measured in ns, not clocks
+ */
+#define WB_GPMC_BUSCYC_T(7 * 6)
+#define WB_GPMC_CS_T_O_N(0)
+#define WB_GPMC_ADV_T_O_N (0)
+#define WB_GPMC_OE_T_O_N(0)
+#define WB_GPMC_OE_T_O_F_F (5 * 6)
+#define WB_GPMC_WE_T_O_N(1 * 6)
+#define WB_GPMC_WE_T_O_F_F (5 * 6)
+#define WB_GPMC_RDS_ADJ (2 * 6)
+#define WB_GPMC_RD_T_A_C_C (WB_GPMC_OE_T_O_F_F + WB_GPMC_RDS_ADJ)
+#define WB_GPMC_WR_T_A_C_C (WB_GPMC_BUSCYC_T)
+
+#define AS_CS_MASK (0X7 8)
+#define AS_CS_BADDR 0x02
+#define CSVALID_B (1 6)
+
+#define BLKSZ_4K 0x1000
+
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ u32 tmp32;
+
+ /*
+* disable gpmc CS4 operation 1st
+*/
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+* GPMC NAND data bus can be 8 or 16 bit wide
+*/
+ if (dbus16_enabled) {
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16));
+ } else {
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+ }
+
+ /*
+* re-enable astoria CS operation on GPMC
+*/
+gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+}
+
+int cywb_pnand_platform_retime()
+{
+ u32 tmp32;
+ struct gpmc_timings timings;
+ int retval = 0;
+
+
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+
+
Re: [PATCH] adding gpmc configuration functions, west bridge related
On Wed, Jan 12, 2011 at 12:56:44PM -0800, Sutharsan Ramamoorthy wrote: This patch implements gpmc configuration functions. Why? These gpmc functions are used by westbridge device controller driver in staging tree to configure gpmc timings and bus width. How does the driver live today without these functions? And as this is a staging driver, any way to just leave the functions in the staging driver for now, as there are lots of other things that need to be done to this driver before it can be moved out of the staging tree. Or is this one of those things? This patch has been compiled in linux-2.6.37-rc4 This line isn't needed. You also forgot the line: This patch is corrupted by my email client and can not be applied or built properly. :( New files: 1. ../arch/arm/mach-omap2/usb-cywb-pnand.c 2. ../include/linux/usb/cywb.h Modified files: 1. ../arch/arm/mach-omap2/board-zoom-peripherals.c 2. ../arch/arm/mach-omap2/Makefile 3. ../drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c 4. ../drivers/staging/westbridge/astoria/arch/arm/plat-omap/include/mach/westbridge/westbridge-omap3-pnand-hal/cyashalomap_kernel.h 5. ../drivers/staging/westbridge/astoria/device/cyasdevice.c What is this? We know what has been added and modified by virtue of the patch itself. Please use 'git format-patch' to create a patch that includes the diffstat in it automatically, if you want to show that (which you should.) Signed-off by: Sutharsan Ramamoorthy s...@cypress.com This differs from your From: line in your email. If you want to properly attribute the patch's author, please read Documentation/SubmittingPatches to do that. Care to try it again? thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] adding gpmc configuration functions, west bridge related
On Wed, Jan 12, 2011 at 12:56:44PM -0800, Sutharsan Ramamoorthy wrote: This patch implements gpmc configuration functions. snip Oh, and you also sent your email in html format, which caused the mailing lists to reject it. Please fix this as well. thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] adding gpmc configuration functions, west bridge related
* Sutharsan R sutharsan@gmail.com [101220 18:41]: This patch adds and exports gpmc configuration functions. 'gpmc' configuration functions will be used by westbridge device controller driver in staging tree. This patch is part of the work to get westbridge device controller driver out of staging tree. Looks good in general.. +EXPORT_SYMBOL(cywb_pnand_platform_retime); But this you should not need. I know tusb6010 is still doing that, but you can pass it in the platform_data and then there's no need to export it. Then in your driver you can do: if (x-retime) x-retime(123); That way the driver will stay generic. The set_power functions are doing that in drivers/usb/musb if you need examples. Also, this will need a slight update based on Adrian Hunter's patch OMAP2/3: GPMC: put sync_clk value in picoseconds instead of nanosecond that I'll be queuing. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] adding gpmc configuration functions, west bridge related
This patch adds and exports gpmc configuration functions.
'gpmc' configuration functions will be used by
westbridge device controller driver in staging tree.
This patch is part of the work to get westbridge device controller driver
out of staging tree.
Signed-off-by: Sutharsan Ramamoorthy s...@cypress.com
---
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile
linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile 2010-11-29
20:42:04.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile 2010-12-13
16:04:08.378446603 -0800
@@ -182,6 +182,7 @@ obj-y += $(usbfs-m)
$(usbfs-y)
obj-y += usb-musb.o
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
obj-y += usb-ehci.o
+obj-$(CONFIG_WESTBRIDGE_ASTORIA)+= usb-cywb-pnand.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2):= gpmc-onenand.o
obj-y += $(onenand-m) $(onenand-y)
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c
linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c 2010-12-20
17:33:23.822251855 -0800
@@ -0,0 +1,170 @@
+/*
+ * linux /arch/arm/mach-omap2/usb-cywb-pnand.c
+ *
+ * Copyright (C) 2010 Cypress Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License.
+ */
+
+#include linux/module.h
+
+#include plat/gpmc.h
+
+/*
+ * chip select number on GPMC ( 0..7 )
+ */
+#define AST_GPMC_CS 4
+
+/*
+ * for use by gpmc_set_timings api, measured in ns, not clocks
+ */
+#define WB_GPMC_BUSCYC_t(7 * 6)
+#define WB_GPMC_CS_t_o_n(0)
+#define WB_GPMC_ADV_t_o_n (0)
+#define WB_GPMC_OE_t_o_n(0)
+#define WB_GPMC_OE_t_o_f_f (5 * 6)
+#define WB_GPMC_WE_t_o_n(1 * 6)
+#define WB_GPMC_WE_t_o_f_f (5 * 6)
+#define WB_GPMC_RDS_ADJ (2 * 6)
+#define WB_GPMC_RD_t_a_c_c (WB_GPMC_OE_t_o_f_f + WB_GPMC_RDS_ADJ)
+#define WB_GPMC_WR_t_a_c_c (WB_GPMC_BUSCYC_t)
+
+#define GPMC_16BIT_MODE 0
+#define GPMC_RETIME 1
+
+/*
+ * GPMC_CONFIG7[cs] register bit fields
+ * AS_CS_MASK - 3 bit mask for A26,A25,A24,
+ * AS_CS_BADDR - 6 BIT VALUE A29 ...A24
+ * CSVALID_B - CSVALID bit on GPMC_CONFIG7[cs] register
+ */
+#define AS_CS_MASK (0X7 8)
+#define AS_CS_BADDR 0x02
+#define CSVALID_B (1 6)
+
+#define BLKSZ_4K 0x1000
+
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ u32 tmp32;
+
+ /*
+* disable gpmc CS4 operation 1st
+*/
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+* GPMC NAND data bus can be 8 or 16 bit wide
+*/
+ if (dbus16_enabled) {
+ dev_dbg(KERN_INFO gpmc: enabling 16 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16));
+ } else {
+ dev_dbg(KERN_INFO gpmc: enabling 8 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+ }
+
+ /*
+* re-enable astoria CS operation on GPMC
+*/
+gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+}
+
+int cywb_pnand_platform_retime(int action, bool dbus16_enabled)
+{
+ u32 tmp32;
+ struct gpmc_timings timings;
+ int retval;
+
+ switch (action) {
+
+ case GPMC_16BIT_MODE:
+ cywb_gpmc_enable_16bit_bus(dbus16_enabled);
+ retval = 0;
+ break;
+ case GPMC_RETIME:
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+
+ memset(timings, 0, sizeof(timings));
+
+ /* cs timing */
+ timings.cs_on = WB_GPMC_CS_t_o_n;
+ timings.cs_wr_off = WB_GPMC_BUSCYC_t;
+ timings.cs_rd_off = WB_GPMC_BUSCYC_t;
+
+ /* adv timing */
+ timings.adv_on = WB_GPMC_ADV_t_o_n;
+ timings.adv_rd_off =
Re: [PATCH] adding gpmc configuration functions, west bridge related
On Mon, Dec 20, 2010 at 06:42:06PM -0800, Sutharsan R wrote:
This patch adds and exports gpmc configuration functions.
'gpmc' configuration functions will be used by
westbridge device controller driver in staging tree.
This patch is part of the work to get westbridge device controller driver
out of staging tree.
Signed-off-by: Sutharsan Ramamoorthy s...@cypress.com
---
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile
linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile 2010-11-29
20:42:04.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile2010-12-13
16:04:08.378446603 -0800
Your patch is linewrapped :(
@@ -182,6 +182,7 @@ obj-y += $(usbfs-m)
$(usbfs-y)
obj-y+= usb-musb.o
obj-$(CONFIG_MACH_OMAP2_TUSB6010)+= usb-tusb6010.o
obj-y+= usb-ehci.o
+obj-$(CONFIG_WESTBRIDGE_ASTORIA)+= usb-cywb-pnand.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
obj-y+= $(onenand-m) $(onenand-y)
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c
linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c2010-12-20
17:33:23.822251855 -0800
@@ -0,0 +1,170 @@
+/*
+ * linux /arch/arm/mach-omap2/usb-cywb-pnand.c
+ *
+ * Copyright (C) 2010 Cypress Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License.
Either, or what?
+ */
+
+#include linux/module.h
+
+#include plat/gpmc.h
Why the extra lines inbetween the #includes?
+
+/*
+ * chip select number on GPMC ( 0..7 )
+ */
+#define AST_GPMC_CS 4
+
+/*
+ * for use by gpmc_set_timings api, measured in ns, not clocks
+ */
+#define WB_GPMC_BUSCYC_t(7 * 6)
What's with the lowercase values in #defines?
+#define WB_GPMC_CS_t_o_n(0)
+#define WB_GPMC_ADV_t_o_n (0)
+#define WB_GPMC_OE_t_o_n(0)
+#define WB_GPMC_OE_t_o_f_f (5 * 6)
+#define WB_GPMC_WE_t_o_n(1 * 6)
+#define WB_GPMC_WE_t_o_f_f (5 * 6)
+#define WB_GPMC_RDS_ADJ (2 * 6)
+#define WB_GPMC_RD_t_a_c_c (WB_GPMC_OE_t_o_f_f + WB_GPMC_RDS_ADJ)
+#define WB_GPMC_WR_t_a_c_c (WB_GPMC_BUSCYC_t)
+
+#define GPMC_16BIT_MODE 0
+#define GPMC_RETIME 1
+
+/*
+ * GPMC_CONFIG7[cs] register bit fields
+ * AS_CS_MASK - 3 bit mask for A26,A25,A24,
+ * AS_CS_BADDR - 6 BIT VALUE A29 ...A24
+ * CSVALID_B - CSVALID bit on GPMC_CONFIG7[cs] register
+ */
+#define AS_CS_MASK (0X7 8)
+#define AS_CS_BADDR 0x02
+#define CSVALID_B (1 6)
+
+#define BLKSZ_4K 0x1000
+
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ u32 tmp32;
+
+ /*
+ * disable gpmc CS4 operation 1st
+ */
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+ * GPMC NAND data bus can be 8 or 16 bit wide
+ */
+ if (dbus16_enabled) {
+ dev_dbg(KERN_INFO gpmc: enabling 16 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16));
+ } else {
+ dev_dbg(KERN_INFO gpmc: enabling 8 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+ }
+
+ /*
+ * re-enable astoria CS operation on GPMC
+ */
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+}
+
+int cywb_pnand_platform_retime(int action, bool dbus16_enabled)
+{
+ u32 tmp32;
+ struct gpmc_timings timings;
+ int retval;
Set retval to 0 first, then you don't have to set it for when things go
right, only when things go wrong.
+
+ switch (action) {
+
+ case GPMC_16BIT_MODE:
+ cywb_gpmc_enable_16bit_bus(dbus16_enabled);
+ retval = 0;
+ break;
+ case GPMC_RETIME:
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2)));
+
+
[PATCH] adding gpmc configuration functions, west bridge related
This patch adds and exports gpmc configuration functions.
'gpmc' configuration functions will be used by
westbridge device controller driver in staging tree.
This patch is required to get westbridge device controller driver
out of staging tree.
Signed-off-by: Sutharsan Ramamoorthy s...@cypress.com
---
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile
linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile 2010-11-29
20:42:04.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile 2010-12-13
16:04:08.378446603 -0800
@@ -182,6 +182,7 @@ obj-y += $(usbfs-m)
$(usbfs-y)
obj-y += usb-musb.o
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
obj-y += usb-ehci.o
+obj-$(CONFIG_WESTBRIDGE_ASTORIA)+= usb-cywb-pnand.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2):= gpmc-onenand.o
obj-y += $(onenand-m) $(onenand-y)
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c
linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c 2010-12-14
15:51:13.710787480 -0800
@@ -0,0 +1,182 @@
+/*
+ * linux /arch/arm/mach-omap2/usb-cywb-pnand.c
+ *
+ * Copyright (C) 2010 Cypress Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ */
+
+#include linux/module.h
+
+#include plat/gpmc.h
+
+/*
+ * chip select number on GPMC ( 0..7 )
+ */
+#define AST_GPMC_CS 4
+
+/*
+ * for use by gpmc_set_timings api, measured in ns, not clocks
+ */
+#define WB_GPMC_BUSCYC_t(7 * 6)
+#define WB_GPMC_CS_t_o_n(0)
+#define WB_GPMC_ADV_t_o_n (0)
+#define WB_GPMC_OE_t_o_n(0)
+#define WB_GPMC_OE_t_o_f_f (5 * 6)
+#define WB_GPMC_WE_t_o_n(1 * 6)
+#define WB_GPMC_WE_t_o_f_f (5 * 6)
+#define WB_GPMC_RDS_ADJ (2 * 6)
+#define WB_GPMC_RD_t_a_c_c (WB_GPMC_OE_t_o_f_f + WB_GPMC_RDS_ADJ)
+#define WB_GPMC_WR_t_a_c_c (WB_GPMC_BUSCYC_t)
+
+#define GPMC_16BIT_MODE 0
+#define GPMC_RETIME 1
+
+/*
+ * GPMC_CONFIG7[cs] register bit fields
+ * AS_CS_MASK - 3 bit mask for A26,A25,A24,
+ * AS_CS_BADDR - 6 BIT VALUE A29 ...A24
+ * CSVALID_B - CSVALID bit on GPMC_CONFIG7[cs] register
+ */
+#define AS_CS_MASK (0X7 8)
+#define AS_CS_BADDR 0x02
+#define CSVALID_B (1 6)
+
+#define BLKSZ_4K 0x1000
+
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ uint32_t tmp32;
+
+ /*
+* disable gpmc CS4 operation 1st
+*/
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+* GPMC NAND data bus can be 8 or 16 bit wide
+*/
+ if (dbus16_enabled) {
+ printk(KERN_INFO enabling 16 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16)
+ );
+ } else {
+ printk(KERN_INFO enabling 8 bit bus\n);
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2))
+ );
+ }
+
+ /*
+* re-enable astoria CS operation on GPMC
+*/
+gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7,
+ (tmp32 | GPMC_CONFIG7_CSVALID));
+}
+
+int cywb_pnand_platform_retime(int action, bool dbus16_enabled)
+{
+ u32 tmp32;
+ struct gpmc_timings timings;
+ int retval;
+
+ switch (action) {
+
+ case GPMC_16BIT_MODE:
+ cywb_gpmc_enable_16bit_bus(dbus16_enabled);
+ retval = 0;
+ break;
+ case GPMC_RETIME:
+
Re: [PATCH] adding gpmc configuration functions, west bridge related
On Thu, Dec 16, 2010 at 04:33:50PM -0800, Sutharsan wrote:
This patch adds and exports gpmc configuration functions.
'gpmc' configuration functions will be used by
westbridge device controller driver in staging tree.
This patch is required to get westbridge device controller driver
out of staging tree.
Well, it's one step to getting the code out, not the only thing :)
Signed-off-by: Sutharsan Ramamoorthy s...@cypress.com
---
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile
linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/Makefile 2010-11-29
20:42:04.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/Makefile2010-12-13
16:04:08.378446603 -0800
@@ -182,6 +182,7 @@ obj-y += $(usbfs-m)
$(usbfs-y)
obj-y+= usb-musb.o
obj-$(CONFIG_MACH_OMAP2_TUSB6010)+= usb-tusb6010.o
obj-y+= usb-ehci.o
+obj-$(CONFIG_WESTBRIDGE_ASTORIA)+= usb-cywb-pnand.o
onenand-$(CONFIG_MTD_ONENAND_OMAP2) := gpmc-onenand.o
obj-y+= $(onenand-m) $(onenand-y)
diff -uprN -X linux-2.6.37_vanilla/Documentation/dontdiff
linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c
linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c
--- linux-2.6.37_vanilla/arch/arm/mach-omap2/usb-cywb-pnand.c 1969-12-31
16:00:00.0 -0800
+++ linux-2.6.37-cywb/arch/arm/mach-omap2/usb-cywb-pnand.c2010-12-14
15:51:13.710787480 -0800
@@ -0,0 +1,182 @@
+/*
+ * linux /arch/arm/mach-omap2/usb-cywb-pnand.c
+ *
+ * Copyright (C) 2010 Cypress Semiconductor
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
Do you _really_ mean any later version? Are you aware of the issues
involved here?
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
These two paragraphs are not needed.
+ */
+
+#include linux/module.h
+
+#include plat/gpmc.h
+
+/*
+ * chip select number on GPMC ( 0..7 )
+ */
+#define AST_GPMC_CS 4
+
+/*
+ * for use by gpmc_set_timings api, measured in ns, not clocks
+ */
+#define WB_GPMC_BUSCYC_t(7 * 6)
+#define WB_GPMC_CS_t_o_n(0)
+#define WB_GPMC_ADV_t_o_n (0)
+#define WB_GPMC_OE_t_o_n(0)
+#define WB_GPMC_OE_t_o_f_f (5 * 6)
+#define WB_GPMC_WE_t_o_n(1 * 6)
+#define WB_GPMC_WE_t_o_f_f (5 * 6)
+#define WB_GPMC_RDS_ADJ (2 * 6)
+#define WB_GPMC_RD_t_a_c_c (WB_GPMC_OE_t_o_f_f + WB_GPMC_RDS_ADJ)
+#define WB_GPMC_WR_t_a_c_c (WB_GPMC_BUSCYC_t)
+
+#define GPMC_16BIT_MODE 0
+#define GPMC_RETIME 1
+
+/*
+ * GPMC_CONFIG7[cs] register bit fields
+ * AS_CS_MASK - 3 bit mask for A26,A25,A24,
+ * AS_CS_BADDR - 6 BIT VALUE A29 ...A24
+ * CSVALID_B - CSVALID bit on GPMC_CONFIG7[cs] register
+ */
+#define AS_CS_MASK (0X7 8)
+#define AS_CS_BADDR 0x02
+#define CSVALID_B (1 6)
+
+#define BLKSZ_4K 0x1000
+
+/*
+ * switch GPMC DATA bus mode
+ */
+void cywb_gpmc_enable_16bit_bus(bool dbus16_enabled)
+{
+ uint32_t tmp32;
Ick, please use the real types for the kernel (u32 in this case.)
+
+ /*
+ * disable gpmc CS4 operation 1st
+ */
+ tmp32 = gpmc_cs_read_reg(AST_GPMC_CS,
+ GPMC_CS_CONFIG7) ~GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG7, tmp32);
+
+ /*
+ * GPMC NAND data bus can be 8 or 16 bit wide
+ */
+ if (dbus16_enabled) {
+ printk(KERN_INFO enabling 16 bit bus\n);
Why print this for the whole world to see? Also, no prefix saying
exactly what code is printing this out? Is this even needed?
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2) |
+ GPMC_CONFIG1_DEVICESIZE_16)
+ );
Odd place to put a trailing ')' character.
+ } else {
+ printk(KERN_INFO enabling 8 bit bus\n);
Same as above.
+ gpmc_cs_write_reg(AST_GPMC_CS, GPMC_CS_CONFIG1,
+ (GPMC_CONFIG1_DEVICETYPE(2) |
+ GPMC_CONFIG1_WAIT_PIN_SEL(2))
+
