On 05/15/2014 07:48 AM, Sekhar Nori wrote:
On Thursday 15 May 2014 06:00 PM, Peter Ujfalusi wrote:
The second controller is not handled because in DT boot we only handle 1 cc
as
far as I know. I don't know why, but this is how the DT support has been
written and used.
Its just because
Hi Peter,
On Tuesday 13 May 2014 04:00 PM, Peter Ujfalusi wrote:
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ: NUM_EVQUE
Hi Sekhar,
On 05/15/2014 11:53 AM, Sekhar Nori wrote:
Hi Peter,
On Tuesday 13 May 2014 04:00 PM, Peter Ujfalusi wrote:
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots
On Thursday 15 May 2014 06:00 PM, Peter Ujfalusi wrote:
The second controller is not handled because in DT boot we only handle 1 cc as
far as I know. I don't know why, but this is how the DT support has been
written and used.
Its just because none of the platforms under heavy development use
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ: NUM_EVQUE
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
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