On Tue, Aug 26, 2014 at 04:17:58PM +0200, Tomasz Figa wrote:
Exynos4 SoCs equipped with an L2C-310 cache controller and running under
secure firmware require certain registers of aforementioned IP to be
accessed only from secure mode. This means that SMC calls are required
for certain register
+static void exynos_l2_write_sec(unsigned long val, unsigned reg)
+{
+switch (reg) {
+case L2X0_CTRL:
+if (val L2X0_CTRL_EN)
+exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);
If we're calling this with the cache already enabled, presumably you're
doing
Exynos4 SoCs equipped with an L2C-310 cache controller and running under
secure firmware require certain registers of aforementioned IP to be
accessed only from secure mode. This means that SMC calls are required
for certain register writes. To handle this, an implementation of
.write_sec and
