Hi Santosh,
On Sat, Jun 25, 2011 at 3:23 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On 6/24/2011 7:38 AM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
Since cpuidle is a CPU centric framework it decides the MPU
next power state based on the MPU exit_latency and
On 6/26/2011 11:53 PM, Jean Pihet wrote:
Hi Santosh,
On Sat, Jun 25, 2011 at 3:23 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On 6/24/2011 7:38 AM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
Since cpuidle is a CPU centric framework it decides the MPU
next
Santosh,
On Mon, Jun 27, 2011 at 4:11 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On 6/26/2011 11:53 PM, Jean Pihet wrote:
Hi Santosh,
On Sat, Jun 25, 2011 at 3:23 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On 6/24/2011 7:38 AM, jean.pi...@newoldbits.com wrote:
On 6/24/2011 7:38 AM, jean.pi...@newoldbits.com wrote:
From: Jean Pihetj-pi...@ti.com
Since cpuidle is a CPU centric framework it decides the MPU
next power state based on the MPU exit_latency and target_residency
figures.
The rest of the power domains get their next power state programmed
From: Jean Pihet j-pi...@ti.com
Since cpuidle is a CPU centric framework it decides the MPU
next power state based on the MPU exit_latency and target_residency
figures.
The rest of the power domains get their next power state programmed
from the PM_QOS_DEV_WAKEUP_LATENCY class of the PM QoS
