RE: patch: add omap730 / omap850 rtc support

2009-10-14 Thread G, Manjunath Kondaiah 
Christopher,

 -Original Message-
 From: linux-omap-ow...@vger.kernel.org 
 [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of 
 Christopher Friedt
 Sent: Tuesday, October 13, 2009 5:03 PM
 To: linux-omap@vger.kernel.org
 Subject: patch: add omap730 / omap850 rtc support
 
 Christopher Friedt chrisfri...@gmail.com
 20091013: Add support for the OMAP730 and OMAP850 RTC.
 ==
 
 diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
 index 0587d53..5163d67 100644
 --- a/drivers/rtc/rtc-omap.c
 +++ b/drivers/rtc/rtc-omap.c
 @@ -22,6 +22,7 @@
  #include linux/platform_device.h
 
  #include asm/io.h
 +#include mach/cpu.h
 
 
  /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
 @@ -39,29 +40,80 @@
 
  #define OMAP_RTC_BASE0xfffb4800
 
 -/* RTC registers */
 -#define OMAP_RTC_SECONDS_REG 0x00
 -#define OMAP_RTC_MINUTES_REG 0x04
 -#define OMAP_RTC_HOURS_REG   0x08
 -#define OMAP_RTC_DAYS_REG0x0C
 -#define OMAP_RTC_MONTHS_REG  0x10
 -#define OMAP_RTC_YEARS_REG   0x14
 -#define OMAP_RTC_WEEKS_REG   0x18
 -
 -#define OMAP_RTC_ALARM_SECONDS_REG   0x20
 -#define OMAP_RTC_ALARM_MINUTES_REG   0x24
 -#define OMAP_RTC_ALARM_HOURS_REG 0x28
 -#define OMAP_RTC_ALARM_DAYS_REG  0x2c
 -#define OMAP_RTC_ALARM_MONTHS_REG0x30
 -#define OMAP_RTC_ALARM_YEARS_REG 0x34
 -
 -#define OMAP_RTC_CTRL_REG0x40
 -#define OMAP_RTC_STATUS_REG  0x44
 -#define OMAP_RTC_INTERRUPTS_REG  0x48
 -
 -#define OMAP_RTC_COMP_LSB_REG0x4c
 -#define OMAP_RTC_COMP_MSB_REG0x50
 -#define OMAP_RTC_OSC_REG 0x54
 +enum omap_rtc_regs {
 + SECONDS_REG = 0,
 + MINUTES_REG,
 + HOURS_REG,
 + DAYS_REG,
 + MONTHS_REG,
 + YEARS_REG,
 + WEEKS_REG,
 + ALARM_SECONDS_REG,
 + ALARM_MINUTES_REG,
 + ALARM_HOURS_REG,
 + ALARM_DAYS_REG,
 + ALARM_MONTHS_REG,
 + ALARM_YEARS_REG,
 + CTRL_REG,
 + STATUS_REG,
 + INTERRUPTS_REG,
 + COMP_LSB_REG,
 + COMP_MSB_REG,
 +};
 +#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 +static u8 omap_8bit_rtc_offsets[] = {
 + [SECONDS_REG]   = 0x00,
 + [MINUTES_REG]   = 0x01,
 + [HOURS_REG] = 0x02,
 + [DAYS_REG]  = 0x03,
 + [MONTHS_REG]= 0x04,
 + [YEARS_REG] = 0x05,
 + [WEEKS_REG] = 0x06,
 + /* 0x07 reserved */
 + [ALARM_SECONDS_REG] = 0x08,
 + [ALARM_MINUTES_REG] = 0x09,
 + [ALARM_HOURS_REG]   = 0x0a,
 + [ALARM_DAYS_REG]= 0x0b,
 + [ALARM_MONTHS_REG]  = 0x0c,
 + [ALARM_YEARS_REG]   = 0x0d,
 + /* 0x0e reserved */
 + /* 0x0f reserved */
 + [CTRL_REG]  = 0x10,
 + [STATUS_REG]= 0x11,
 + [INTERRUPTS_REG]= 0x12,
 + [COMP_LSB_REG]  = 0x13,
 + [COMP_MSB_REG]  = 0x14,
 +};
 +#else
 +#define omap_8bit_rtc_offsets NULL
 +#endif
 +#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
 +static u8 omap_32bit_rtc_offsets[] = {
 + [SECONDS_REG]   = 0x00,
 + [MINUTES_REG]   = 0x04,
 + [HOURS_REG] = 0x08,
 + [DAYS_REG]  = 0x0c,
 + [MONTHS_REG]= 0x10,
 + [YEARS_REG] = 0x14,
 + [WEEKS_REG] = 0x18,
 + [ALARM_SECONDS_REG] = 0x20,
 + [ALARM_MINUTES_REG] = 0x24,
 + [ALARM_HOURS_REG]   = 0x28,
 + [ALARM_DAYS_REG]= 0x2c,
 + [ALARM_MONTHS_REG]  = 0x30,
 + [ALARM_YEARS_REG]   = 0x34,
 + [CTRL_REG]  = 0x40,
 + [STATUS_REG]= 0x44,
 + [INTERRUPTS_REG]= 0x48,
 + [COMP_LSB_REG]  = 0x4c,
 + [COMP_MSB_REG]  = 0x50,
 +};

Any advantage of using both enum and register offsets? 
You can have only register offset macros instead of enum.

 +#else
 +#define omap_32bit_rtc_offsets NULL
 +#endif
 +
 +// set to 32bit or 8bit rtc offsets by omap_rtc_probe()
 +static u8 *rtc_offsets;
 
  /* OMAP_RTC_CTRL_REG bit fields: */
  #define OMAP_RTC_CTRL_SPLIT  (17)
 @@ -87,10 +139,8 @@
  #define OMAP_RTC_INTERRUPTS_IT_ALARM(13)
  #define OMAP_RTC_INTERRUPTS_IT_TIMER(12)
 
 -
 -#define rtc_read(addr)   
 omap_readb(OMAP_RTC_BASE + (addr))
 -#define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
 -
 +#define rtc_read(reg)
 omap_readb(OMAP_RTC_BASE + rtc_offsets[reg])
 +#define rtc_write(val, reg)  omap_writeb(val, OMAP_RTC_BASE 
 + rtc_offsets[reg])

You may use omap_writeb(val, OMAP_RTC_BASE + OMAP_RTC_##reg) and 
omap_readb(OMAP_RTC_BASE+OMAP_RTC_##reg). 

 
  /* we rely on the rtc framework to handle locking (rtc-ops_lock),
   * so the only other requirement is that register accesses which

Re: patch: add omap730 / omap850 rtc support

2009-10-14 Thread Christopher Friedt 
On Wed, Oct 14, 2009 at 9:11 AM, G, Manjunath Kondaiah manj...@ti.com wrote:

 Any advantage of using both enum and register offsets?
 You can have only register offset macros instead of enum.

This was the appproach proposed by Tony in response to Alistair's
original query. Tony originally cited something from Russel for the
reason.

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg14918.html

If static #define's were used, then it would probably be impossible to
support multiple omap1 cpu's with the same binary driver / binary
kernel. Having a run-time cpu check (referencing static offset arrays)
makes this possible and in the worst case scenario, it adds ~20 bytes.
I guess if you really wanted to save those 20 bytes, then you could
check #ifdef OMAP1_MULTI or something like that.

 Why 50? Count can be decreased from 50 to 30/35 which will increase rtc 
 performance.

No idea, I didn't write the driver, I just patched it, and that is
completely irrelevent to my patch, but feel free to test 30/35 and
submit the changes back :)

C
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RE: patch: add omap730 / omap850 rtc support

2009-10-14 Thread G, Manjunath Kondaiah 
 On Wed, Oct 14, 2009 at 9:11 AM, G, Manjunath Kondaiah 
 manj...@ti.com wrote:
 
  Any advantage of using both enum and register offsets?
  You can have only register offset macros instead of enum.
 
 This was the appproach proposed by Tony in response to Alistair's
 original query. Tony originally cited something from Russel for the
 reason.
 
 http://www.mail-archive.com/linux-omap@vger.kernel.org/msg14918.html
 
 If static #define's were used, then it would probably be impossible to
 support multiple omap1 cpu's with the same binary driver / binary
 kernel. Having a run-time cpu check (referencing static offset arrays)
 makes this possible and in the worst case scenario, it adds ~20 bytes.
 I guess if you really wanted to save those 20 bytes, then you could
 check #ifdef OMAP1_MULTI or something like that.
 

You can acheive the same using only enum with following:

#define OMAP_RTC_REGISTER_SIZE (cpu_is_omap7xx()?1:4)
#define rtc_read(reg)
omap_readb(OMAP_RTC_BASE + (reg * OMAP_RTC_REGISTER_SIZE))

#define rtc_write(val, reg) 
omap_writeb(val, OMAP_RTC_BASE + (reg * OMAP_RTC_REGISTER_SIZE))

Russel point is different compared to your scenario. 

  Why 50? Count can be decreased from 50 to 30/35 which will 
 increase rtc performance.
 
 No idea, I didn't write the driver, I just patched it, and that is
 completely irrelevent to my patch, but feel free to test 30/35 and
 submit the changes back :)

 
This should be tested and optimized before pushing upstream.

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Re: patch: add omap730 / omap850 rtc support

2009-10-14 Thread Christopher Friedt 
On Wed, Oct 14, 2009 at 11:52 AM, G, Manjunath Kondaiah manj...@ti.com wrote:
 You can acheive the same using only enum with following:

 #define OMAP_RTC_REGISTER_SIZE (cpu_is_omap7xx()?1:4)
 #define rtc_read(reg)
        omap_readb(OMAP_RTC_BASE + (reg * OMAP_RTC_REGISTER_SIZE))

That was my first instinct too, but then I thought that one of the
register offsets wasn't related by a factor of 4 (when I made the
patch originally it was ~ 2am and I was very tired), which convinced
me to do a quick  easy static array implementation.

Thanks for your suggestion.

Regarding the 50 - 35 change, I think it's clearly safe to do. I have
no objections.

C
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Re: patch: add omap730 / omap850 rtc support

2009-10-14 Thread Christopher Friedt 
I decided on using 31 because

=
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 0587d53..cc25f4f 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -22,6 +22,7 @@
 #include linux/platform_device.h

 #include asm/io.h
+#include mach/cpu.h


 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
@@ -40,28 +41,28 @@
 #define OMAP_RTC_BASE  0xfffb4800

 /* RTC registers */
-#define OMAP_RTC_SECONDS_REG   0x00
-#define OMAP_RTC_MINUTES_REG   0x04
-#define OMAP_RTC_HOURS_REG 0x08
-#define OMAP_RTC_DAYS_REG  0x0C
-#define OMAP_RTC_MONTHS_REG0x10
-#define OMAP_RTC_YEARS_REG 0x14
-#define OMAP_RTC_WEEKS_REG 0x18
-
-#define OMAP_RTC_ALARM_SECONDS_REG 0x20
-#define OMAP_RTC_ALARM_MINUTES_REG 0x24
-#define OMAP_RTC_ALARM_HOURS_REG   0x28
-#define OMAP_RTC_ALARM_DAYS_REG0x2c
-#define OMAP_RTC_ALARM_MONTHS_REG  0x30
-#define OMAP_RTC_ALARM_YEARS_REG   0x34
-
-#define OMAP_RTC_CTRL_REG  0x40
-#define OMAP_RTC_STATUS_REG0x44
-#define OMAP_RTC_INTERRUPTS_REG0x48
-
-#define OMAP_RTC_COMP_LSB_REG  0x4c
-#define OMAP_RTC_COMP_MSB_REG  0x50
-#define OMAP_RTC_OSC_REG   0x54
+#define OMAP_RTC_SECONDS_REG   0x00
+#define OMAP_RTC_MINUTES_REG   0x01
+#define OMAP_RTC_HOURS_REG 0x02
+#define OMAP_RTC_DAYS_REG  0x03
+#define OMAP_RTC_MONTHS_REG0x04
+#define OMAP_RTC_YEARS_REG 0x05
+#define OMAP_RTC_WEEKS_REG 0x06
+
+#define OMAP_RTC_ALARM_SECONDS_REG 0x08
+#define OMAP_RTC_ALARM_MINUTES_REG 0x09
+#define OMAP_RTC_ALARM_HOURS_REG   0x0a
+#define OMAP_RTC_ALARM_DAYS_REG0x0b
+#define OMAP_RTC_ALARM_MONTHS_REG  0x0c
+#define OMAP_RTC_ALARM_YEARS_REG   0x0d
+
+#define OMAP_RTC_CTRL_REG  0x10
+#define OMAP_RTC_STATUS_REG0x11
+#define OMAP_RTC_INTERRUPTS_REG0x12
+
+#define OMAP_RTC_COMP_LSB_REG  0x13
+#define OMAP_RTC_COMP_MSB_REG  0x14
+#define OMAP_RTC_OSC_REG   0x15

 /* OMAP_RTC_CTRL_REG bit fields: */
 #define OMAP_RTC_CTRL_SPLIT(17)
@@ -87,10 +88,12 @@
 #define OMAP_RTC_INTERRUPTS_IT_ALARM(13)
 #define OMAP_RTC_INTERRUPTS_IT_TIMER(12)

+#define OMAP_RTC_REGISTER_SIZE (cpu_is_omap7xx()?1:4)

-#define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
-#define rtc_write(val, addr)   omap_writeb(val, OMAP_RTC_BASE + (addr))
-
+#define rtc_read(reg) \
+   omap_readb(   OMAP_RTC_BASE + OMAP_RTC_REGISTER_SIZE * reg )
+#define rtc_write(val,reg) \
+   omap_writeb( val, OMAP_RTC_BASE + OMAP_RTC_REGISTER_SIZE * reg )

 /* we rely on the rtc framework to handle locking (rtc-ops_lock),
  * so the only other requirement is that register accesses which
@@ -102,7 +105,7 @@ static void rtc_wait_not_busy(void)
u8  status;

/* BUSY may stay active for 1/32768 second (~30 usec) */
-   for (count = 0; count  50; count++) {
+   for (count = 0; count  31; count++) {
status = rtc_read(OMAP_RTC_STATUS_REG);
if ((status  (u8)OMAP_RTC_STATUS_BUSY) == 0)
break;
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RE: patch: add omap730 / omap850 rtc support

2009-10-14 Thread G, Manjunath Kondaiah 

 -Original Message-
 From: Christopher Friedt [mailto:chrisfri...@gmail.com] 
 Sent: Wednesday, October 14, 2009 6:58 PM
 To: G, Manjunath Kondaiah
 Cc: linux-omap@vger.kernel.org
 Subject: Re: patch: add omap730 / omap850 rtc support
 
 On Wed, Oct 14, 2009 at 11:52 AM, G, Manjunath Kondaiah 
 manj...@ti.com wrote:
  You can acheive the same using only enum with following:
 
  #define OMAP_RTC_REGISTER_SIZE (cpu_is_omap7xx()?1:4)
  #define rtc_read(reg)
         omap_readb(OMAP_RTC_BASE + (reg * OMAP_RTC_REGISTER_SIZE))
 
 That was my first instinct too, but then I thought that one of the
 register offsets wasn't related by a factor of 4 (when I made the
 patch originally it was ~ 2am and I was very tired), which convinced
 me to do a quick  easy static array implementation.
 
 Thanks for your suggestion.

You can add reserve register offsets into enum array to fix the issue 
of register offsets not in sequence like:
enum omap_rtc_regs {
SECONDS_REG = 0,
MINUTES_REG,
HOURS_REG,
DAYS_REG,
MONTHS_REG,
YEARS_REG,
WEEKS_REG,
RESV_REG_1,
ALARM_SECONDS_REG,
ALARM_MINUTES_REG,
ALARM_HOURS_REG,
ALARM_DAYS_REG,
ALARM_MONTHS_REG,
ALARM_YEARS_REG,
RESV_REG_2,
RESV_REG_3,
CTRL_REG,
STATUS_REG,
INTERRUPTS_REG,
COMP_LSB_REG,
COMP_MSB_REG,
};

 
 Regarding the 50 - 35 change, I think it's clearly safe to do. I have
 no objections.
 
 C

 
Ok. Change the value to 35.

-Manjunath

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Re: patch: add omap730 / omap850 rtc support

2009-10-14 Thread Christopher Friedt 
On Wed, Oct 14, 2009 at 4:09 PM, Christopher Friedt
chrisfri...@gmail.com wrote:
 I decided on using 31 because

sorry, that should read '' because 1/32768 is between 30 and 31
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patch: add omap730 / omap850 rtc support

2009-10-13 Thread Christopher Friedt 
Christopher Friedt chrisfri...@gmail.com
20091013: Add support for the OMAP730 and OMAP850 RTC.
==
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 0587d53..5163d67 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -22,6 +22,7 @@
 #include linux/platform_device.h

 #include asm/io.h
+#include mach/cpu.h


 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
@@ -39,29 +40,80 @@

 #define OMAP_RTC_BASE  0xfffb4800

-/* RTC registers */
-#define OMAP_RTC_SECONDS_REG   0x00
-#define OMAP_RTC_MINUTES_REG   0x04
-#define OMAP_RTC_HOURS_REG 0x08
-#define OMAP_RTC_DAYS_REG  0x0C
-#define OMAP_RTC_MONTHS_REG0x10
-#define OMAP_RTC_YEARS_REG 0x14
-#define OMAP_RTC_WEEKS_REG 0x18
-
-#define OMAP_RTC_ALARM_SECONDS_REG 0x20
-#define OMAP_RTC_ALARM_MINUTES_REG 0x24
-#define OMAP_RTC_ALARM_HOURS_REG   0x28
-#define OMAP_RTC_ALARM_DAYS_REG0x2c
-#define OMAP_RTC_ALARM_MONTHS_REG  0x30
-#define OMAP_RTC_ALARM_YEARS_REG   0x34
-
-#define OMAP_RTC_CTRL_REG  0x40
-#define OMAP_RTC_STATUS_REG0x44
-#define OMAP_RTC_INTERRUPTS_REG0x48
-
-#define OMAP_RTC_COMP_LSB_REG  0x4c
-#define OMAP_RTC_COMP_MSB_REG  0x50
-#define OMAP_RTC_OSC_REG   0x54
+enum omap_rtc_regs {
+   SECONDS_REG = 0,
+   MINUTES_REG,
+   HOURS_REG,
+   DAYS_REG,
+   MONTHS_REG,
+   YEARS_REG,
+   WEEKS_REG,
+   ALARM_SECONDS_REG,
+   ALARM_MINUTES_REG,
+   ALARM_HOURS_REG,
+   ALARM_DAYS_REG,
+   ALARM_MONTHS_REG,
+   ALARM_YEARS_REG,
+   CTRL_REG,
+   STATUS_REG,
+   INTERRUPTS_REG,
+   COMP_LSB_REG,
+   COMP_MSB_REG,
+};
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+static u8 omap_8bit_rtc_offsets[] = {
+   [SECONDS_REG]   = 0x00,
+   [MINUTES_REG]   = 0x01,
+   [HOURS_REG] = 0x02,
+   [DAYS_REG]  = 0x03,
+   [MONTHS_REG]= 0x04,
+   [YEARS_REG] = 0x05,
+   [WEEKS_REG] = 0x06,
+   /* 0x07 reserved */
+   [ALARM_SECONDS_REG] = 0x08,
+   [ALARM_MINUTES_REG] = 0x09,
+   [ALARM_HOURS_REG]   = 0x0a,
+   [ALARM_DAYS_REG]= 0x0b,
+   [ALARM_MONTHS_REG]  = 0x0c,
+   [ALARM_YEARS_REG]   = 0x0d,
+   /* 0x0e reserved */
+   /* 0x0f reserved */
+   [CTRL_REG]  = 0x10,
+   [STATUS_REG]= 0x11,
+   [INTERRUPTS_REG]= 0x12,
+   [COMP_LSB_REG]  = 0x13,
+   [COMP_MSB_REG]  = 0x14,
+};
+#else
+#define omap_8bit_rtc_offsets NULL
+#endif
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
+static u8 omap_32bit_rtc_offsets[] = {
+   [SECONDS_REG]   = 0x00,
+   [MINUTES_REG]   = 0x04,
+   [HOURS_REG] = 0x08,
+   [DAYS_REG]  = 0x0c,
+   [MONTHS_REG]= 0x10,
+   [YEARS_REG] = 0x14,
+   [WEEKS_REG] = 0x18,
+   [ALARM_SECONDS_REG] = 0x20,
+   [ALARM_MINUTES_REG] = 0x24,
+   [ALARM_HOURS_REG]   = 0x28,
+   [ALARM_DAYS_REG]= 0x2c,
+   [ALARM_MONTHS_REG]  = 0x30,
+   [ALARM_YEARS_REG]   = 0x34,
+   [CTRL_REG]  = 0x40,
+   [STATUS_REG]= 0x44,
+   [INTERRUPTS_REG]= 0x48,
+   [COMP_LSB_REG]  = 0x4c,
+   [COMP_MSB_REG]  = 0x50,
+};
+#else
+#define omap_32bit_rtc_offsets NULL
+#endif
+
+// set to 32bit or 8bit rtc offsets by omap_rtc_probe()
+static u8 *rtc_offsets;

 /* OMAP_RTC_CTRL_REG bit fields: */
 #define OMAP_RTC_CTRL_SPLIT(17)
@@ -87,10 +139,8 @@
 #define OMAP_RTC_INTERRUPTS_IT_ALARM(13)
 #define OMAP_RTC_INTERRUPTS_IT_TIMER(12)

-
-#define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
-#define rtc_write(val, addr)   omap_writeb(val, OMAP_RTC_BASE + (addr))
-
+#define rtc_read(reg)  omap_readb(OMAP_RTC_BASE + rtc_offsets[reg])
+#define rtc_write(val, reg)omap_writeb(val, OMAP_RTC_BASE + 
rtc_offsets[reg])

 /* we rely on the rtc framework to handle locking (rtc-ops_lock),
  * so the only other requirement is that register accesses which
@@ -103,7 +153,7 @@ static void rtc_wait_not_busy(void)

/* BUSY may stay active for 1/32768 second (~30 usec) */
for (count = 0; count  50; count++) {
-   status = rtc_read(OMAP_RTC_STATUS_REG);
+   status = rtc_read(STATUS_REG);
if ((status  (u8)OMAP_RTC_STATUS_BUSY) == 0)
break;
udelay(1);
@@ -116,11 +166,11 @@ static irqreturn_t rtc_irq(int irq, void *rtc)
unsigned long   events = 0;
u8