Re: [PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-16 Thread kbuild test robot
Hi Felipe,

[auto build test ERROR on omap/for-next -- if it's inappropriate base, please 
suggest rules for selecting the more suitable base]

url:
https://github.com/0day-ci/linux/commits/Felipe-Balbi/arm-omap-timer-cleanups/20151017-002649
config: i386-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/built-in.o: In function `ti_32k_timer_init':
>> timer-ti-32k.c:(.init.text+0x213a6): undefined reference to 
>> `sched_clock_register'

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data


[PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-16 Thread Felipe Balbi
Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Cc: Daniel Lezcano 
Cc: Thomas Gleixner 
Cc: linux-ker...@vger.kernel.org
Acked-by: Daniel Lezcano 
Signed-off-by: Felipe Balbi 
---
 drivers/clocksource/Kconfig|   7 +++
 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/timer-ti-32k.c | 126 +
 3 files changed, 134 insertions(+)
 create mode 100644 drivers/clocksource/timer-ti-32k.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a7726db13abb..98b2a9b9bfad 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -115,6 +115,13 @@ config CLKSRC_PISTACHIO
bool
select CLKSRC_OF
 
+config CLKSRC_TI_32K
+   bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
+   select CLKSRC_OF if OF
+   help
+ This option enables support for Texas Instruments 32.768 Hz 
clocksource
+ available on many OMAP-like platforms.
+
 config CLKSRC_STM32
bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5c00863c3e33..749abc3665b3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)  += qcom-timer.o
 obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
 obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
+obj-$(CONFIG_CLKSRC_TI_32K)+= timer-ti-32k.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)   += arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/timer-ti-32k.c 
b/drivers/clocksource/timer-ti-32k.c
new file mode 100644
index ..8518d9dfba5c
--- /dev/null
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -0,0 +1,126 @@
+/**
+ * timer-ti-32k.c - OMAP2 32k Timer Support
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ *
+ * Update to use new clocksource/clockevent layers
+ * Author: Kevin Hilman, MontaVista Software, Inc. 
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *
+ * Original driver:
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt 
+ * Juha Yrjölä 
+ * OMAP Dual-mode timer framework support by Timo Teras
+ *
+ * Some parts based off of TI's 24xx code:
+ *
+ * Copyright (C) 2004-2009 Texas Instruments, Inc.
+ *
+ * Roughly modelled after the OMAP1 MPU timer code.
+ * Added OMAP4 support - Santosh Shilimkar 
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * 32KHz clocksource ... always available, on pretty most chips except
+ * OMAP 730 and 1510.  Other timers could be used as clocksources, with
+ * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
+ * but systems won't necessarily want to spend resources that way.
+ */
+
+#define OMAP2_32KSYNCNT_REV_OFF0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
+
+struct ti_32k {
+   void __iomem*base;
+   void __iomem*counter;
+   struct clocksource  cs;
+};
+
+static inline struct ti_32k *to_ti_32k(struct clocksource *cs)
+{
+   return container_of(cs, struct ti_32k, cs);
+}
+
+static cycle_t ti_32k_read_cycles(struct clocksource *cs)
+{
+   struct ti_32k *ti = to_ti_32k(cs);
+
+   return (cycle_t)readl_relaxed(ti->counter);
+}
+
+static struct ti_32k ti_32k_timer = {
+   .cs = {
+   .name   = "32k_counter",
+   .rating = 250,
+   .read   = ti_32k_read_cycles,
+   .mask   = CLOCKSOURCE_MASK(32),
+   .flags  = CLOCK_SOURCE_IS_CONTINUOUS |
+   CLOCK_SOURCE_SUSPEND_NONSTOP,
+   },
+};
+
+static u64 notrace omap_32k_read_sched_clock(void)
+{
+   return ti_32k_read_cycles(_32k_timer.cs);
+}
+
+static void 

Re: [PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-06 Thread Felipe Balbi

Hi,

Daniel Lezcano  writes:

> On 10/06/2015 07:02 PM, Felipe Balbi wrote:
>> Introduce a new clocksource driver for Texas
>> Instruments 32.768 Hz device which is available
>> on most OMAP-like devices.
>>
>> Signed-off-by: Felipe Balbi 
>
> Hi Felipe,
>
> With the couple of nits below fixed, you can my:
>
> Acked-by: Daniel Lezcano 
>
> [ ... ]
>
>> +#define OMAP2_32KSYNCNT_REV_OFF 0x0
>> +#define OMAP2_32KSYNCNT_REV_SCHEME  (0x3 << 30)
>> +#define OMAP2_32KSYNCNT_CR_OFF_LOW  0x10
>> +#define OMAP2_32KSYNCNT_CR_OFF_HIGH 0x30
>> +
>> +struct ti_32k {
>> +void __iomem*base;
>> +void __iomem*counter;
>> +struct clocksource  cs;
>> +};
>> +#define to_ti_32k(cs)   (container_of((cs), struct ti_32k, cs))
>
> Usually a static inline is used instead of a macro for that.

not so true and also completely unnecessary, considering container_of()
already type safety ;-)

Try this:

$ git grep -e "#define.*container_of" | wc -l

no strong feelings though. I tend to prefer a macro to wrap
container_of() but won't go into an argument

-- 
balbi


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Description: PGP signature


Re: [PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-06 Thread Daniel Lezcano

On 10/06/2015 07:02 PM, Felipe Balbi wrote:

Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Signed-off-by: Felipe Balbi 


Hi Felipe,

With the couple of nits below fixed, you can my:

Acked-by: Daniel Lezcano 

[ ... ]


+#define OMAP2_32KSYNCNT_REV_OFF0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
+
+struct ti_32k {
+   void __iomem*base;
+   void __iomem*counter;
+   struct clocksource  cs;
+};
+#define to_ti_32k(cs)  (container_of((cs), struct ti_32k, cs))


Usually a static inline is used instead of a macro for that.


+static cycle_t ti_32k_read_cycles(struct clocksource *cs)
+{
+   struct ti_32k   *ti = to_ti_32k(cs);


format


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[PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-06 Thread Felipe Balbi
Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Signed-off-by: Felipe Balbi 
---
 drivers/clocksource/Kconfig|   7 +++
 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/timer-ti-32k.c | 122 +
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/clocksource/timer-ti-32k.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a7726db13abb..98b2a9b9bfad 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -115,6 +115,13 @@ config CLKSRC_PISTACHIO
bool
select CLKSRC_OF
 
+config CLKSRC_TI_32K
+   bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
+   select CLKSRC_OF if OF
+   help
+ This option enables support for Texas Instruments 32.768 Hz 
clocksource
+ available on many OMAP-like platforms.
+
 config CLKSRC_STM32
bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5c00863c3e33..749abc3665b3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)  += qcom-timer.o
 obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
 obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
+obj-$(CONFIG_CLKSRC_TI_32K)+= timer-ti-32k.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)   += arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/timer-ti-32k.c 
b/drivers/clocksource/timer-ti-32k.c
new file mode 100644
index ..12e2ca7bcc49
--- /dev/null
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -0,0 +1,122 @@
+/**
+ * timer-ti-32k.c - OMAP2 32k Timer Support
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ *
+ * Update to use new clocksource/clockevent layers
+ * Author: Kevin Hilman, MontaVista Software, Inc. 
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *
+ * Original driver:
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt 
+ * Juha Yrjölä 
+ * OMAP Dual-mode timer framework support by Timo Teras
+ *
+ * Some parts based off of TI's 24xx code:
+ *
+ * Copyright (C) 2004-2009 Texas Instruments, Inc.
+ *
+ * Roughly modelled after the OMAP1 MPU timer code.
+ * Added OMAP4 support - Santosh Shilimkar 
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * 32KHz clocksource ... always available, on pretty most chips except
+ * OMAP 730 and 1510.  Other timers could be used as clocksources, with
+ * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
+ * but systems won't necessarily want to spend resources that way.
+ */
+
+#define OMAP2_32KSYNCNT_REV_OFF0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
+
+struct ti_32k {
+   void __iomem*base;
+   void __iomem*counter;
+   struct clocksource  cs;
+};
+#define to_ti_32k(cs)  (container_of((cs), struct ti_32k, cs))
+
+static cycle_t ti_32k_read_cycles(struct clocksource *cs)
+{
+   struct ti_32k   *ti = to_ti_32k(cs);
+
+   return (cycle_t)readl_relaxed(ti->counter);
+}
+
+static struct ti_32k ti_32k_timer = {
+   .cs = {
+   .name   = "32k_counter",
+   .rating = 250,
+   .read   = ti_32k_read_cycles,
+   .mask   = CLOCKSOURCE_MASK(32),
+   .flags  = CLOCK_SOURCE_IS_CONTINUOUS |
+   CLOCK_SOURCE_SUSPEND_NONSTOP,
+   },
+};
+
+static u64 notrace omap_32k_read_sched_clock(void)
+{
+   return ti_32k_read_cycles(_32k_timer.cs);
+}
+
+static void __init ti_32k_timer_init(struct device_node *np)
+{
+   int ret;
+
+   ti_32k_timer.base = of_iomap(np, 0);
+   if (!ti_32k_timer.base) {
+   pr_err("Can't ioremap 32k timer base\n");
+   

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-05 Thread Tony Lindgren
* Tony Lindgren  [151005 03:56]:
> * Daniel Lezcano  [151001 15:04]:
> > >+  clocks_calc_mult_shift(_mult, _shift,
> > >+  32768, NSEC_PER_SEC, 12);
> > >+
> > >+  ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> > >+  250, 32, clocksource_mmio_readl_up);
> > >+  if (ret) {
> > >+  pr_err("32k_counter: can't register clocksource\n");
> > >+  return;
> > >+  }
> > >+
> > >+  sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
> > >+  register_persistent_clock(NULL, omap_read_persistent_clock64);
> > 
> > I will let John Stultz to have a look at this part because I have doubt
> > regarding the usage of the persistent clock.
> 
> The persistent clock we want to keep for deeper idle states..
> Especially when we start changing clocksource for the duration of
> deeper idle states. I'll post some updated patches on that when I
> get a chance.

But sounds like we can just have read_persistent_clock() check
for the CLOCK_SOURCE_SUSPEND_NONSTOP like I pointed in the other
patch in this series.

Tony
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Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-05 Thread Tony Lindgren
* Daniel Lezcano  [151001 15:04]:
> >+clocks_calc_mult_shift(_mult, _shift,
> >+32768, NSEC_PER_SEC, 12);
> >+
> >+ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> >+250, 32, clocksource_mmio_readl_up);
> >+if (ret) {
> >+pr_err("32k_counter: can't register clocksource\n");
> >+return;
> >+}
> >+
> >+sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
> >+register_persistent_clock(NULL, omap_read_persistent_clock64);
> 
> I will let John Stultz to have a look at this part because I have doubt
> regarding the usage of the persistent clock.

The persistent clock we want to keep for deeper idle states..
Especially when we start changing clocksource for the duration of
deeper idle states. I'll post some updated patches on that when I
get a chance.

Regards,

Tony
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Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-01 Thread John Stultz
On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi  wrote:
> Introduce a new clocksource driver for Texas
> Instruments 32.768 Hz device which is available
> on most OMAP-like devices.
>
> Signed-off-by: Felipe Balbi 
> ---
>  drivers/clocksource/Kconfig|   8 +++
>  drivers/clocksource/Makefile   |   1 +
>  drivers/clocksource/timer-ti-32k.c | 121 
> +
>  3 files changed, 130 insertions(+)
>  create mode 100644 drivers/clocksource/timer-ti-32k.c
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index a7726db13abb..0ccfd12a00a3 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -115,6 +115,14 @@ config CLKSRC_PISTACHIO
> bool
> select CLKSRC_OF
>
> +config CLKSRC_TI_32K
> +   bool "Texas Instruments 32.768 Hz Clocksource"
> +   depends on OF && ARCH_OMAP2PLUS
> +   select CLKSRC_OF
> +   help
> + This option enables support for Texas Instruments 32.768 Hz 
> clocksource
> + available on many OMAP-like platforms.
> +
>  config CLKSRC_STM32
> bool "Clocksource for STM32 SoCs" if !ARCH_STM32
> depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 5c00863c3e33..749abc3665b3 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)+= vf_pit_timer.o
>  obj-$(CONFIG_CLKSRC_QCOM)  += qcom-timer.o
>  obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
>  obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
> +obj-$(CONFIG_CLKSRC_TI_32K)+= timer-ti-32k.o
>
>  obj-$(CONFIG_ARM_ARCH_TIMER)   += arm_arch_timer.o
>  obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
> diff --git a/drivers/clocksource/timer-ti-32k.c 
> b/drivers/clocksource/timer-ti-32k.c
> new file mode 100644
> index ..10ccce2eb645
> --- /dev/null
> +++ b/drivers/clocksource/timer-ti-32k.c
> @@ -0,0 +1,121 @@
> +/**
> + * timer-ti-32k.c - OMAP2 32k Timer Support
> + *
> + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2  of
> + * the License as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
> +#define OMAP2_32KSYNCNT_REV_OFF0x0
> +#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
> +#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
> +#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
> +
> +/*
> + * 32KHz clocksource ... always available, on pretty most chips except
> + * OMAP 730 and 1510.  Other timers could be used as clocksources, with
> + * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
> + * but systems won't necessarily want to spend resources that way.
> + */
> +static void __iomem *sync32k_cnt_reg;
> +
> +/**
> + * omap_read_persistent_clock64 -  Return time from a persistent clock.
> + *
> + * Reads the time from a source which isn't disabled during PM, the
> + * 32k sync timer.  Convert the cycles elapsed since last read into
> + * nsecs and adds to a monotonically increasing timespec64.
> + */
> +static struct timespec64 persistent_ts;
> +static cycles_t cycles;
> +static unsigned int persistent_mult, persistent_shift;
> +
> +static u64 notrace omap_32k_read_sched_clock(void)
> +{
> +   return readl_relaxed(sync32k_cnt_reg);
> +}
> +
> +static void omap_read_persistent_clock64(struct timespec64 *ts)
> +{
> +   unsigned long long nsecs;
> +   cycles_t last_cycles;
> +
> +   last_cycles = cycles;
> +   cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
> +
> +   nsecs = clocksource_cyc2ns(cycles - last_cycles,
> +   persistent_mult, persistent_shift);
> +
> +   timespec64_add_ns(_ts, nsecs);
> +
> +   *ts = persistent_ts;
> +}

So this doesn't look to really be a persistent clock (like an RTC),
and is more just a clock that doesn't halt in suspend, right?
(I know some devices used this trick to provide suspend timing w/o an RTC).

That said, we do now support CLOCK_SOURCE_SUSPEND_NONSTOP, which
allows us to do suspend timing from the 

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-01 Thread Daniel Lezcano


Hi Felipe,


On 09/29/2015 10:44 PM, Felipe Balbi wrote:

Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Signed-off-by: Felipe Balbi 
---


[ ... ]


+config CLKSRC_TI_32K
+   bool "Texas Instruments 32.768 Hz Clocksource"
+   depends on OF && ARCH_OMAP2PLUS
+   select CLKSRC_OF
+   help
+ This option enables support for Texas Instruments 32.768 Hz 
clocksource
+ available on many OMAP-like platforms.
+


It is the omap's Kconfig which should select the timer, not the user to 
enable the timer.


It should be something like:

config CLKSRC_TI_32K
bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
select CLKSRC_OF if OF
help
  This option enables support for Texas Instruments 32.768 Hz
  clocksource available on many OMAP-like platforms.

And in the omap's Kconfig:
select CLKSRC_TI_32K



  config CLKSRC_STM32
bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5c00863c3e33..749abc3665b3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)+= vf_pit_timer.o
  obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
  obj-$(CONFIG_MTK_TIMER)   += mtk_timer.o
  obj-$(CONFIG_CLKSRC_PISTACHIO)+= time-pistachio.o
+obj-$(CONFIG_CLKSRC_TI_32K)+= timer-ti-32k.o

  obj-$(CONFIG_ARM_ARCH_TIMER)  += arm_arch_timer.o
  obj-$(CONFIG_ARM_GLOBAL_TIMER)+= arm_global_timer.o
diff --git a/drivers/clocksource/timer-ti-32k.c 
b/drivers/clocksource/timer-ti-32k.c
new file mode 100644
index ..10ccce2eb645
--- /dev/null
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -0,0 +1,121 @@
+/**
+ * timer-ti-32k.c - OMAP2 32k Timer Support
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 


Can you check all these headers are needed ? I don't think interrupt.h, 
or slab.h or irq.h, etc ... are needed.


A few nits below:


+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */


I am not sure this comment gives some interesting indication.


+#define OMAP2_32KSYNCNT_REV_OFF0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
+
+/*
+ * 32KHz clocksource ... always available, on pretty most chips except
+ * OMAP 730 and 1510.  Other timers could be used as clocksources, with
+ * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
+ * but systems won't necessarily want to spend resources that way.
+ */
+static void __iomem *sync32k_cnt_reg;
+
+/**
+ * omap_read_persistent_clock64 -  Return time from a persistent clock.
+ *
+ * Reads the time from a source which isn't disabled during PM, the
+ * 32k sync timer.  Convert the cycles elapsed since last read into
+ * nsecs and adds to a monotonically increasing timespec64.
+ */


This comment above should be moved right before the function it 
describes and in order to comply with the kernel-doc format the 
parameters must be documented also:

...
* @ts:  
...



+static struct timespec64 persistent_ts;
+static cycles_t cycles;
+static unsigned int persistent_mult, persistent_shift;
+
+static u64 notrace omap_32k_read_sched_clock(void)
+{
+   return readl_relaxed(sync32k_cnt_reg);
+}
+
+static void omap_read_persistent_clock64(struct timespec64 *ts)
+{
+   unsigned long long nsecs;
+   cycles_t last_cycles;
+
+   last_cycles = cycles;
+   cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;


This test is pointless because 'sync32k_cnt_reg' is always different 
from zero regarding the init routine, no ?



+
+   nsecs = clocksource_cyc2ns(cycles - last_cycles,
+   persistent_mult, persistent_shift);
+
+   timespec64_add_ns(_ts, nsecs);
+
+   *ts = persistent_ts;
+}
+
+static void __init ti_32k_timer_init(struct device_node *np)
+{
+   void __iomem *vbase;
+   int ret;
+
+  

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-01 Thread Felipe Balbi
On Thu, Oct 01, 2015 at 03:20:18PM -0700, John Stultz wrote:
> On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi  wrote:
> > Introduce a new clocksource driver for Texas
> > Instruments 32.768 Hz device which is available
> > on most OMAP-like devices.
> >
> > Signed-off-by: Felipe Balbi 
> > ---
> >  drivers/clocksource/Kconfig|   8 +++
> >  drivers/clocksource/Makefile   |   1 +
> >  drivers/clocksource/timer-ti-32k.c | 121 
> > +
> 
> Also isn't this somewhat duplicate of the code in
> arch/arm/plat-omap/counter_32k.c ?
> 
> Was this really a rewrite or just a code migration? Should you

migrating, but we can't really delete that yet because we still have
a bunch of legacy platforms not using DT.

> preserve the copyrights from counter_32k.c?

heh, probably :-)

-- 
balbi


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Description: PGP signature


Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-10-01 Thread John Stultz
On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi  wrote:
> Introduce a new clocksource driver for Texas
> Instruments 32.768 Hz device which is available
> on most OMAP-like devices.
>
> Signed-off-by: Felipe Balbi 
> ---
>  drivers/clocksource/Kconfig|   8 +++
>  drivers/clocksource/Makefile   |   1 +
>  drivers/clocksource/timer-ti-32k.c | 121 
> +

Also isn't this somewhat duplicate of the code in
arch/arm/plat-omap/counter_32k.c ?

Was this really a rewrite or just a code migration? Should you
preserve the copyrights from counter_32k.c?

thanks
-john
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[RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

2015-09-29 Thread Felipe Balbi
Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Signed-off-by: Felipe Balbi 
---
 drivers/clocksource/Kconfig|   8 +++
 drivers/clocksource/Makefile   |   1 +
 drivers/clocksource/timer-ti-32k.c | 121 +
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/clocksource/timer-ti-32k.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a7726db13abb..0ccfd12a00a3 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -115,6 +115,14 @@ config CLKSRC_PISTACHIO
bool
select CLKSRC_OF
 
+config CLKSRC_TI_32K
+   bool "Texas Instruments 32.768 Hz Clocksource"
+   depends on OF && ARCH_OMAP2PLUS
+   select CLKSRC_OF
+   help
+ This option enables support for Texas Instruments 32.768 Hz 
clocksource
+ available on many OMAP-like platforms.
+
 config CLKSRC_STM32
bool "Clocksource for STM32 SoCs" if !ARCH_STM32
depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5c00863c3e33..749abc3665b3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)  += qcom-timer.o
 obj-$(CONFIG_MTK_TIMER)+= mtk_timer.o
 obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
+obj-$(CONFIG_CLKSRC_TI_32K)+= timer-ti-32k.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)   += arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/timer-ti-32k.c 
b/drivers/clocksource/timer-ti-32k.c
new file mode 100644
index ..10ccce2eb645
--- /dev/null
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -0,0 +1,121 @@
+/**
+ * timer-ti-32k.c - OMAP2 32k Timer Support
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
+#define OMAP2_32KSYNCNT_REV_OFF0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW 0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH0x30
+
+/*
+ * 32KHz clocksource ... always available, on pretty most chips except
+ * OMAP 730 and 1510.  Other timers could be used as clocksources, with
+ * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
+ * but systems won't necessarily want to spend resources that way.
+ */
+static void __iomem *sync32k_cnt_reg;
+
+/**
+ * omap_read_persistent_clock64 -  Return time from a persistent clock.
+ *
+ * Reads the time from a source which isn't disabled during PM, the
+ * 32k sync timer.  Convert the cycles elapsed since last read into
+ * nsecs and adds to a monotonically increasing timespec64.
+ */
+static struct timespec64 persistent_ts;
+static cycles_t cycles;
+static unsigned int persistent_mult, persistent_shift;
+
+static u64 notrace omap_32k_read_sched_clock(void)
+{
+   return readl_relaxed(sync32k_cnt_reg);
+}
+
+static void omap_read_persistent_clock64(struct timespec64 *ts)
+{
+   unsigned long long nsecs;
+   cycles_t last_cycles;
+
+   last_cycles = cycles;
+   cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
+
+   nsecs = clocksource_cyc2ns(cycles - last_cycles,
+   persistent_mult, persistent_shift);
+
+   timespec64_add_ns(_ts, nsecs);
+
+   *ts = persistent_ts;
+}
+
+static void __init ti_32k_timer_init(struct device_node *np)
+{
+   void __iomem *vbase;
+   int ret;
+
+   vbase = of_iomap(np, 0);
+   if (!vbase) {
+   pr_err("Can't ioremap 32k timer base\n");
+   return;
+   }
+
+   /*
+* 32k sync Counter IP register offsets vary between the
+* highlander version and the legacy ones.
+* The 'SCHEME' bits(30-31) of the revision register is used
+* to identify the version.
+*/
+   if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
+