RE: [PATCH] Added sleep support to UART
Hi Tero, Let me begin by saying that I don't care too much about the 32-bit SCM register read change; I just happen to think that it is easier to read. That said, one comment of yours bears some additional discussion: On Thu, 12 Jun 2008, [EMAIL PROTECTED] wrote: Also, the spec says that these registers can be accessed in either 8, 16 or 32 bit modes so why make it unnecessarily complicated and potentially buggy with shifts (race conditions)? What race are you referring to? Wouldn't such a race exist with the current code? (i.e., a shift should not cause any further race) - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Added sleep support to UART
Hi,
A few minor comments based on a quick look.
In terms of the OMAP3 code, is that for retention-idle only,
or does it work with off-idle also?
That patch should basically work in off-mode also, however it requires
correct settings in the padconfig registers which are currently done in
the boot code. Also, currently I have not had any chance to actually
test this in off-mode, I am still trying to get the off-mode work on my
HW.
On Tue, 10 Jun 2008, Tero Kristo wrote:
+const u32 omap2_uart_wk_bit[OMAP_MAX_NR_PORTS] = {
+ OMAP24XX_ST_UART1, OMAP24XX_ST_UART2, OMAP24XX_ST_UART3 };
Looks like that can be static.
True.
+/* UART padconfig registers, these may differ if
non-default padconfig
+ is used */
+#define CONTROL_PADCONF_UART1_RX 0x48002182 #define
+CONTROL_PADCONF_UART2_RX 0x4800217A #define
CONTROL_PADCONF_UART3_RX
+0x4800219E #define PADCONF_WAKEUP_ST 0x8000
Please use omap_ctrl_read{b,w,l}() rather than
omap_read{b,w,l}() for SCM addresses.
Hmm yea, could do.
Also, the above are register addresses + 2. Is it possible to
use the actual register addresses (ideally they should be
defined in include/asm-arm/arch-omap/control.h), do long
reads, and simply shift the register contents for the serial
ports that need it?
These registers are currently not defined anywhere and I did not feel
like wanting to put all the padconfig register definitions somewhere
(all 200+ of them) I don't think it is currently very clear how we
want to handle these registers in general. Also, this fix is more or
less temporary anyway while we are waiting for a real driver that
handles UART clocks properly (the final solution will most likely use
some of the elements of this though.)
Also, the spec says that these registers can be accessed in either 8, 16
or 32 bit modes so why make it unnecessarily complicated and potentially
buggy with shifts (race conditions)?
-Tero
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Re: [PATCH] Added sleep support to UART
Hello Tero,
A few minor comments based on a quick look.
In terms of the OMAP3 code, is that for retention-idle only, or does it
work with off-idle also?
On Tue, 10 Jun 2008, Tero Kristo wrote:
+const u32 omap2_uart_wk_bit[OMAP_MAX_NR_PORTS] = {
+ OMAP24XX_ST_UART1, OMAP24XX_ST_UART2, OMAP24XX_ST_UART3
+};
Looks like that can be static.
+/* UART padconfig registers, these may differ if non-default padconfig
+ is used */
+#define CONTROL_PADCONF_UART1_RX 0x48002182
+#define CONTROL_PADCONF_UART2_RX 0x4800217A
+#define CONTROL_PADCONF_UART3_RX 0x4800219E
+#define PADCONF_WAKEUP_ST 0x8000
Please use omap_ctrl_read{b,w,l}() rather than omap_read{b,w,l}() for SCM
addresses.
Also, the above are register addresses + 2. Is it possible to use the
actual register addresses (ideally they should be defined in
include/asm-arm/arch-omap/control.h), do long reads, and simply shift the
register contents for the serial ports that need it?
- Paul
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Re: [PATCH] Added sleep support to UART
* Tero Kristo [EMAIL PROTECTED] [080610 07:16]:
UART usage (e.g. serial console) now denies sleep for 5 seconds. This
makes it possible to use serial console when dynamic idle is enabled.
Also moved code from pm-debug.c to serial.c, and made pm24xx.c use this
new implementation.
I've pushed some fixes to l-o tree for CONFIG_PM_DEBUG, and that
requires the following patch for 24xx on top of your patch. Also changed
to use div_s64() to avoid hitting the gcc bug undefined reference
to __aeabi_ldivmod'.
Regards,
Tony
From e1d4cc54adacaa6a713e68b84151935f47be7895 Mon Sep 17 00:00:00 2001
From: Tony Lindgren [EMAIL PROTECTED]
Date: Tue, 10 Jun 2008 17:39:15 -0700
Subject: [PATCH] Fixes for 24xx debug uart handling
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 27af921..304a2e8 100755
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -137,11 +137,12 @@ no_sleep:
if (omap2_pm_debug) {
struct timespec t;
- struct timespec ts_delta
+ struct timespec ts_delta;
getnstimeofday(t);
ts_delta = timespec_sub(t, sleep_time);
- omap2_pm_dump(0, 1, timespec_to_ns(ts_delta) / NSEC_PER_USEC);
+ omap2_pm_dump(0, 1,
+ div_s64(timespec_to_ns(ts_delta), NSEC_PER_USEC));
}
omap2_gpio_resume_after_retention();
@@ -155,16 +156,16 @@ no_sleep:
prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
/* MPU domain wake events */
- l = prm_read_mod_reg(OCP_MOD, OMAP24XX_PRCM_IRQSTATUS_MPU_OFFSET);
+ l = prm_read_mod_reg(OCP_MOD, OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
if (l 0x01)
prm_write_mod_reg(0x01, OCP_MOD,
- OMAP24XX_PRCM_IRQSTATUS_MPU_OFFSET);
+ OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
if (l 0x20)
prm_write_mod_reg(0x20, OCP_MOD,
- OMAP24XX_PRCM_IRQSTATUS_MPU_OFFSET);
+ OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
/* Mask future PRCM-to-MPU interrupts */
- prm_write_mod_reg(0x0, OCP_MOD, OMAP24XX_PRCM_IRQSTATUS_MPU_OFFSET);
+ prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRM_IRQSTATUS_MPU_OFFSET);
}
static int omap2_i2c_active(void)
@@ -243,7 +244,7 @@ static void omap2_enter_mpu_retention(void)
getnstimeofday(t);
ts_delta = timespec_sub(t, sleep_time);
omap2_pm_dump(only_idle ? 2 : 1, 1,
- timespec_to_ns(ts_delta) / NSEC_PER_USEC);
+ div_s64(timespec_to_ns(ts_delta), NSEC_PER_USEC));
}
}
@@ -362,7 +363,7 @@ static void __init prcm_setup_regs(void)
/* Enable autoidle */
prm_write_mod_reg(OMAP24XX_AUTOIDLE, OCP_MOD,
- OMAP24XX_PRCM_SYSCONFIG_OFFSET);
+ OMAP24XX_PRM_SYSCONFIG_OFFSET);
/* Set all domain wakeup dependencies */
prm_write_mod_reg(OMAP_EN_WKUP_MASK, MPU_MOD, PM_WKDEP);
@@ -491,7 +492,7 @@ int __init omap2_pm_init(void)
u32 l;
printk(KERN_INFO Power Management for OMAP2 initializing\n);
- l = prm_read_mod_reg(OCP_MOD, OMAP24XX_PRCM_REVISION_OFFSET);
+ l = prm_read_mod_reg(OCP_MOD, OMAP24XX_PRM_REVISION_OFFSET);
printk(KERN_INFO PRCM revision %d.%d\n, (l 4) 0x0f, l 0x0f);
/* Look up important powerdomains, clockdomains */
