# ./lspci -vv -d 11ab:
02:01.0 Class 0100: 11ab:5081 (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop-
ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium TAbort-
TAbort- MAbort- SERR- PERR-
Latency: 32, cache
On Mon, 2005-07-04 at 20:13 -0400, Mark Hahn wrote:
# ./lspci -vv -d 11ab:
02:01.0 Class 0100: 11ab:5081 (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop-
ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium TAbort-