Accelerating Linux software raid

2005-09-06 Thread Dan Williams
Hello, I am writing to the list to gauge interest for a modification of the md driver that allows it to take advantage of raid acceleration hardware. I/O processors like the Intel IOP333 (http://www.intel.com/design/iio/docs/iop333.htm) contain an xor engine for raid5 and raid6 calculations, but

[RFC][PATCH 002 of 3] MD Acceleration: md_adma driver for raid5 offload

2006-02-02 Thread Dan Williams
the contents of the check_xor () macro into the proper locations. Signed-off-by: Dan Williams [EMAIL PROTECTED] diff --git a/include/linux/adma/md_adma.h b/include/linux/adma/md_adma.h new file mode 100644 index 000..54b86e2 --- /dev/null +++ b/include/linux/adma/md_adma.h @@ -0,0 +1,22

[RFC][PATCH 001 of 3] MD Acceleration: Base ADMA interface

2006-02-02 Thread Dan Williams
into account engine specific descriptor constraints. For now this code makes some pio_adma_engine assumptions which will be addressed in future releases. Signed-off-by: Dan Williams [EMAIL PROTECTED] diff --git a/drivers/adma/Kconfig b/drivers/adma/Kconfig new file mode 100644 index 000

[RFC][PATCH 000 of 3] MD Acceleration and the ADMA interface: Introduction

2006-02-02 Thread Dan Williams
. The known asynchronous interface stakeholders have been CC'd. Dan Williams Linux Development Team Storage Group - Intel Corporation - To unsubscribe from this list: send the line unsubscribe linux-raid in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org

[RFC][PATCH 003 of 3] MD Acceleration: raid5 changes to support asynchronous operation

2006-02-02 Thread Dan Williams
. Signed-off-by: Dan Williams [EMAIL PROTECTED] diff --git a/drivers/md/Kconfig b/drivers/md/Kconfig index ac43f98..b45720c 100644 --- a/drivers/md/Kconfig +++ b/drivers/md/Kconfig @@ -106,7 +106,7 @@ config MD_RAID10 config MD_RAID5 tristate RAID-4/RAID-5 mode - depends on BLK_DEV_MD

[RFC][PATCH 000 of 3] MD Acceleration and the ADMA interface: Introduction

2006-02-02 Thread Dan Williams
the remainder of raid5, raid6, and the outcome of the asynchronous off-load engine unification effort. The known asynchronous interface stakeholders have been CC'd. Dan Williams Linux Development Team Storage Group - Intel Corporation - To unsubscribe from this list: send the line unsubscribe

Re: [RFC][PATCH 000 of 3] MD Acceleration and the ADMA interface: Introduction

2006-02-06 Thread Dan Williams
On 2/5/06, Neil Brown [EMAIL PROTECTED] wrote: I've looked through the patches - not exhaustively, but hopefully enough to get a general idea of what is happening. There are some things I'm not clear on and some things that I could suggest alternates too... I have a few questions to check

[RFC][PATCH] MD RAID Acceleration: Move stripe operations outside the spin lock

2006-05-16 Thread Dan Williams
added to raid5.h for more details. This was prepared before the raid5/raid6 merge, and applies against Linus' git tree at commit 716f8954fb3029ca2df52a986b60af8d06f093ee --- [PATCH] Move stripe operations outside the spin lock Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5

Re: [RFC][PATCH] MD RAID Acceleration: Move stripe operations outside the spin lock

2006-05-19 Thread Dan Williams
Hi. This certainly looks like it is heading in the right direction - thanks. I have a couple of questions, which will probably lead to more. You obviously need some state-machine functionality to oversee the progression like xor - drain - xor (for RMW) or clear - copy - xor (for RCW). You

Re: raid 5 read performance

2006-05-21 Thread Dan Williams
Please read http://www.spinics.net/lists/raid/msg11838.html and ask if you have further questions. Does this implementation also need to do delayed updates to the stripe cache? I.e. we bypass the cache and get the requester the data it needs but then schedule that data to also be copied into

[RFC][PATCH] md: Move stripe operations outside the spinlock (v2)

2006-05-23 Thread Dan Williams
queue multi-threaded. The ordering is maintained by not advancing the operations state while STRIPE_OP_LOCKED is active. Applies against 2.6.17-rc4. --- [PATCH] Move stripe operations outside the spin lock (v2) Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 334

[PATCH 002 of 006] raid5: Move check parity operations to a work queue

2006-06-28 Thread Dan Williams
This patch adds 'check parity' capabilities to the work queue and fixes 'queue_raid_work'. Also, raid5_do_soft_block_ops now accesses the stripe state under the lock to ensure that it is never out of sync with handle_stripe5. Signed-off-by: Dan Williams [EMAIL PROTECTED] drivers/md/raid5.c

[PATCH 006 of 006] raid5: Remove compute_block and compute_parity

2006-06-28 Thread Dan Williams
compute_block and compute_parity5 are replaced by the work queue and the handle_*_operations5 routines. Signed-off-by: Dan Williams [EMAIL PROTECTED] raid5.c | 123 1 files changed, 123 deletions

[PATCH 003 of 006] raid5: Move compute block operations to a work queue

2006-06-28 Thread Dan Williams
. STRIPE_OP_COMPUTE_Recover was added to track when the parity block is being computed due to a failed parity check. This allows the code in handle_stripe5 that produces requests for check_parity and compute_block operations to be separate from the code that consumes the result. Signed-off-by: Dan

[PATCH 004 of 006] raid5: Move read completion copies to a work queue

2006-06-28 Thread Dan Williams
for the bi_end_io() call. Signed-off-by: Dan Williams [EMAIL PROTECTED] drivers/md/raid5.c | 94 - include/linux/raid/raid5.h |6 +- 2 files changed, 71 insertions(+), 29 deletions

[PATCH 000 of 006] raid5: Offload RAID operations to a workqueue

2006-06-28 Thread Dan Williams
to the version of md as of commit 266bee88699ddbde42ab303bbc426a105cc49809 in Linus' tree. Regards, Dan Williams [PATCH 001 of 006] raid5: Move write operations to a work queue [PATCH 002 of 006] raid5: Move check parity operations to a work queue [PATCH 003 of 006] raid5: Move compute block operations

[PATCH 001 of 006] raid5: Move write operations to a work queue

2006-06-28 Thread Dan Williams
This patch moves write (reconstruct and read-modify) operations to a work queue. Note the next patch in this series fixes some incorrect assumptions around having multiple operations in flight (i.e. ignore this version of 'queue_raid_work'). Signed-off-by: Dan Williams [EMAIL PROTECTED

Re: [PATCH 000 of 006] raid5: Offload RAID operations to a workqueue

2006-06-29 Thread Dan Williams
] raid5: Configuration options to allow raid ops to run in raid5d context Signed-off-by: Dan Williams [EMAIL PROTECTED] drivers/md/Kconfig | 21 + drivers/md/raid5.c | 25 + include/linux/raid/raid5.h |6 ++ 3 files changed

Re: [PATCH 004 of 006] raid5: Move read completion copies to a work queue

2006-06-29 Thread Dan Williams
of satisfying read requests into the workqueue. It adds a 'read' (past tense) pointer to the r5dev structure to to track reads that have been offloaded to the workqueue. When the copy operation is complete the 'read' pointer is reused as the return_bi for the bi_end_io() call. Signed-off-by: Dan Williams

Re: [PATCH 005 of 006] raid5: Move expansion operations to a work queue

2006-06-29 Thread Dan Williams
are not needed. Signed-off-by: Dan Williams [EMAIL PROTECTED] drivers/md/raid5.c | 51 - include/linux/raid/raid5.h | 36 +++ 2 files changed, 54 insertions(+), 33 deletions

Re: Hardware assisted parity computation - is it now worth it?

2006-07-13 Thread Dan Williams
On 7/13/06, Burn Alting [EMAIL PROTECTED] wrote: Last year, there were discussions on this list about the possible use of a 'co-processor' (Intel's IOP333) to compute raid 5/6's parity data. The MD patches have been posted for review, and the hardware offload pieces are nearing completion. We

Re: In Trouble--Please Help! (was Re: Can't add disk to failed raid array)

2006-07-24 Thread Dan Williams
On 7/23/06, Paul Waldo [EMAIL PROTECTED] wrote: Here is the dmesg output. No log files are created with the FC5 rescue disk. Thanks! I ran into this as well, I believe at this point you want to set: md-mod.start_dirty_degraded=1 as part of your boot options. Understand you may see some

Re: In Trouble--Please Help! (was Re: Can't add disk to failed raid array)

2006-07-24 Thread Dan Williams
I'll certainly give that a try later on, as I need physical access to the box. The corruption part is worrisome... When you did this, did you experience corruption? I'm running RAID6 with 7 disks; presumably even with two disks out of whack, I should be in good shape...??? I was running a 5

Re: [PATCH 001 of 006] raid5: Move write operations to a work queue

2006-07-27 Thread Dan Williams
On 7/27/06, Yuri Tikhonov [EMAIL PROTECTED] wrote: Hello, Dan. I've looked through your patches, and have some suggestions about write operations processing. Thanks for reviewing the code. In the current implementation of the Raid5 driver the RMW operation won't begin until old

Re: raid 5 read performance

2006-08-05 Thread Dan Williams
On 8/5/06, Raz Ben-Jehuda(caro) [EMAIL PROTECTED] wrote: patch is applied by Neil. I do not know when he going to apply it. i have applied it on my systems ( on 2.6.15 ) but they are currenly in the lab and not in production. Raz. PS I must say that it saves lots of cpu cycles. Did you send

Re: Linux: Why software RAID?

2006-08-26 Thread Dan Williams
On 8/23/06, H. Peter Anvin [EMAIL PROTECTED] wrote: Chris Friesen wrote: Jeff Garzik wrote: But anyway, to help answer the question of hardware vs. software RAID, I wrote up a page: http://linux.yyz.us/why-software-raid.html Just curious...with these guys

[PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-09-11 Thread Dan Williams
Neil, The following patches implement hardware accelerated raid5 for the Intel XscaleĀ® series of I/O Processors. The MD changes allow stripe operations to run outside the spin lock in a work queue. Hardware acceleration is achieved by using a dma-engine-aware work queue routine instead of the

[PATCH 01/19] raid5: raid5_do_soft_block_ops

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] raid5_do_soft_block_ops consolidates all the stripe cache maintenance operations into a single routine. The stripe operations are: * copying data between the stripe cache and user application buffers * computing blocks to save a disk access, or to recover

[PATCH 17/19] iop3xx: define IOP3XX_REG_ADDR[32|16|8] and clean up DMA/AAU defs

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Also brings the iop3xx registers in line with the format of the iop13xx register definitions. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- include/asm-arm/arch-iop32x/entry-macro.S |2 include/asm-arm/arch-iop32x/iop32x.h | 14 + include

[PATCH 13/19] dmaengine: add support for dma xor zero sum operations

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/dma/dmaengine.c | 15 drivers/dma/ioatdma.c |6 + include/linux/dmaengine.h | 56 + 3 files changed, 77 insertions(+), 0

[PATCH 04/19] raid5: move compute block operations to a workqueue

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable handle_stripe5 to pass off compute block operations to raid5_do_soft_block_ops, formerly handled by compute_block. Here are a few notes about the new flags R5_ComputeReq and STRIPE_OP_COMPUTE_Recover: Previously, when handle_stripe5 found a block

[PATCH 19/19] iop3xx: IOP 32x and 33x support for the iop-adma driver

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Adds the platform device definitions and the architecture specific support routines (i.e. register initialization and descriptor formats) for the iop-adma driver. Changelog: * add support for 1k zero sum buffer sizes * added dma/aau platform devices

[PATCH 06/19] raid5: move the reconstruct write expansion operation to a workqueue

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable handle_stripe5 to use the reconstruct write operations capability for expansion operations. However this does not move the copy operation associated with an expand to the workqueue. First, it was difficult to find a clean way to pass the parameters

[PATCH 12/19] dmaengine: dma_async_memcpy_err for DMA engines that do not support memcpy

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Default virtual function that returns an error if the user attempts a memcpy operation. An XOR engine is an example of a DMA engine that does not support memcpy. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/dma/dmaengine.c | 13

[PATCH 09/19] dmaengine: reduce backend address permutations

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Change the backend dma driver API to accept a 'union dmaengine_addr'. The intent is to be able to support a wide range of frontend address type permutations without needing an equal number of function type permutations on the backend. Changelog: * make

[PATCH 14/19] dmaengine: add dma_sync_wait

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] dma_sync_wait is a common routine to live wait for a dma operation to complete. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- include/linux/dmaengine.h | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/include/linux

[PATCH 10/19] dmaengine: expose per channel dma mapping characteristics to clients

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Allow a client to ensure that the dma channel it has selected can dma to the specified buffer or page address. Also allow the client to pre-map address ranges to be passed to the operations API. Changelog: * make the dmaengine api EXPORT_SYMBOL_GPL * zero

[PATCH 11/19] dmaengine: add memset as an asynchronous dma operation

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Changelog: * make the dmaengine api EXPORT_SYMBOL_GPL * zero sum support should be standalone, not integrated into xor Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/dma/dmaengine.c | 15 ++ drivers/dma/ioatdma.c |5

[PATCH 16/19] dmaengine: Driver for the Intel IOP 32x, 33x, and 13xx RAID engines

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] This is a driver for the iop DMA/AAU/ADMA units which are capable of pq_xor, pq_update, pq_zero_sum, xor, dual_xor, xor_zero_sum, fill, copy+crc, and copy operations. Changelog: * fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few slots

[PATCH 18/19] iop3xx: Give Linux control over PCI (ATU) initialization

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Currently the iop3xx platform support code assumes that RedBoot is the bootloader and has already initialized the ATU. Linux should handle this initialization for three reasons: 1/ The memory map that RedBoot sets up is not optimal (page_to_dma

[PATCH 08/19] dmaengine: enable multiple clients and operations

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable the dmaengine interface to allow multiple clients to share a channel, and enable clients to request channels based on an operations capability mask. This prepares the interface for use with the RAID5 client and the future RAID6 client. Multi-client

[PATCH 03/19] raid5: move check parity operations to a workqueue

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable handle_stripe5 to pass off check parity operations to raid5_do_soft_block_ops formerly handled by compute_parity5. Changelog: * removed handle_check_operations5. All logic moved into handle_stripe5 so that we do not need to go through the initiation

[PATCH 05/19] raid5: move read completion copies to a workqueue

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable handle_stripe5 to hand off the memory copy operations that satisfy read requests to raid5_do_soft_blocks_ops, formerly this was handled in line within handle_stripe5. It adds a 'read' (past tense) pointer to the r5dev structure to to track reads

[PATCH 02/19] raid5: move write operations to a workqueue

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Enable handle_stripe5 to pass off write operations to raid5_do_soft_blocks_ops (which can be run as a workqueue). The operations moved are reconstruct-writes and read-modify-writes formerly handled by compute_parity5. Changelog: * moved

[PATCH 07/19] raid5: remove compute_block and compute_parity5

2006-09-11 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] replaced by the workqueue implementation Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 123 1 files changed, 0 insertions(+), 123 deletions(-) diff --git a/drivers/md/raid5.c b

Re: [PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-09-11 Thread Dan Williams
On 9/11/06, Jeff Garzik [EMAIL PROTECTED] wrote: Dan Williams wrote: Neil, The following patches implement hardware accelerated raid5 for the Intel Xscale(r) series of I/O Processors. The MD changes allow stripe operations to run outside the spin lock in a work queue. Hardware

Re: [PATCH 08/19] dmaengine: enable multiple clients and operations

2006-09-11 Thread Dan Williams
On 9/11/06, Jeff Garzik [EMAIL PROTECTED] wrote: Dan Williams wrote: @@ -759,8 +755,10 @@ #endif device-common.device_memcpy_buf_to_buf = ioat_dma_memcpy_buf_to_buf; device-common.device_memcpy_buf_to_pg = ioat_dma_memcpy_buf_to_pg; device-common.device_memcpy_pg_to_pg

Re: [PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-09-11 Thread Dan Williams
On 9/11/06, Jeff Garzik [EMAIL PROTECTED] wrote: Dan Williams wrote: This is a frequently asked question, Alan Cox had the same one at OLS. The answer is probably. The only complication I currently see is where/how the stripe cache is maintained. With the IOPs its easy because the DMA

Re: [PATCH 08/19] dmaengine: enable multiple clients and operations

2006-09-12 Thread Dan Williams
On 9/11/06, Roland Dreier [EMAIL PROTECTED] wrote: Jeff Are we really going to add a set of hooks for each DMA Jeff engine whizbang feature? ...ok, but at some level we are going to need a file that has: EXPORT_SYMBOL_GPL(dma_whizbang_op1) . . . EXPORT_SYMBOL_GPL(dma_whizbang_opX)

Re: [PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-09-13 Thread Dan Williams
On 9/13/06, Jakob Oestergaard [EMAIL PROTECTED] wrote: On Mon, Sep 11, 2006 at 04:00:32PM -0700, Dan Williams wrote: Neil, ... Concerning the context switching performance concerns raised at the previous release, I have observed the following. For the hardware accelerated case it appears

Re: [PATCH] dmaengine: clean up and abstract function types (was Re: [PATCH 08/19] dmaengine: enable multiple clients and operations)

2006-09-18 Thread Dan Williams
On 9/15/06, Olof Johansson [EMAIL PROTECTED] wrote: On Fri, 15 Sep 2006 11:38:17 -0500 Olof Johansson [EMAIL PROTECTED] wrote: On Mon, 11 Sep 2006 19:44:16 -0400 Jeff Garzik [EMAIL PROTECTED] wrote: Are we really going to add a set of hooks for each DMA engine whizbang feature? That

Re: [PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-10-10 Thread Dan Williams
On 10/8/06, Neil Brown [EMAIL PROTECTED] wrote: On Monday September 11, [EMAIL PROTECTED] wrote: Neil, The following patches implement hardware accelerated raid5 for the Intel Xscale(r) series of I/O Processors. The MD changes allow stripe operations to run outside the spin lock in a

Re: [PATCH 00/19] Hardware Accelerated MD RAID5: Introduction

2006-10-10 Thread Dan Williams
On 9/14/06, Jakob Oestergaard [EMAIL PROTECTED] wrote: On Wed, Sep 13, 2006 at 12:17:55PM -0700, Dan Williams wrote: ... Out of curiosity; how does accelerated compare to non-accelerated? One quick example: 4-disk SATA array rebuild on iop321 without acceleration - 'top' reports md0_resync

[PATCH 09/12] md: satisfy raid5 read requests via raid5_run_ops

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Use raid5_run_ops to carry out the memory copies for a raid5 read request. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 57 +--- 1 files changed, 32 insertions(+), 25 deletions

[PATCH 02/12] dmaengine: add the async_tx api

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] async_tx is an api to describe a series of bulk memory transfers/transforms. When possible these transactions are carried out by asynchrounous dma engines. The api handles inter-transaction dependencies and hides dma channel management from the client. When

[PATCH 01/12] dmaengine: add base support for the async_tx api

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] * introduce struct dma_async_tx_descriptor as a common field for all dmaengine software descriptors * convert the device_memcpy_* methods into separate prep, set src/dest, and submit stages * support capabilities beyond memcpy (xor, memset, xor zero sum

[PATCH 05/12] md: workqueue for raid5 operations

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Each raid5 device gets its own queue, and each stripe has its own work_struct. The goal is to have a free running raid5d thread, i.e. reduce the time the stripe lock is held by removing bulk memory operations, and removing the sleeping path

[PATCH 08/12] md: move raid5 parity checks to raid5_run_ops

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_CHECK to request a check operation in raid5_run_ops. If raid5_run_ops is able to perform the check with a dma engine the parity will be preserved and not re-read from disk. Check operations re-use the compute block facility

[PATCH 03/12] dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] This is a driver for the iop DMA/AAU/ADMA units which are capable of pq_xor, pq_update, pq_zero_sum, xor, dual_xor, xor_zero_sum, fill, copy+crc, and copy operations. Changelog: * fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few slots

[PATCH 12/12] md: remove raid5 compute_block and compute_parity5

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] replaced by raid5_run_ops Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 124 1 files changed, 0 insertions(+), 124 deletions(-) diff --git a/drivers/md/raid5.c b/drivers/md

[PATCH 07/12] md: move raid5 compute block operations to raid5_run_ops

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_COMPUTE_BLK to request servicing from raid5_run_ops. It also sets a flag for the block being computed to let other parts of handle_stripe submit dependent operations. raid5_run_ops guarantees that the compute operation completes

[PATCH 06/12] md: move write operations to raid5_run_ops

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_PREXOR, STRIPE_OP_BIODRAIN, STRIPE_OP_POSTXOR to request a write to the stripe cache. raid5_run_ops is triggerred to run and executes the request outside the stripe lock. Signed-off-by: Dan Williams [EMAIL PROTECTED

[PATCH 11/12] md: raid5 io requests to raid5_run_ops

2006-11-30 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] generic_make_request may sleep, moving io to raid5_run_ops allows raid5d to run freely. Since raid5_run_ops is a workqueue other cpus can make forward progress on other stripes. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 68

Re: Odd (slow) RAID performance

2006-12-04 Thread Dan Williams
On 12/1/06, Bill Davidsen [EMAIL PROTECTED] wrote: Thank you so much for verifying this. I do keep enough room on my drives to run tests by creating any kind of whatever I need, but the point is clear: with N drives striped the transfer rate is N x base rate of one drive; with RAID-5 it is about

Re: raid5 software vs hardware: parity calculations?

2007-01-13 Thread Dan Williams
On 1/12/07, James Ralston [EMAIL PROTECTED] wrote: On 2007-01-12 at 09:39-08 dean gaudet [EMAIL PROTECTED] wrote: On Thu, 11 Jan 2007, James Ralston wrote: I'm having a discussion with a coworker concerning the cost of md's raid5 implementation versus hardware raid5 implementations.

Re: [PATCH 00/12] md raid acceleration and the async_tx api

2007-01-18 Thread Dan Williams
On 1/18/07, Yuri Tikhonov [EMAIL PROTECTED] wrote: Hello, Dan. Hello. It seems there is a bug in your 06.11.30 raid acceleration patch-set. I tried to run the Linux s/w RAID-5 driver patched with your 06.11.30 patch-set and found that it fails during write operations when the RAID-5

Re: What is the exacting meaning of Striped_Cache_Size?

2007-01-21 Thread Dan Williams
On 1/21/07, Liang Yang [EMAIL PROTECTED] wrote: Hello, I have tried to increase the Striped_Cache_Size from 256 (default for my MD-RAID5 array) to 8192, it does improve the MD-RAID5 Write performance which varies with the size of I/O packet. However, I'm still not very clean the meaning and

Re: What is the exacting meaning of Striped_Cache_Size?

2007-01-22 Thread Dan Williams
On 1/21/07, Liang Yang [EMAIL PROTECTED] wrote: Dan, Thanks for your reply. Still get two questions left. Suppose I have a MD-RAID5 array which consists of 8 disks. 1. Do we need to consider the chunk size of the RAID array when we set the value of Striped_Cache_Size? For example, if the chunk

Re: Kernel 2.6.19.2 New RAID 5 Bug (oops when writing Samba - RAID5)

2007-01-22 Thread Dan Williams
On 1/22/07, Neil Brown [EMAIL PROTECTED] wrote: On Monday January 22, [EMAIL PROTECTED] wrote: Justin Piszcz wrote: My .config is attached, please let me know if any other information is needed and please CC (lkml) as I am not on the list, thanks! Running Kernel 2.6.19.2 on a MD RAID5

[PATCH 01/12] dmaengine: add base support for the async_tx api

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] * introduce struct dma_async_tx_descriptor as a common field for all dmaengine software descriptors * convert the device_memcpy_* methods into separate prep, set src/dest, and submit stages * support capabilities beyond memcpy (xor, memset, xor zero sum

[PATCH 08/12] md: satisfy raid5 read requests via raid5_run_ops

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Use raid5_run_ops to carry out the memory copies for a raid5 read request. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 40 +++- 1 files changed, 15 insertions(+), 25 deletions(-) diff --git

[PATCH 03/12] md: add raid5_run_ops and support routines

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Prepare the raid5 implementation to use async_tx for running stripe operations: * biofill (copy data into request buffers to satisfy a read request) * compute block (generate a missing block in the cache from the other blocks) * prexor (subtract existing data

[PATCH 04/12] md: use raid5_run_ops for stripe cache operations

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Each stripe has three flag variables to reflect the state of operations (pending, ack, and complete). -pending: set to request servicing in raid5_run_ops -ack: set to reflect that raid5_runs_ops has seen this request -complete: set when the operation

[PATCH 07/12] md: move raid5 parity checks to raid5_run_ops

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_CHECK to request a check operation in raid5_run_ops. If raid5_run_ops is able to perform the check with a dma engine the parity will be preserved in memory removing the need to re-read it from disk, as is necessary

[PATCH 11/12] md: remove raid5 compute_block and compute_parity5

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] replaced by raid5_run_ops Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 124 1 files changed, 0 insertions(+), 124 deletions(-) diff --git a/drivers/md/raid5.c b/drivers/md

[PATCH 10/12] md: move raid5 io requests to raid5_run_ops

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe now only updates the state of stripes. All execution of operations is moved to raid5_run_ops. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 68 1 files changed

[PATCH 09/12] md: use async_tx and raid5_run_ops for raid5 expansion operations

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] The parity calculation for an expansion operation is the same as the calculation performed at the end of a write with the caveat that all blocks in the stripe are scheduled to be written. An expansion operation is identified as a stripe with the POSTXOR flag

[PATCH 02/12] dmaengine: add the async_tx api

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] async_tx is an api to describe a series of bulk memory transfers/transforms. When possible these transactions are carried out by asynchrounous dma engines. The api handles inter-transaction dependencies and hides dma channel management from the client. When

[PATCH 06/12] md: move raid5 compute block operations to raid5_run_ops

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_COMPUTE_BLK to request servicing from raid5_run_ops. It also sets a flag for the block being computed to let other parts of handle_stripe submit dependent operations. raid5_run_ops guarantees that the compute operation completes

[PATCH 05/12] md: move write operations to raid5_run_ops

2007-01-22 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_PREXOR, STRIPE_OP_BIODRAIN, STRIPE_OP_POSTXOR to request a write to the stripe cache. raid5_run_ops is triggerred to run and executes the request outside the stripe lock. Signed-off-by: Dan Williams [EMAIL PROTECTED

[PATCH 2.6.20-rc5 01/12] dmaengine: add base support for the async_tx api

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] * introduce struct dma_async_tx_descriptor as a common field for all dmaengine software descriptors * convert the device_memcpy_* methods into separate prep, set src/dest, and submit stages * support capabilities beyond memcpy (xor, memset, xor zero sum

[PATCH 2.6.20-rc5 02/12] dmaengine: add the async_tx api

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] async_tx is an api to describe a series of bulk memory transfers/transforms. When possible these transactions are carried out by asynchrounous dma engines. The api handles inter-transaction dependencies and hides dma channel management from the client. When

[PATCH 2.6.20-rc5 06/12] md: move raid5 compute block operations to raid5_run_ops

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_COMPUTE_BLK to request servicing from raid5_run_ops. It also sets a flag for the block being computed to let other parts of handle_stripe submit dependent operations. raid5_run_ops guarantees that the compute operation completes

[PATCH 2.6.20-rc5 03/12] md: add raid5_run_ops and support routines

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Prepare the raid5 implementation to use async_tx for running stripe operations: * biofill (copy data into request buffers to satisfy a read request) * compute block (generate a missing block in the cache from the other blocks) * prexor (subtract existing data

[PATCH 2.6.20-rc5 08/12] md: satisfy raid5 read requests via raid5_run_ops

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Use raid5_run_ops to carry out the memory copies for a raid5 read request. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 40 +++- 1 files changed, 15 insertions(+), 25 deletions(-) diff --git

[PATCH 2.6.20-rc5 09/12] md: use async_tx and raid5_run_ops for raid5 expansion operations

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] The parity calculation for an expansion operation is the same as the calculation performed at the end of a write with the caveat that all blocks in the stripe are scheduled to be written. An expansion operation is identified as a stripe with the POSTXOR flag

[PATCH 2.6.20-rc5 12/12] dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] This is a driver for the iop DMA/AAU/ADMA units which are capable of pq_xor, pq_update, pq_zero_sum, xor, dual_xor, xor_zero_sum, fill, copy+crc, and copy operations. Changelog: * fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few slots

[PATCH 2.6.20-rc5 11/12] md: remove raid5 compute_block and compute_parity5

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] replaced by raid5_run_ops Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 124 1 files changed, 0 insertions(+), 124 deletions(-) diff --git a/drivers/md/raid5.c b/drivers/md

[PATCH 2.6.20-rc5 04/12] md: use raid5_run_ops for stripe cache operations

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] Each stripe has three flag variables to reflect the state of operations (pending, ack, and complete). -pending: set to request servicing in raid5_run_ops -ack: set to reflect that raid5_runs_ops has seen this request -complete: set when the operation

[PATCH 2.6.20-rc5 05/12] md: move write operations to raid5_run_ops

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_PREXOR, STRIPE_OP_BIODRAIN, STRIPE_OP_POSTXOR to request a write to the stripe cache. raid5_run_ops is triggerred to run and executes the request outside the stripe lock. Signed-off-by: Dan Williams [EMAIL PROTECTED

[PATCH 2.6.20-rc5 07/12] md: move raid5 parity checks to raid5_run_ops

2007-01-23 Thread Dan Williams
From: Dan Williams [EMAIL PROTECTED] handle_stripe sets STRIPE_OP_CHECK to request a check operation in raid5_run_ops. If raid5_run_ops is able to perform the check with a dma engine the parity will be preserved in memory removing the need to re-read it from disk, as is necessary

Re: [RFC][PATCH 00/12] md raid acceleration and performance analysis

2007-02-07 Thread Dan Williams
On 2/6/07, Leech, Christopher [EMAIL PROTECTED] wrote: Hi Dan, I've been looking over how your patches change the ioatdma driver. I like the idea of removing the multiple entry points for virtual address vs. page struct arguments, and just using dma_addr_t for the driver interfaces. But, I

Re: 2.6.20: stripe_cache_size goes boom with 32mb

2007-02-23 Thread Dan Williams
On 2/23/07, Justin Piszcz [EMAIL PROTECTED] wrote: I have 2GB On this machine. For me, 8192 seems to be the sweet spot, I will probably keep it at 8mb. Just a note stripe_cache_size = 8192 = 192MB with six disks. The calculation is: stripe_cache_size * num_disks * PAGE_SIZE =

Re: DMRAID feature direction?

2007-02-27 Thread Dan Williams
On 2/27/07, Gaston, Jason D [EMAIL PROTECTED] wrote: Hello, Can someone point me to where I can search a linux-raid mailing list archive? I use: http://marc.theaimsgroup.com/?l=linux-raidr=1w=2 I am looking for information about where things are going with DMRAID features and any discussion

[RFC, PATCH] raid456: replace the handle_list with a multi-threaded workqueue

2007-02-27 Thread Dan Williams
the available CPUs. I'm posting it anyway to see if I am overlooking a case where it would be helpful, and from a cosmetic standpoint it separates raid5d housekeeping work from handle_stripe work. Signed-off-by: Dan Williams [EMAIL PROTECTED] --- drivers/md/raid5.c | 108

Re: [PATCH] [PPC32] ADMA support for PPC 440SPe processors.

2007-03-15 Thread Dan Williams
On 3/15/07, Paul Mackerras [EMAIL PROTECTED] wrote: Wolfgang Denk writes: This patch is based on and requires a set of patches posted to the linux-raid mailing list by Dan Williams on 2007-01-23: Those patches don't seem to be upstream in Linus' tree. Are they in -mm, or is anyone pushing

Re: [PATCH] [PPC32] ADMA support for PPC 440SPe processors.

2007-03-16 Thread Dan Williams
On 3/16/07, Wolfgang Denk [EMAIL PROTECTED] wrote: In message [EMAIL PROTECTED] you wrote: They are in -mm (git-md-accel.patch). I'll review this driver and and integrate it into my next push to Andrew, along with some further cleanups. Thanks. We're doing some cleanup now based on the

Re: [PATCH] [PPC32] ADMA support for PPC 440SPe processors.

2007-03-16 Thread Dan Williams
On 3/16/07, Benjamin Herrenschmidt [EMAIL PROTECTED] wrote: + PRINTK(\tfree slot %x: %d stride: %d\n, desc-phys, desc-idx, desc-stride); Why don't you use the kernel existing debugging facilitie, like pr_debug, or dev_dbg if you have a proper struct device (which you should have with an

Re: [PATCH] [PPC32] ADMA support for PPC 440SPe processors.

2007-03-17 Thread Dan Williams
On 3/17/07, Stefan Roese [EMAIL PROTECTED] wrote: Dan, I just noticed that your patch dmaengine: add the async_tx api: @@ -22,6 +22,17 @@ config NET_DMA Since this is the main user of the DMA engine, it should be enabled; say Y here. +config ASYNC_TX_DMA + tristate

Re: 2.6.20.3 AMD64 oops in CFQ code

2007-03-22 Thread Dan Williams
On 3/22/07, Neil Brown [EMAIL PROTECTED] wrote: On Thursday March 22, [EMAIL PROTECTED] wrote: On Thu, Mar 22 2007, [EMAIL PROTECTED] wrote: 3 (I think) seperate instances of this, each involving raid5. Is your array degraded or fully operational? Ding! A drive fell out the other day,

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