Hi,
On Fri, Feb 12, 2016 at 08:06:22PM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v4.6.
>
> This pull request is based on "Renesas ARM Based SoC Cleanup for v4.6",
> tagged as cleanup-for-v4.6, which you have already
Hi Simon,
On Wed, Feb 17, 2016 at 2:56 PM, Simon Horman wrote:
> On Tue, Feb 16, 2016 at 11:26:35AM +0900, Magnus Damm wrote:
>> arm64: r8a7795 INTC-EX support using RENESAS_IRQC
>>
>> [PATCH 01/02] arm64: dts: r8a7795: Add INTC-EX device node
>> [PATCH 02/02] arm64: renesas:
Hi Simon,
On Wed, Feb 17, 2016 at 3:28 PM, Simon Horman wrote:
> On Wed, Feb 17, 2016 at 11:33:27AM +0900, Magnus Damm wrote:
>> Hi Geert,
>>
>> On Tue, Feb 16, 2016 at 10:11 PM, Geert Uytterhoeven
>> wrote:
>> > On Tue, Feb 16, 2016 at 8:17 AM, Magnus
On Tue, Feb 16, 2016 at 10:55:37AM +0100, Geert Uytterhoeven wrote:
> CC Marc
>
> On Tue, Feb 16, 2016 at 10:43 AM, Dirk Behme wrote:
> > Besides the distributor and the CPU interface the GIC-400 additionally
> > supports the virtual interface control blocks and the
On Tue, Feb 16, 2016 at 04:17:59PM +0900, Magnus Damm wrote:
> From: Magnus Damm
>
> Deprecate "renesas,channels-mask" and update the r8a7790 CMT example.
>
> Signed-off-by: Magnus Damm
> Acked-by: Geert Uytterhoeven
On Tue, Feb 16, 2016 at 04:18:09PM +0900, Magnus Damm wrote:
> From: Magnus Damm
>
> Remove the 32-bit CMT compat strings to reduce maintenance burden.
>
> It should be fine to break DT compatibility because the 32-bit
> 32-bit CMT DT binding was never part of any
On Wed, Feb 17, 2016 at 11:33:27AM +0900, Magnus Damm wrote:
> Hi Geert,
>
> On Tue, Feb 16, 2016 at 10:11 PM, Geert Uytterhoeven
> wrote:
> > On Tue, Feb 16, 2016 at 8:17 AM, Magnus Damm wrote:
> >> From: Magnus Damm
>
On Fri, Feb 12, 2016 at 10:57:06PM +0300, Sergei Shtylyov wrote:
> On 02/12/2016 10:33 PM, Simon Horman wrote:
>
> >>Sorry for my un-ordered response
> >>
> >>>Define the generic R8A7794 part of the sound device node.
> >>>This sound device is a complex one and comprises the
Hi Geert,
On Tue, Feb 16, 2016 at 10:11 PM, Geert Uytterhoeven
wrote:
> On Tue, Feb 16, 2016 at 8:17 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add documentation for new separate CMT0 and CMT1 DT compatible strings
Add methods to handle mapping of device resources from a physical
address. This is needed for example to be able to map MMIO FIFO
registers to a IOMMU.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
---
Hi,
This series add iommu support to rcar-dmac. It's tested on Koelsch with
CONFIG_IPMMU_VMSA and by enabling the ipmmu_ds node in r8a7791.dtsi. I verified
operation by interacting with /dev/mmcblk1 which is a device behind the iommu.
The series depends on out of tree patch '[PATCH] dmaengine:
A unconfirmed hardware bug prevents channel 0 and 15 to be used by the
DMAC together with the IPMMU. The DMAC driver will disable the channels
reducing the effective number of channels to 14 per DMAC.
Signed-off-by: Niklas Söderlund
Acked-by: Laurent
Map/Unmap a device resource from a physical address. If no dma_map_ops
method is available the operation is a no-op.
Signed-off-by: Niklas Söderlund
---
include/linux/dma-mapping.h | 32
1 file changed, 32 insertions(+)
Add methods to map/unmap device resources addresses for dma_map_ops that
are IOMMU aware. This is needed to map a device MMIO register from a
physical address.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
Group slave address and transfer size in own structs for source and
destination. This is in preparation for hooking up the dma-mapping API
to the slave addresses.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
On 2016-02-15 23:00:53 +0530, Vinod Koul wrote:
> On Tue, Feb 09, 2016 at 11:57:24PM +0100, Wolfram Sang wrote:
> >
> > > This is a dependency for adding iommu support to the rcar-dmac driver,
> > > cfr.
> > > "[PATCH v2 0/5] dmaengine: rcar-dmac: add iommu support for slave
> > > transfers".
>
A unconfirmed hardware bug prevents channel 0 and 15 to be used by the
DMAC together with the IPMMU. The DMAC driver will disable the channels
reducing the effective number of channels to 14 per DMAC.
Signed-off-by: Niklas Söderlund
Acked-by: Laurent
From: Robin Murphy
On some platforms, MMIO regions might need slightly different treatment
compared to mapping regular memory; add the notion of MMIO mappings to
the IOMMU API's memory type flags, so that callers can let the IOMMU
drivers know to do the right thing.
From: Sergei Shtylyov
Date: Sat, 06 Feb 2016 17:45:37 +0300
>Here's a set of 2 patches against DaveM's 'net.git' repo fixing up the
> incomplete commit f5d7837f96e5 ("ravb: ptp: Add CONFIG mode support").
> I'm proposing these as fixes but they can be
Hello.
On 02/16/2016 05:10 PM, Carlos Palminha wrote:
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/drm_crtc_helper.c | 9 ++---
1 file
On Tue, 16 Feb 2016 14:19:06 +
Carlos Palminha wrote:
> This patch set nukes all the dummy crtc mode_fixup implementations.
> (made on top of Daniel topic/drm-misc branch)
There's 2 typos in the subject line (s/hldcd/hlcdc/ and
s/removed/remove/), and you're
On 02/15/2016 04:36 AM, Geert Uytterhoeven wrote:
> As of commit 2eaa790989e03900 ("earlycon: Use common framework for
> earlycon declarations") it is no longer needer to specify both
> EARLYCON_DECLARE() and OF_EARLYCON_DECLARE().
Reviewed-by: Peter Hurley
On 15 February 2016 at 16:01, Wolfram Sang wrote:
> From: Wolfram Sang
>
> Registers are 64bit apart, so we refactor bus_shift handling a little and set
> it based on the DT compatible. Also, EXT_ACC is different. It has been tested
> on a
None of the code under drivers/sh/ is used anymore on Renesas ARM.
Signed-off-by: Geert Uytterhoeven
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index cc2f753cb357a067..a1d03cb4cab49fae 100644
--- a/MAINTAINERS
+++
All supported Renesas ARM SoCs (except for Emma Mobile EV2) have clock
domains. Some SoCs also have power domains. To ensure proper operation
of on-SoC modules, module clocks must be ungated, and power domains must
be powered up when needed.
Currently the user can choose to build a kernel with
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 8
1 file changed, 8 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/sti/sti_crtc.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/gpu/drm/sti/sti_crtc.c
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/udl/udl_modeset.c | 9 -
1 file changed, 9 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 9 -
1 file changed, 9 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/omapdrm/omap_crtc.c | 8
1 file changed, 8 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/nouveau/dispnv04/crtc.c | 8
1 file changed, 8 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/virtio/virtgpu_display.c | 8
1 file changed, 8 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 8
1 file changed, 8 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/gma500/cdv_intel_display.c | 13 ++---
drivers/gpu/drm/gma500/gma_display.c | 7 ---
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c | 8
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 8
2 files
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Signed-off-by: Carlos Palminha
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 13 -
1 file changed, 13 deletions(-)
diff --git
This patch set nukes all the dummy crtc mode_fixup implementations.
(made on top of Daniel topic/drm-misc branch)
Carlos Palminha (16):
drm: fixes crct set_mode when crtc mode_fixup is null.
drm/cirrus: removed optional dummy crtc mode_fixup function.
drm/mgag200: removed optional dummy
* Robin Murphy [2016-02-16 12:43:40 +]:
> On 16/02/16 12:06, Niklas Söderlund wrote:
> >Hi Robin,
> >
> >Thanks for your update patch I will include it in my next version. But
> >I'm sorry I do not understand, is your modification an addition or a
> >substitution to
On Mon, Feb 15, 2016 at 1:17 PM, Magnus Damm wrote:
> From: Magnus Damm
>
> Most pins on the r8a7795 SoC can be configured in GPIO mode for
> interrupt and GPIO functionality, while a couple of them can also
> be routed to the INTC-EX hardware
On Tue, Feb 16, 2016 at 8:17 AM, Magnus Damm wrote:
> From: Magnus Damm
>
> Add documentation for new separate CMT0 and CMT1 DT compatible strings
> for R-Car Gen2. These compat strings allow us to enable CMT1-specific
> features in the driver.
On 16/02/16 12:06, Niklas Söderlund wrote:
Hi Robin,
Thanks for your update patch I will include it in my next version. But
I'm sorry I do not understand, is your modification an addition or a
substitution to your original patch?
Apologies for being confusing - that was a diff on top of the
Hello.
On 2/16/2016 10:18 AM, Magnus Damm wrote:
From: Magnus Damm
Remove the 32-bit CMT compat strings to reduce maintenance burden.
It should be fine to break DT compatibility because the 32-bit
32-bit CMT DT binding was never part of any upstream DTS file.
Hi Robin,
Thanks for your update patch I will include it in my next version. But
I'm sorry I do not understand, is your modification an addition or a
substitution to your original patch?
* Robin Murphy [2016-02-11 15:57:26 +]:
> On 11/02/16 00:02, Laurent Pinchart
On Tue, Feb 16, 2016 at 3:26 AM, Magnus Damm wrote:
> From: Magnus Damm
>
> Select RENESAS_IRQC for Arm64 SoCs from Renesas to enable
> build of drivers/irqchip/irq-renesas-irqc.c.
>
> Signed-off-by: Magnus Damm
Hello.
On 2/16/2016 10:42 AM, Geert Uytterhoeven wrote:
I have observed what appears to be a regression in the ravb ethernet driver
caused by d5c3d84657db ("net: phy: Avoid polling PHY with
PHY_IGNORE_INTERRUPTS").
When booting net-next configured with the ARM64 defconfig on the Renesas
gpiochip_add_data() allocates the struct gpio_device using kmalloc(),
which doesn't zero the returned memory.
Hence when calling dev_set_name(), it may try to free a bogus old name,
causing a crash:
Unable to handle kernel NULL pointer dereference at virtual address
...
On 16.02.2016 10:43, Sudeep Holla wrote:
On 16/02/16 06:40, Dirk Behme wrote:
On 15.02.2016 21:38, Geert Uytterhoeven wrote:
Add the missing "cache-unified" and "cache-level" properties to the
Cortex-A57 cache-controller node.
Signed-off-by: Geert Uytterhoeven
---
On 16/02/16 07:12, Geert Uytterhoeven wrote:
Hi Dirk,
On Tue, Feb 16, 2016 at 7:44 AM, Dirk Behme wrote:
[...]
As we don't have any CA53 in the device tree yet, and it was rejected to add
it, I'd think that we don't want these unused entries at the moment.
Besides the distributor and the CPU interface the GIC-400 additionally
supports the virtual interface control blocks and the virtual CPU interfaces.
Add the physical base addresses and size for these.
See
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/index.html
-> 3.2.
On 16/02/16 06:40, Dirk Behme wrote:
On 15.02.2016 21:38, Geert Uytterhoeven wrote:
Add the missing "cache-unified" and "cache-level" properties to the
Cortex-A57 cache-controller node.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Remaining part of "[PATCH v2 6/6]
Hi Geert,
On 09/02/16 15:19, Geert Uytterhoeven wrote:
> The R-Car GPIO driver handles Runtime PM for requested GPIOs only.
>
> When using a GPIO purely as an interrupt source, no Runtime PM handling
> is done, and the GPIO module's clock may not be enabled.
>
> To fix this:
> - Add
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