On 01.06.2016 21:20, Geert Uytterhoeven wrote:
Hi all,
Currently the R-Car Clock Pulse Generator (CPG) drivers obtains the
state of the mode pins either by a call from the board code, or directly
by using a hardcoded register access. This is a bit messy, and creates a
dependency between
On 01.06.2016 21:21, Geert Uytterhoeven wrote:
The R-Car M1A board code no longer calls r8a7778_clocks_init().
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/clk-r8a7778.c | 13 -
include/linux/clk/renesas.h | 1 -
2
On 01.06.2016 21:21, Geert Uytterhoeven wrote:
Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3
RST module.
For now this driver just provides an API to obtain the state of the mode
pins, as latched at reset time. As this is typically called from the
probe function of a
On 01.06.2016 21:20, Geert Uytterhoeven wrote:
Add DT bindings for the Renesas R-Car Reset Controller (R-Car Gen1
RESET/WDT and R-Car Gen2/Gen3 RST).
As the features provided by the hardware module differ a lot across the
various SoC families and members, only SoC-specific compatible values
are
Hi,
> From: Mathias Nyman
> Sent: Wednesday, June 01, 2016 8:42 PM
>
> >>> isn't the following enough?
> >>>
> >>> @@ -4886,7 +4886,7 @@ int xhci_gen_setup(struct usb_hcd *hcd,
> >>> xhci_get_quirks_t get_quirks)
> >>> xhci->hcc_params2 = readl(>cap_regs->hcc_params2);
> >>>
From: Yoshihiro Kaneko
Date: Mon, 30 May 2016 05:25:43 +0900
> From: Kazuya Mizuguchi
>
> Use SET_RUNTIME_PM_OPS macro instead of assigning a member of
> dev_pm_ops directly.
>
> Signed-off-by: Kazuya Mizuguchi
From: Yoshihiro Kaneko
Date: Wed, 1 Jun 2016 03:01:28 +0900
> From: Masaru Nagai
>
> The H/W manual recommends B'10 or B'11 in a value of the separation
> filtering select bits in the receive configuration register (RCR.ESF).
> When B'10 is
Hi all,
When moving functionality from C code to DT, we're regularly faced with
stable DT issues: old DTBs should keep on working. This requires keeping
workaround code in the kernel.
An alternative solution to having workaround C code, would be to
dynamically modify the DT, to add
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use "renesas,-rst" instead of "renesas,rst-",
- Drop "syscon" compatible value,
v2:
- Correct unit address,
- Drop RFC
Now the R-Car Gen2 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just call of_clk_init() instead.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Drop "select MFD_SYSCON",
Add a device node for the RESET/WDT module, which provides a.o. reset
control, mode pin monitoring, and watchdog control.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
arch/arm/boot/dts/r8a7779.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
Obtain the values of the mode pins from the R-Car RST driver, which
relies on the presence in DT of a device node for the RST module.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/r8a7796-cpg-mssr.c | 8 +++-
1 file changed, 7
Add a device node for the RESET/WDT module, which provides a.o. reset
control, mode pin monitoring, and watchdog control.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
arch/arm/boot/dts/r8a7778.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
The R-Car Gen2 board code no longer calls rcar_gen2_clocks_init().
Signed-off-by: Geert Uytterhoeven
---
v3:
- rebased,
v2:
- No changes.
---
drivers/clk/renesas/clk-rcar-gen2.c | 7 ---
include/linux/clk/renesas.h | 2 --
2 files changed, 9
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use "renesas,-rst" instead of "renesas,rst-",
- Drop "syscon" compatible value,
v2:
- Correct unit address,
- Drop RFC
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use "renesas,-rst" instead of "renesas,rst-",
- Drop "syscon" compatible value,
v2:
- Correct unit address,
- Drop RFC
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use "renesas,-rst" instead of "renesas,rst-",
- Drop "syscon" compatible value,
v2:
- Correct unit address,
- Drop RFC
The R-Car M1A board code no longer calls r8a7778_clocks_init().
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/clk-r8a7778.c | 13 -
include/linux/clk/renesas.h | 1 -
2 files changed, 14 deletions(-)
diff --git
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Use "renesas,-rst" instead of "renesas,rst-",
- Drop "syscon" compatible value,
v2:
- New.
---
Obtain the values of the mode pins from the R-Car RST driver, which
relies on the presence in DT of a device node for the RESET/WDT module.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/clk-r8a7778.c | 13 +
1 file changed, 13
Add a device node for the RST module, which provides a.o. reset control
and mode pin monitoring.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git
All R-Car Gen3 clock drivers now obtain the values of the mode pins from
the R-Car RST driver.
Signed-off-by: Geert Uytterhoeven
---
drivers/clk/renesas/rcar-gen3-cpg.c | 17 -
drivers/clk/renesas/rcar-gen3-cpg.h | 1 -
2 files changed, 18 deletions(-)
The R-Car H1 board code no longer calls r8a7779_clocks_init().
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/clk-r8a7779.c | 9 -
include/linux/clk/renesas.h | 1 -
2 files changed, 10 deletions(-)
diff --git
Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3
RST module.
For now this driver just provides an API to obtain the state of the mode
pins, as latched at reset time. As this is typically called from the
probe function of a clock driver, which can run much earlier than any
Obtain the values of the mode pins from the R-Car RST driver, which
relies on the presence in DT of a device node for the RESET/WDT module.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/clk-r8a7779.c | 9 +++--
1 file changed, 7
Now the R-Car M1A CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just remove the .init_time() callback, the
generic ARM code will take care of calling of_clk_init().
Signed-off-by: Geert
Now the R-Car H1 CPG clock driver obtains the state of the mode pins
from the R-Car RST driver, there's no longer a need to pass this state
explicitly. Hence we can just remove the .init_time() callback, the
generic ARM code will take care of calling of_clk_init() and
clocksource_probe().
Obtain the values of the mode pins from the R-Car RST driver, which
relies on the presence in DT of a device node for the RST module.
Signed-off-by: Geert Uytterhoeven
---
v3:
- New.
---
drivers/clk/renesas/r8a7795-cpg-mssr.c | 8 +++-
1 file changed, 7
Obtain the values of the mode pins from the R-Car RST driver, which
relies on the presence in DT of a device node for the RST module.
Fall back to calling rcar_gen2_read_mode_pins() in the R-Car Gen2
platform code for backward-compatibility with old DTs.
Signed-off-by: Geert Uytterhoeven
From: Masaru Nagai
Writing a non-zero value to the manual PAUSE frame register (MPR) starts
the transmission of a PAUSE frame.
A PAUSE frame is sent in ravb_emac_init(), but it is not expected behavior.
Signed-off-by: Masaru Nagai
On Wed, Jun 01, 2016 at 05:22:27PM +0200, Niklas Söderlund wrote:
> +static dma_addr_t arm_iommu_map_resource(struct device *dev,
> + phys_addr_t phys_addr, size_t size,
> + enum dma_data_direction dir, struct dma_attrs *attrs)
> +{
> + struct dma_iommu_mapping *mapping
Group slave address and transfer size in own structs for source and
destination. This is in preparation for hooking up the dma-mapping API
to the slave addresses.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
Hi,
[In this v7 series I have tried to address the questions raised by Christoph
Hellwig and I hope it can awnser your concernes regarding dma-debug.]
This series tries to solve the problem with DMA with device registers
(MMIO registers) that are behind an IOMMU for the rcar-dmac driver. A
Add methods to map/unmap device resources addresses for dma_map_ops that
are IOMMU aware. This is needed to map a device MMIO register from a
physical address.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
Add methods to handle mapping of device resources from a physical
address. This is needed for example to be able to map MMIO FIFO
registers to a IOMMU.
Signed-off-by: Niklas Söderlund
Reviewed-by: Laurent Pinchart
---
A MMIO mapped resource can not be represented by a struct page so a new
debug type is needed to handle this. This patch add such type and
functionality to add/remove entries and how to translate them to a
physical address.
Signed-off-by: Niklas Söderlund
Enable slave transfers to a device behind a IPMMU by mapping the slave
addresses using the dma-mapping API.
Signed-off-by: Niklas Söderlund
---
drivers/dma/sh/rcar-dmac.c | 82 +-
1 file changed, 74
Map/Unmap a device MMIO resource from a physical address. If no dma_map_ops
method is available the operation is a no-op.
Signed-off-by: Niklas Söderlund
---
Documentation/DMA-API.txt | 22 +-
include/linux/dma-mapping.h | 36
On 06/01/2016 10:22 AM, Geert Uytterhoeven wrote:
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov
---
include/dt-bindings/clock/r8a7792-clock.h | 104 ++
1
On 06/01/2016 04:18 AM, Simon Horman wrote:
Describe the IRQC interrupt controller in the R8A7792 device tree.
Signed-off-by: Sergei Shtylyov
---
arch/arm/boot/dts/r8a7792.dtsi | 13 +
1 file changed, 13 insertions(+)
Index:
On 06/01/2016 03:57 AM, Simon Horman wrote:
The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
and the required clock descriptions.
Signed-off-by: Sergei Shtylyov
This is rather large for an initial DTSI. Did you give any
On 06/01/2016 03:52 AM, Simon Horman wrote:
Add macros usable by the device tree sources to reference the R8A7792
clocks by index.
Signed-off-by: Sergei Shtylyov
---
include/dt-bindings/clock/r8a7792-clock.h | 104 ++
1 file
Hello.
On 06/01/2016 02:51 AM, Simon Horman wrote:
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov
I think
Hi Sergei,
On Wed, Jun 1, 2016 at 2:16 PM, Sergei Shtylyov
wrote:
> On 6/1/2016 11:22 AM, Geert Uytterhoeven wrote:
>>> --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
>>> +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
>>
>>> +
Hello.
On 6/1/2016 11:22 AM, Geert Uytterhoeven wrote:
--- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
+++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
+ ethernet@1800 {
+ compatible = "smsc,lan89218", "smsc,lan9115";
The "smsc,lan89218" needs to be
isn't the following enough?
@@ -4886,7 +4886,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t
get_quirks)
xhci->hcc_params2 = readl(>cap_regs->hcc_params2);
xhci_print_registers(xhci);
- xhci->quirks = quirks;
+ xhci->quirks |= quirks;
Hello.
On 6/1/2016 10:04 AM, Geert Uytterhoeven wrote:
Here's the set of 13 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160530-v4.7-rc1' tag. We add the device tree support for
the R8A7792-based Blanche board. The R-Car 'clk' driver patch was posted last
week
On Wed, Jun 1, 2016 at 12:24 AM, Sergei Shtylyov
wrote:
> The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC,
> and the required clock descriptions.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
>
Hi Geert,
On 01.06.2016 10:26, Geert Uytterhoeven wrote:
Hi Dirk,
On Wed, Jun 1, 2016 at 9:38 AM, Dirk Behme wrote:
Sorry, if that was unclear. I took the example and transferred it to R-Car3
where we have ES1 - ES3.
So, taking this example, on R-Car3 we might end
On Wed, Jun 1, 2016 at 12:32 AM, Sergei Shtylyov
wrote:
> Add the initial device tree for the R8A7792 SoC based Blanche board.
> The board has 2 debug serial ports: SCIF0 and SCIF3; include support for
> them, so that the serial console can work.
>
>
On 01.06.2016 10:40, Geert Uytterhoeven wrote:
Hi Dirk,
On Wed, Jun 1, 2016 at 10:36 AM, Dirk Behme wrote:
On 01.06.2016 10:26, Geert Uytterhoeven wrote:
On Wed, Jun 1, 2016 at 9:38 AM, Dirk Behme
wrote:
Sorry, if that was unclear. I took
Hi Dirk,
On Wed, Jun 1, 2016 at 10:36 AM, Dirk Behme wrote:
> On 01.06.2016 10:26, Geert Uytterhoeven wrote:
>> On Wed, Jun 1, 2016 at 9:38 AM, Dirk Behme
>> wrote:
>>> Sorry, if that was unclear. I took the example and transferred it to
>>>
On Wed, May 25, 2016 at 11:40 PM, Sergei Shtylyov
wrote:
> Renesas R-Car V2H (R8A7792) clocks are handled by R-Car gen2 clock driver.
>
> Signed-off-by: Sergei Shtylyov
Acked-by: Geert Uytterhoeven
On Wed, Jun 01, 2016 at 12:17:29PM +0900, Magnus Damm wrote:
> Hi Simon,
>
> On Tue, May 31, 2016 at 12:32 PM, Simon Horman
> wrote:
> > the intention of this series is to extend use of the demuxer for I2C
> > on the lager/r8a7790 to cover all I2C IP blocks.
> >
> >
Hi Dirk,
On Wed, Jun 1, 2016 at 9:38 AM, Dirk Behme wrote:
> Sorry, if that was unclear. I took the example and transferred it to R-Car3
> where we have ES1 - ES3.
>
> So, taking this example, on R-Car3 we might end up with
>
> {
> .compatible =
Hi Sergei,
On Wed, Jun 1, 2016 at 12:33 AM, Sergei Shtylyov
wrote:
> --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts
> +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts
> + ethernet@1800 {
> + compatible = "smsc,lan89218",
On Wed, Jun 1, 2016 at 12:30 AM, Sergei Shtylyov
wrote:
> Document the Blanche device tree bindings, listing it as a supported board.
>
> This allows to use checkpatch.pl to validate .dts files referring to the
> Blanche board.
>
> Signed-off-by: Sergei
On Wed, Jun 1, 2016 at 12:29 AM, Sergei Shtylyov
wrote:
> Describe the IRQC interrupt controller in the R8A7792 device tree.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
On Wed, Jun 1, 2016 at 12:26 AM, Sergei Shtylyov
wrote:
> Describe [H]SCIFs in the R8A7792 device tree.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Wed, Jun 1, 2016 at 12:25 AM, Sergei Shtylyov
wrote:
> Describe SYS-DMAC0/1 in the R8A7792 device tree.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Wed, Jun 1, 2016 at 12:21 AM, Sergei Shtylyov
wrote:
> Renesas R8A7792 SoC also has the CPG MSTP clocks...
>
> Signed-off-by: Sergei Shtylyov
If you use "clk: renesas: smtp: ..."
Acked-by: Geert Uytterhoeven
Hi,
Yoshihiro Shimoda writes:
>> From: Felipe Balbi
>> Sent: Wednesday, June 01, 2016 4:01 PM
>>
>> Yoshihiro Shimoda writes:
>>
>> > I'm afraid but I found a regression of xhci-rcar in v4.7-rc1.
>> > This regression is
Hi Simon,
On Wed, Jun 1, 2016 at 2:25 AM, Simon Horman wrote:
> On Wed, Jun 01, 2016 at 01:20:11AM +0300, Sergei Shtylyov wrote:
>> Renesas R8A7792 SoC is a member of the R-Car gen2 family and so has CPG...
>>
>> Signed-off-by: Sergei Shtylyov
On Wed, Jun 1, 2016 at 12:20 AM, Sergei Shtylyov
wrote:
> Renesas R8A7792 SoC is a member of the R-Car gen2 family and so has CPG...
>
> Signed-off-by: Sergei Shtylyov
Acked-by: Geert Uytterhoeven
Hi Felipe,
> From: Felipe Balbi
> Sent: Wednesday, June 01, 2016 4:01 PM
>
> Yoshihiro Shimoda writes:
>
> > I'm afraid but I found a regression of xhci-rcar in v4.7-rc1.
> > This regression is caused by the following commit:
> >
> > commit
Hi Sergei,
On Wed, Jun 1, 2016 at 12:18 AM, Sergei Shtylyov
wrote:
> --- renesas.orig/arch/arm/mach-shmobile/Kconfig
> +++ renesas/arch/arm/mach-shmobile/Kconfig
> @@ -86,6 +86,11 @@ config ARCH_R8A7791
> select ARCH_RCAR_GEN2
> select I2C
>
>
Hi Geert,
On 01.06.2016 09:27, Geert Uytterhoeven wrote:
Hi Dirk,
On Wed, Jun 1, 2016 at 9:19 AM, Dirk Behme wrote:
On 01.06.2016 07:19, Magnus Damm wrote:
On Fri, May 27, 2016 at 4:56 PM, Dirk Behme
wrote:
On 27.05.2016 05:13, Magnus Damm
On Wed, Jun 1, 2016 at 12:15 AM, Sergei Shtylyov
wrote:
> Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
On Wed, Jun 1, 2016 at 12:11 AM, Sergei Shtylyov
wrote:
> Add macros usable by the device tree sources to reference R8A7792 SYSC power
> domains by index.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Hi Sergei,
On Wed, Jun 1, 2016 at 12:06 AM, Sergei Shtylyov
wrote:
>Here's the set of 13 patches against Simon Horman's 'renesas.git' repo,
> 'renesas-devel-20160530-v4.7-rc1' tag. We add the device tree support for
> the R8A7792-based Blanche board. The
Yoshihiro Shimoda writes:
> I'm afraid but I found a regression of xhci-rcar in v4.7-rc1.
> This regression is caused by the following commit:
>
> commit b1c127ae990bccf0187d741c1695a61e54de1943
> Author: Felipe Balbi
> Date: Fri
Since the commit b1c127ae990b ("usb: host: xhci: plat: make use of new
methods in xhci_plat_priv") changed the setting timing of xhci->quirks to
xhci_rcar_init_quirk(), the quirks was overwritten by xhci_gen_setup().
So, this patch fixes the issue using a "quirks" of struct xhci_plat_priv.
This patch adds quirks in struct xhci_plat_priv to set xhci->quirks
for platform-specific.
Signed-off-by: Yoshihiro Shimoda
---
drivers/usb/host/xhci-plat.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-plat.h
I'm afraid but I found a regression of xhci-rcar in v4.7-rc1.
This regression is caused by the following commit:
commit b1c127ae990bccf0187d741c1695a61e54de1943
Author: Felipe Balbi
Date: Fri Apr 22 13:17:16 2016 +0300
usb: host: xhci: plat: make use of new
> From: Yoshihiro Shimoda
> Sent: Wednesday, June 01, 2016 11:40 AM
>
> Since the commit b1c127ae (usb: host: xhci: plat: make use of new methods
> in xhci_plat_priv) changed the setting timing of xhci->quirks to
Oops, checkpatch.pl said this message should be revised.
So, I will submit v2 patch
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