On Fri, Nov 04, 2016 at 10:44:04AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
On Fri, Nov 04, 2016 at 10:44:27AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC DT updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
On Fri, Nov 04, 2016 at 10:44:42AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM based SoC updates for v4.10.
>
>
> The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:
>
> Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)
>
>
On 11/07, Geert Uytterhoeven wrote:
> Hi Mike, Stephen,
>
> The following changes since commit dbdcc4f996df280eb2758095b4774ea62da8a2a7:
>
> clk: renesas: r8a7796: Add DU and LVDS clocks (2016-11-02 20:40:08 +0100)
>
> are available in the git repository at:
>
>
Hi Rob,
On Friday 14 Oct 2016 07:40:14 Rob Herring wrote:
> On Sun, Oct 9, 2016 at 11:33 AM, Laurent Pinchartwrote:
> > On Saturday 08 Oct 2016 20:29:39 Rob Herring wrote:
> >> On Tue, Oct 04, 2016 at 07:23:29PM +0300, Laurent Pinchart wrote:
> >>> LVDS is a physical layer specification defined
Enable i2c6, and add a device node for the da9063 PMIC, with subnodes
for rtc and wdt. Regulator support is not yet included.
This allows the system to be restarted when the watchdog timer times
out, or when a system restart is requested.
Signed-off-by: Geert Uytterhoeven
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
> Currently platforms/drivers needing to get the machine model name are
> replicating the same snippet of code. In some case, the OF reference
> counting is either missing or incorrect.
>
> This patch adds support to read the
There are pins on the r8a7795 which are not part of a GPIO bank nor
can be muxed between different functions. They do however allow for the
bias to be configured. Add those pins to the list of pins and
to the bias configuration array.
The pins can now be referred to in DT by function names and
From: Sergei Shtylyov
Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
From: Ulrich Hecht
Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Tested-by: Wolfram Sang
Signed-off-by: Simon Horman
---
From: Vladimir Barinov
This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13
From: Vladimir Barinov
This updates H3ULCB Device tree bindings Documentation with
official board name
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
From: Vladimir Barinov
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov
From: Ulrich Hecht
Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Tested-by: Wolfram Sang
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
Add device tree binding documentation for the Product Register (PRR),
which provides product and revision information on most Renesas ARM
SoCs.
Signed-off-by: Geert Uytterhoeven
Acked-by: Rob Herring
From: Sergei Shtylyov
Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
From: Vladimir Barinov
This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 11 +++
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC EtherAVB updates for v4.10.
This pull request is based on the "Second Round of Renesas ARM64 Based SoC
DT Updates for v4.10", tagged as arm64-dt-for-v4.10, which I have also sent
a pull-request for.
The reason for this base
From: Vladimir Barinov
This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 43
From: Vladimir Barinov
This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 5 +
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC drivers updates for
v4.10.
This pull request is based on a merge of:
* The previous round of such requests, tagged as renesas-drivers-for-v4.10,
which you have already pulled.
* The soc-device-match-tag1
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM64 based SoC DT updates
for v4.10.
This pull request is based on a merge of:
* The previous round of such requests, tagged as renesas-arm64-dt-for-v4.10,
which I have already sent a pull-request for.
* The "Second
From: Vladimir Barinov
Add M3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
From: Vladimir Barinov
This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 49
From: Vladimir Barinov
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
From: Vladimir Barinov
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 8
From: Vladimir Barinov
This updates H3ULCB device tree header with official board name
Signed-off-by: Vladimir Barinov
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Ulrich Hecht
Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Wolfram Sang
Tested-by: Wolfram Sang
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
Identify the SoC type and revision, and register this information with
the SoC bus, so it is available under /sys/devices/soc0/, and can be
checked where needed using soc_device_match().
Identification is done using the Product Register or
Implements pull-up and pull-down. On this SoC there is no simple mapping
of GP pins to bias register bits, so we need a table.
Signed-off-by: Niklas Söderlund
---
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 354 +++
1 file
Hi,
These patches add drive strength and bias support for both GPIO and none
GPIO pins to r8a7796. Similar to the none GPIO pins for r8a7795 the
system to derive unique pin numbers are the R-Car M3SiP pin layout.
Tested on M3-W and the series depends on the series '[PATCHv3 0/6]
pinctrl: sh-pfc:
From: Sergei Shtylyov
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
From: Sergei Shtylyov
Add the initial device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1 debug serial port (SCIF2); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
Add the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman
Reviewed-by: Wolfram Sang
Tested-by: Wolfram Sang
---
arch/arm/boot/dts/r8a7790-lager.dts | 1 +
1 file changed, 1 insertion(+)
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Sergei Shtylyov
Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by:
From: Sergei Shtylyov
Describe the IRQC interrupt controller in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang
From: Sergei Shtylyov
Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei
From: Sergei Shtylyov
Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei
From: Sergei Shtylyov
Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by:
From: Sergei Shtylyov
Describe SYS-DMAC0/1 in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC updates for v4.10.
This pull request is based on the previous round of
such requests, tagged as renesas-soc-for-v4.10,
which I have already sent a pull-request for.
The following changes since commit
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman
Reviewed-by: Wolfram Sang
---
arch/arm/boot/dts/r8a7794-alt.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/r8a7794-alt.dts
From: Sergei Shtylyov
Define the generic R8A7743 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by:
From: Sergei Shtylyov
Define the generic R8A7745 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by:
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Jacopo Mondi
Update the PFC pin groups and function names of DU interface for
r8a7794 ALT board.
The currently specified pin groups and function names prevented PFC and
DU interfaces from being correctly configured:
sh-pfc e606.pin-controller: function 'du' not
Make it possible to select which I2C1 IP core you want to run on the
EXIO-A connector.
This is based on reference work for the I2C0 core of the lager board
by Wolfram Sang.
Signed-off-by: Simon Horman
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang
From: Geert Uytterhoeven
The parent clock of the HSUSB clock is the HP clock, not the MP clock.
Fixes: c7bab9f929e51761 ("ARM: shmobile: r8a7794: Add USB clocks to device
tree")
Signed-off-by: Geert Uytterhoeven
Acked-by: Yoshihiro Shimoda
From: Sergei Shtylyov
Describe SYS-DMAC0/1 in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
.
Signed-off-by: Sergei Shtylyov
Reviewed-by: Geert
From: Geert Uytterhoeven
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Sergei Shtylyov
Document the SK-RZG1E device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
SK-RZG1E board.
Signed-off-by: Sergei Shtylyov
Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang
Define the drive strength registers for the R8A7796. Add pins which are
not part of a GPIO bank nor can be muxed between different functions but
which still allow for their drive-strength to be configured.
Signed-off-by: Niklas Söderlund
---
On 17/11/16 14:13, Arnd Bergmann wrote:
On Thursday, November 17, 2016 2:08:30 PM CET Sudeep Holla wrote:
On 17/11/16 13:50, Arnd Bergmann wrote:
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
Currently platforms/drivers needing to get the machine model name are
Documentation says that some bits in TDSEL must be set (ch 5.3.39 in R-Car H2
v0.91). However, the reset value of the register is 0, so software has to do
it. Add this to the kernel driver to ensure this is really done independent of
firmware versions.
This is needed for some SD cards supporting
On Thursday, November 17, 2016 2:08:30 PM CET Sudeep Holla wrote:
> On 17/11/16 13:50, Arnd Bergmann wrote:
> > On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
> >> Currently platforms/drivers needing to get the machine model name are
> >> replicating the same snippet of code.
Hi Rob,
Thanks for the review comments.
> On Wed, Nov 09, 2016 at 03:44:41PM +, Ramesh Shanmugasundaram wrote:
> > This patch adds driver support for MAX2175 chip. This is Maxim
> > Integrated's RF to Bits tuner front end chip designed for
> > software-defined radio solutions. This driver
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these second round of Renesas ARM based SoC DT updates for
v4.10.
This pull request is based on a merge of:
* The previous round of such requests, tagged as renesas-dt-for-v4.10,
which I have already sent a pull-request for.
* The rzg-clock-defs
On 17/11/16 13:50, Arnd Bergmann wrote:
On Thursday, November 17, 2016 11:50:50 AM CET Sudeep Holla wrote:
Currently platforms/drivers needing to get the machine model name are
replicating the same snippet of code. In some case, the OF reference
counting is either missing or incorrect.
This
Currently platforms/drivers needing to get the machine model name are
replicating the same snippet of code. In some case, the OF reference
counting is either missing or incorrect.
This patch adds support to read the machine model name either using
the "model" or the "compatible" property in the
On Thu, Nov 17, 2016 at 6:05 AM, Magnus Damm wrote:
> Thanks for your efforts! Quick question, the dependency on zlib seems
> to come from using adler32() for checksum comparison. In the code you
> seem to compare the total amount of data anyway, so I guess the
> checksum
Hi Magnus,
On Thursday 17 Nov 2016 11:28:07 Magnus Damm wrote:
> On Wed, Nov 16, 2016 at 4:12 AM, Laurent Pinchart wrote:
> > On Thursday 27 Oct 2016 18:40:31 Laurent Pinchart wrote:
> >> On Thursday 27 Oct 2016 16:25:35 Magnus Damm wrote:
> >>> On Thu, Oct 27, 2016 at 4:13 PM, Simon Horman
Hi Geert,
On Thu, Nov 17, 2016 at 5:31 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Thu, Nov 17, 2016 at 3:28 AM, Magnus Damm wrote:
>> First of all, we might have slightly different view of the hardware,
>> so this might need some further
Hi Magnus,
On Thu, Nov 17, 2016 at 3:28 AM, Magnus Damm wrote:
> First of all, we might have slightly different view of the hardware,
> so this might need some further discussions. Also, this topic in my
> mind is mainly about DT integration code merge ordering for r8a7796
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