On Wed, Jan 18, 2017 at 05:30:53PM +0100, Jacopo Mondi wrote:
> Add device tree bindings documentation for Maxim MAX11100 single-channel
> ADC
>
> Signed-off-by: Jacopo Mondi
> Reviewed-by: Geert Uytterhoeven
> Acked-by: Wolfram Sang
On 01/21/2017 02:04 PM, Jonathan Cameron wrote:
> On 15/01/17 17:05, Marek Vasut wrote:
>> Add IIO driver for the Renesas RCar GyroADC block. This block is a
>> simple 4/8-channel ADC which samples 12/15/24 bits of data every
>> cycle from all channels.
>>
>> Signed-off-by: Marek Vasut
Add IIO driver for the Renesas RCar GyroADC block. This block is a
simple 4/8-channel ADC which samples 12/15/24 bits of data every
cycle from all channels.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Simon Horman
Add DT bindings for the Renesas RCar GyroADC block. This block is
a simple 4/8-channel ADC which samples 12/15/24 bits of data every
cycle from all channels.
Signed-off-by: Marek Vasut
Cc: Geert Uytterhoeven
Cc: Simon Horman
On 21/01/17 13:22, Jonathan Cameron wrote:
> On 18/01/17 16:30, Jacopo Mondi wrote:
>> Add device tree bindings documentation for Maxim MAX11100 single-channel
>> ADC
>>
>> Signed-off-by: Jacopo Mondi
>> Reviewed-by: Geert Uytterhoeven
>>
On 19/01/17 21:47, jacopo mondi wrote:
> Hi Peter,
>
> On 19/01/2017 19:15, Peter Meerwald-Stadler wrote:
>>
>>> Add iio driver for Maxim MAX11100 single-channel ADC.
>>
>> minor comments, maybe Jonathan can fix it up when taking this...
>>
>>> +struct max11100_state {
>>> +const struct
On 18/01/17 16:30, Jacopo Mondi wrote:
> Add device tree bindings documentation for Maxim MAX11100 single-channel
> ADC
>
> Signed-off-by: Jacopo Mondi
> Reviewed-by: Geert Uytterhoeven
> Acked-by: Wolfram Sang
On 15/01/17 17:05, Marek Vasut wrote:
> Add IIO driver for the Renesas RCar GyroADC block. This block is a
> simple 4/8-channel ADC which samples 12/15/24 bits of data every
> cycle from all channels.
>
> Signed-off-by: Marek Vasut
> Cc: Geert Uytterhoeven
On Fri, Jan 20, 2017 at 10:06:02PM -0500, Chris Brandt wrote:
> Some controllers have 2 clock sources instead of 1. The 2nd clock
> is for the internal card detect logic and must be enabled/disabled
> along with the main core clock for proper operation.
>
> Signed-off-by: Chris Brandt
On Fri, Jan 20, 2017 at 10:06:03PM -0500, Chris Brandt wrote:
> In the case of a single clock source, you don't need names. However,
> if the controller has 2 clock sources, you need to name them correctly
> so the driver can find the 2nd one. The 2nd clock is for the internal
> card detect logic.
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